Patents by Inventor Shih Lu
Shih Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240109748Abstract: An optical fiber winding machine with full-time tension control function is provided. The machine includes a first wire storage ring, a first tension sensing module, a first revolution plate, a first rotary servo motor, a first moving assembly, a plurality of first docking elements, a plurality of first electrical connection modules, a second wire storage ring, a second tension sensing module, a second revolution plate, a second rotary servo motor, a second moving assembly, a plurality of second docking elements, a plurality of second electrical connection modules, a rotating shaft, an optical fiber winding ring, and a control module.Type: ApplicationFiled: January 7, 2023Publication date: April 4, 2024Inventors: CHING-LU HSIEH, SHIH-JU FAN, HUNG-PIN CHUNG
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Publication number: 20240105444Abstract: Methods for reducing contact resistance include performing a selective titanium silicide (TiSi) deposition process on a middle of the line (MOL) contact structure that includes a cavity in a substrate of dielectric material. The contact structure also includes a silicon-based connection portion at a bottom of the cavity. The selective TiSi deposition process is selective to silicon-based material over dielectric material. The methods also include performing a selective deposition process of a metal material on the MOL contact structure. The selective deposition process is selective to TiSi material over dielectric material and forms a silicide capping layer on the silicon-based connection portion. The methods further include performing a seed layer deposition process of the metal material on the contact structure.Type: ApplicationFiled: April 26, 2023Publication date: March 28, 2024Inventors: Jiang LU, Liqi WU, Wei DOU, Weifeng YE, Shih Chung CHEN, Rongjun WANG, Xianmin TANG, Yiyang WAN, Shumao ZHANG, Jianqiu GUO
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Publication number: 20240096961Abstract: A contact stack of a semiconductor device includes a source/drain feature, a silicide layer wrapping around the source/drain feature, a seed metal layer in direct contact with the silicide layer, and a conductor in contact with the seed metal layer. The contact stack excludes a metal nitride layer in direct contact with the silicide layer.Type: ApplicationFiled: November 28, 2023Publication date: March 21, 2024Inventors: Shih-Chuan CHIU, Tien-Lu LIN, Yu-Ming LIN, Chia-Hao CHANG, Chih-Hao WANG, Jia-Chuan YOU
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Publication number: 20240096811Abstract: The present disclosure provides a package structure and a method of manufacturing a package. The package structure includes a semiconductor die laterally encapsulated by an encapsulant, a redistribution structure and bumps. The redistribution structure is disposed on the semiconductor die and the encapsulant, and is electrically connected with the at least one semiconductor die. The bumps are disposed on the redistribution structure. The redistribution structure includes dielectric layers and metallic pattern layers sandwiched between the dielectric layers. The redistribution structure includes metallic pads on an outermost dielectric layer of the dielectric layers, and the outmost dielectric layer has undercut cavities beside the metallic pads.Type: ApplicationFiled: January 11, 2023Publication date: March 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuan-Chung Lu, Bo-Tao Chen, An-Jhih Su, Ming-Shih Yeh, Der-Chyang Yeh
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Publication number: 20240071330Abstract: A display device includes a display panel. The display panel has a functional display area. The functional display area includes a plurality of display pixels and a plurality of light transmitting regions. The plurality of display pixels are around by the plurality of the light transmitting regions. A boundary between one of the plurality of display pixels and one of the plurality of light transmitting regions comprises an arc segment.Type: ApplicationFiled: November 3, 2023Publication date: February 29, 2024Applicant: Innolux CorporationInventors: Chia-Hao Tsai, Ming-Jou Tai, Yi-Shiuan Cherng, Yu-Shih Tsou, You-Cheng Lu, Yung-Hsun Wu
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Patent number: 11581441Abstract: A semiconductor device includes a substrate, a tunneling oxide layer, a floating gate, an isolation layer and a control gate. The tunneling oxide layer is over the substrate. The floating gate is over the tunneling oxide layer. The isolation layer covers a top of the floating gate and peripherally encloses the tunneling oxide layer and the floating gate. The control gate is over a top of the isolation layer.Type: GrantFiled: October 23, 2020Date of Patent: February 14, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shih-Lu Hsu, Ping-Pang Hsieh, Szu-Hsien Lu, Yu-Chu Lin
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Publication number: 20220367242Abstract: A semiconductor device may include a source on a first side of a gate. The semiconductor device may include a drain on a second side of the gate, where the second side of the gate is opposite to the first side of the gate. The semiconductor device may include a first contact over the source. The semiconductor device may include a second contact over the drain. The semiconductor device may include an air gap over the gate between at least the first contact and the second contact. The semiconductor device may include at least two dielectric materials in each of a region between the air gap and the first contact and a region between the air gap and the second contact.Type: ApplicationFiled: July 27, 2022Publication date: November 17, 2022Inventors: Gulbagh SINGH, Tsung-Han TSAI, Shih-Lu HSU, Kun-Tsang CHUANG
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Patent number: 11476157Abstract: A semiconductor device may include a source on a first side of a gate. The semiconductor device may include a drain on a second side of the gate, where the second side of the gate is opposite to the first side of the gate. The semiconductor device may include a first contact over the source. The semiconductor device may include a second contact over the drain. The semiconductor device may include an air gap over the gate between at least the first contact and the second contact. The semiconductor device may include at least two dielectric materials in each of a region between the air gap and the first contact and a region between the air gap and the second contact.Type: GrantFiled: January 7, 2021Date of Patent: October 18, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Gulbagh Singh, Tsung-Han Tsai, Shih-Lu Hsu, Kun-Tsang Chuang
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Publication number: 20220216095Abstract: A semiconductor device may include a source on a first side of a gate. The semiconductor device may include a drain on a second side of the gate, where the second side of the gate is opposite to the first side of the gate. The semiconductor device may include a first contact over the source. The semiconductor device may include a second contact over the drain. The semiconductor device may include an air gap over the gate between at least the first contact and the second contact. The semiconductor device may include at least two dielectric materials in each of a region between the air gap and the first contact and a region between the air gap and the second contact.Type: ApplicationFiled: January 7, 2021Publication date: July 7, 2022Inventors: Gulbagh SINGH, Tsung-Han TSAI, Shih-Lu HSU, Kun-Tsang CHUANG
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Patent number: 10978462Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a gate stack and a conductive layer over a semiconductor substrate. The method includes forming a negative photoresist layer to cover the gate stack and a first portion of the conductive layer over the isolation structure and expose a second portion of the conductive layer. The method includes forming a mask layer over the negative photoresist layer and the conductive layer. The mask layer has trenches over the second portion of the conductive layer and an edge portion of the negative photoresist layer, and a thickness of the edge portion decreases in a direction away from the gate stack.Type: GrantFiled: October 24, 2019Date of Patent: April 13, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ching-Yen Hsaio, Cheng-Ming Wu, Shih-Lu Hsu, Chien-Hsian Wang
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Publication number: 20210043774Abstract: A semiconductor device includes a substrate, a tunneling oxide layer, a floating gate, an isolation layer and a control gate. The tunneling oxide layer is over the substrate. The floating gate is over the tunneling oxide layer. The isolation layer covers a top of the floating gate and peripherally encloses the tunneling oxide layer and the floating gate. The control gate is over a top of the isolation layer.Type: ApplicationFiled: October 23, 2020Publication date: February 11, 2021Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shih-Lu HSU, Ping-Pang HSIEH, Szu-Hsien LU, Yu-Chu LIN
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Patent number: 10818804Abstract: A semiconductor device includes a substrate, a tunneling oxide layer, a floating gate, an isolation layer and a control gate. The tunneling oxide layer is disposed on the substrate. The floating gate is disposed on the tunneling oxide layer. The isolation layer covers a top of the floating gate and peripherally encloses the tunneling oxide layer and the floating gate. The control gate is disposed over a top of the isolation layer.Type: GrantFiled: October 28, 2015Date of Patent: October 27, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shih-Lu Hsu, Ping-Pang Hsieh, Szu-Hsien Lu, Yu-Chu Lin
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Publication number: 20200058661Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a gate stack and a conductive layer over a semiconductor substrate. The method includes forming a negative photoresist layer to cover the gate stack and a first portion of the conductive layer over the isolation structure and expose a second portion of the conductive layer. The method includes forming a mask layer over the negative photoresist layer and the conductive layer. The mask layer has trenches over the second portion of the conductive layer and an edge portion of the negative photoresist layer, and a thickness of the edge portion decreases in a direction away from the gate stack.Type: ApplicationFiled: October 24, 2019Publication date: February 20, 2020Applicant: Taiwan Semiconductor Manufacturing Co., LtdInventors: Ching-Yen HSAIO, Cheng-Ming WU, Shih-Lu HSU, Chien-Hsian WANG
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Patent number: 10568175Abstract: A light control system comprises a power connecting port, a host connecting port, a first light connecting port, a second light connecting port, a microcontroller and a power distribution unit. The power connecting port electrically connects to an external power source to provide the power to drive a plurality of light devices. The host connecting port is configured to receive a multimedia signal from a host. The first light connecting port and the second light connecting port electrically connect to a first light device and a second light device respectively. The microcontroller is configured to identify device types and generate two dimming signals according to configurations corresponding to the device types and the multimedia signal. The power distribution unit converts the two dimming signals to two driving signals for controlling the first light device and the second light device to emit colored lights associated with the multimedia signals.Type: GrantFiled: May 25, 2018Date of Patent: February 18, 2020Assignee: COOLER MASTER TECHNOLOGY INC.Inventors: Chien-Lung Chen, Pu-Shih Lu, Kuei-Yun Feng
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Patent number: 10461088Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a gate stack and a conductive layer over a semiconductor substrate. The semiconductor substrate has a first region and a second region isolated from each other by an isolation structure in the semiconductor substrate. The gate stack is formed over the first region. The method includes forming a negative photoresist layer over the first region and a first portion of the conductive layer over the isolation structure to cover the gate stack. The method includes forming a mask layer over the negative photoresist layer and the conductive layer. The mask layer has trenches over a second portion of the conductive layer. The method includes removing the second portion through the trenches. The method includes removing the mask layer. The method includes removing the negative photoresist layer.Type: GrantFiled: March 30, 2018Date of Patent: October 29, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ching-Yen Hsaio, Cheng-Ming Wu, Shih-Lu Hsu, Chien-Hsian Wang
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Patent number: 10283604Abstract: A method of fabricating semiconductor device includes forming a plurality of gate structures on a semiconductor substrate. A first inter layer dielectric layer is deposited on the gate structures. A first contact plug is formed in the first inter layer dielectric layer in between every two immediately adjacent gate structures. An etch stop layer is deposited on the first inter layer dielectric layer. A second inter layer dielectric layer is deposited on the first inter layer dielectric layer. A second contact plug is formed in the second inter layer dielectric layer aligning with the first contact plug. A metal layer is deposited overlying the second inter layer dielectric layer and the second contact plug.Type: GrantFiled: July 31, 2015Date of Patent: May 7, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Szu-Hsien Lu, Hung-Che Liao, Kun-Tsang Chuang, Shih-Lu Hsu, Yu-Chu Lin, Jyun-Guan Jhou
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Publication number: 20180368230Abstract: A light control system comprises a power connecting port, a host connecting port, a first light connecting port, a second light connecting port, a microcontroller and a power distribution unit. The power connecting port electrically connects to an external power source to provide the power to drive a plurality of light devices. The host connecting port is configured to receive a multimedia signal from a host. The first light connecting port and the second light connecting port electrically connect to a first light device and a second light device respectively. The microcontroller is configured to identify device types and generate two dimming signals according to configurations corresponding to the device types and the multimedia signal. The power distribution unit converts the two dimming signals to two driving signals for controlling the first light device and the second light device to emit colored lights associated with the multimedia signals.Type: ApplicationFiled: May 25, 2018Publication date: December 20, 2018Applicant: COOLER MASTER TECHNOLOGY INC.Inventors: Chien-Lung CHEN, Pu-Shih LU, Kuei-Yun FENG
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Patent number: 10141401Abstract: A method for forming a semiconductor device structure is provided. The method includes performing a first plasma etching process on a substrate to form a first trench in the substrate. The method includes removing a second portion of the substrate under the bottom surface to form a second trench under and connected to the first trench. The second trench surrounds a third portion of the substrate under the first portion. The third portion has a first sidewall. The first sidewall is inclined relative to the top surface at a second angle, and the first angle is greater than the second angle. The method includes forming an isolation structure in the first trench and the second trench. The method includes forming a gate insulating layer over the top surface and the first inclined surface. The method includes forming a gate over the gate insulating layer and the isolation structure.Type: GrantFiled: May 26, 2017Date of Patent: November 27, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shih-Lu Hsu, Ping-Pang Hsieh, Yu-Chu Lin, Jyun-Guan Jhou
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Publication number: 20180226419Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a gate stack and a conductive layer over a semiconductor substrate. The semiconductor substrate has a first region and a second region isolated from each other by an isolation structure in the semiconductor substrate. The gate stack is formed over the first region. The method includes forming a negative photoresist layer over the first region and a first portion of the conductive layer over the isolation structure to cover the gate stack. The method includes forming a mask layer over the negative photoresist layer and the conductive layer. The mask layer has trenches over a second portion of the conductive layer. The method includes removing the second portion through the trenches. The method includes removing the mask layer. The method includes removing the negative photoresist layer.Type: ApplicationFiled: March 30, 2018Publication date: August 9, 2018Applicant: Taiwan Semiconductor Manufacturing Co., LtdInventors: Ching-Yen HSAIO, Cheng-Ming WU, Shih-Lu HSU, Chien-Hsian WANG
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Patent number: 9941294Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate. The semiconductor device structure includes a first gate stack over the semiconductor substrate. The first gate stack includes a first gate and a second gate over the first gate, and the first gate and the second gate are electrically isolated from each other. The semiconductor device structure includes a ring structure surrounding the first gate stack. The ring structure is made of a conductive material.Type: GrantFiled: August 21, 2015Date of Patent: April 10, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ching-Yen Hsaio, Cheng-Ming Wu, Shih-Lu Hsu, Chien-Hsian Wang