Abstract: An installing module includes a seat bracket, a plurality of lower gaskets, a device bracket and an upper gasket. The seat bracket includes a first locking plate and a second locking plate locked to each other. The first locking plate includes a first concave and the second locking plate includes a second concave corresponding to the first concave. The lower gaskets are respectively disposed on the first concave and the second concave. The lower gaskets face each other and jointly define a lower assembly hole and are disposed on a lower side of a head-support fixer of a car seat. The device bracket is locked to the seat bracket and an electronic device is pivotally coupled to the device bracket. The upper gasket is disposed between the device bracket and the head-support fixer, and the head-support fixer is clamped between the upper gasket and the lower gaskets.

Abstract: Aspects of the present disclosure provide a method for regulating an integration current of a sensing amplifier. The sensing amplifier includes a first input transistor and a second input transistor, wherein a source of the first input transistor and a source of the second input transistor are coupled to a source node. The method includes pulling a current from or sourcing the current to the source node, measuring the integration current, comparing the measured integration current with a reference signal, and adjusting the current pulled from or sourced to the source node based on the comparison.

Abstract: A receiving apparatus includes a terminating network for a three-wire serial bus and a feedback circuit. Each wire of the three-wire serial bus may be coupled through a resistance to a common node of the terminating network. The feedback circuit has a first amplifier circuit having an input coupled to the common node, a comparator that receives an output of the first amplifier circuit as a first input and a reference voltage as a second input, and a second amplifier circuit responsive to an output of the comparator and configured to inject a current through the common node.

Abstract: Aspects of the present disclosure provide a method for regulating an integration current of a sensing amplifier. The sensing amplifier includes a first input transistor and a second input transistor, wherein a source of the first input transistor and a source of the second input transistor are coupled to a source node. The method includes pulling a current from or sourcing the current to the source node, measuring the integration current, comparing the measured integration current with a reference signal, and adjusting the current pulled from or sourced to the source node based on the comparison.

Abstract: Methods, apparatus, and systems provide improved throughput on a communication link. An apparatus has a plurality of line drivers, a first wire state encoder configured to receive a first symbol in a sequence of symbols when a 3-wire link is in a first signaling state, and to define a second signaling state for the 3-wire link based on the first symbol and the first signaling state, a second wire state encoder configured to receive a second symbol in the sequence of symbols, and to define a third signaling state for the 3-wire link based on the second symbol and the second signaling state. The first symbol immediately precedes the second symbol in the sequence of symbols. The 3-wire link transitions from the first to the second signaling state, and from the second to the third signaling state in consecutive transmission intervals.

Abstract: A receiving apparatus includes a terminating network for a three-wire serial bus and a feedback circuit. Each wire of the three-wire serial bus may be coupled through a resistance to a common node of the terminating network. The feedback circuit has a first amplifier circuit having an input coupled to the common node, a comparator that receives an output of the first amplifier circuit as a first input and a reference voltage as a second input, and a second amplifier circuit responsive to an output of the comparator and configured to inject a current through the common node.

Abstract: A cobalt electroplating composition may include (a) cobalt ions; and (b) an ammonium compound of formula (NR1R2R3H+)nXn?, wherein R1, R2, R3 are independently H or linear or branched C1 to C6 alkyl, X is one or more n valent inorganic or organic counter ion(s), and n is an integer from 1, 2, or 3.

Abstract: A balancing pressure bearing apparatus including a connecting base and bearing components is provided. Inside the connecting base is any material selected from a volume-incompressibe fluid, semifluid and elastic element, and arranged thereabove is each bearing component. The bearing components have bearing surfaces for supporting any pressing-down human body part and pressure reduction. When the connecting base is pressed down, a Pascal phenomenon is generated for a pressure applied to the fluid, semifluid or elastic element inside the connecting base to be transmitted equally in all directions. Each portion thereof has the same pressure for balancing pressure of the supportive bearing surfaces pressed by any two human body parts, thereby reducing and balancing pressures thereon to achieve a more comfortable contact sensation of pressure release and a correct posture effect. Hence, the invention can serve as a cushion, seat, backrest, mattress or pillow product.

Abstract: A balancing pressure bearing apparatus including a connecting base and bearing components is provided. Inside the connecting base is any material selected from a volume-incompressibe fluid, semifluid and elastic element, and arranged thereabove is each bearing component. The bearing components have bearing surfaces for supporting any pressing-down human body part and pressure reduction. When the connecting base is pressed down, a Pascal phenomenon is generated for a pressure applied to the fluid, semifluid or elastic element inside the connecting base to be transmitted equally in all directions. Each portion thereof has the same pressure for balancing pressure of the supportive bearing surfaces pressed by any two human body parts, thereby reducing and balancing pressures thereon to achieve a more comfortable contact sensation of pressure release and a correct posture effect. Hence, the invention can serve as a cushion, seat, backrest, mattress or pillow product.

Abstract: Methods, apparatus, and systems for communication over a multi-wire, multi-phase interface are disclosed. A clock recovery method includes generating a combination signal that includes transition pulses, each transition pulse being generated responsive to a transition in a difference signal representative of a difference in signaling state of a pair of wires in a three-wire bus. The combination signal is provided to a logic circuit that is configured to provide a clock signal as its output, where pulses in the combination signal cause the clock signal to be driven to a first state. The logic circuit receives a reset signal that is derived from the clock signal by delaying transitions to the first state while passing transitions from the first state without added delay. The clock signal is driven from the first state after passing a transition of the clock signal to the first state.

Abstract: Methods, apparatus, and systems provide improved throughput on a communication link. An apparatus has a plurality of line drivers, a first wire state encoder configured to receive a first symbol in a sequence of symbols when a 3-wire link is in a first signaling state, and to define a second signaling state for the 3-wire link based on the first symbol and the first signaling state, a second wire state encoder configured to receive a second symbol in the sequence of symbols, and to define a third signaling state for the 3-wire link based on the second symbol and the second signaling state. The first symbol immediately precedes the second symbol in the sequence of symbols. The 3-wire link transitions from the first to the second signaling state, and from the second to the third signaling state in consecutive transmission intervals.

Abstract: Methods, apparatus, and systems for clock and data recovery in a C-PHY interface are disclosed. A receiving device has a plurality of differential receivers and a recovery circuit. The differential receivers are configured to generate difference signals. Each difference signal is representative of voltage difference between one pair of wires in a three-wire serial bus. The recovery circuit is configured to identify a first difference signal that has the greatest voltage magnitude among the plurality of difference signals in a first unit interval and determine signaling state of the three-wire serial bus for the first unit interval based on identity of the pair of wires corresponding to the first difference signal and polarity of the first difference signal in the first unit interval, and to generate a first edge in a clock signal responsive to a transition in the first difference signal during the first unit interval.

Abstract: Methods, apparatus, and systems provide improved throughput on a communication link. An apparatus has a plurality of line drivers, a first wire state encoder configured to receive a first symbol in a sequence of symbols when a 3-wire link is in a first signaling state, and to define a second signaling state for the 3-wire link based on the first symbol and the first signaling state, a second wire state encoder configured to receive a second symbol in the sequence of symbols, and to define a third signaling state for the 3-wire link based on the second symbol and the second signaling state. The first symbol immediately precedes the second symbol in the sequence of symbols. The 3-wire link transitions from the first to the second signaling state, and from the second to the third signaling state in consecutive transmission intervals.

Abstract: Methods, apparatus, and systems for communication over a multi-wire, multi-phase interface are disclosed. A clock recovery method includes generating a combination signal that includes transition pulses, each transition pulse being generated responsive to a transition in a difference signal representative of a difference in signaling state of a pair of wires in a three-wire bus. The combination signal is provided to a logic circuit that is configured to provide a clock signal as its output, where pulses in the combination signal cause the clock signal to be driven to a first state. The logic circuit receives a reset signal that is derived from the clock signal by delaying transitions to the first state while passing transitions from the first state without added delay. The clock signal is driven from the first state after passing a transition of the clock signal to the first state.

Abstract: A seat has a base, two seat cushions disposed above the base, and two supporting members mounted on the seat cushions and connected to the base. Each one of the supporting members has multiple supporting elements. Each one of the supporting elements has a guiding rod and a spring. The guiding rod is mounted on the base and is screwed into a corresponding one of the seat cushions. The spring is disposed around the guiding rod. Two ends of the spring abut against the base and the corresponding one of the two seat cushions. In use, the spring can generate different degrees of compression and provide different degrees of supporting force. Deviation of the spring is limited by the guiding rod to avoid excess of the deviation and ensure sufficient support. The seat has both the support and the cushioning performance to improve sitting comfort.

Abstract: In certain aspects, a device comprises one or more IO inputs; a first receiver coupled to a first supply voltage and the one or more IO inputs, wherein the first receiver comprises thick oxide transistors; and a high-speed circuit comprising: an isolation block coupled to the one or more IO inputs, wherein the isolation block comprises thick oxide transistors; and a second receiver coupled to the isolation block and a second supply voltage, wherein the second receiver comprises thin oxide transistors.

Abstract: Methods, apparatus, and systems for communication over a multi-wire, multi-phase interface are disclosed. A clock recovery method includes generating a combination signal that includes transition pulses, each transition pulse being generated responsive to a transition in a difference signal representative of a difference in signaling state of a pair of wires in a three-wire bus. The combination signal is provided to a logic circuit that is configured to provide a clock signal as its output, where pulses in the combination signal cause the clock signal to be driven to a first state. The logic circuit receives a reset signal that is derived from the clock signal by delaying transitions to the first state while passing transitions from the first state without added delay. The clock signal is driven from the first state after passing a transition of the clock signal to the first state.

Abstract: Methods, apparatus, and systems for communication over a multi-wire, multi-phase interface are disclosed. A clock recovery apparatus has a plurality of pulse generating circuits, a logic circuit and a delay flipflop. Each pulse generating circuit generates transition pulses in response to transitions in one of three difference signals representative of a difference in signaling state of a pair of wires in a three-wire bus. Transitions in the difference signals can occur at boundaries between sequentially-transmitted symbols. The first logic circuit may provide a single pulse in a combination signal at each boundary between pairs of symbols by combining one or more transition pulses. The delay flipflop is configured to respond to each pulse in the combination signal by changing signaling state of a clock signal that is output by the clock recovery apparatus. The symbols may be sequentially transmitted over the three-wire bus in accordance with a C-PHY protocol.

Abstract: Methods, apparatus, and systems for communication over a multi-wire, multiphase interface are disclosed. A clock recovery apparatus has a plurality of pulse generating circuits, a logic circuit and a delay flipflop. Each pulse generating circuit generates transition pulses in response to transitions in one of three difference signals representative of a difference in signaling state of a pair of wires in a three-wire bus. Transitions in the difference signals can occur at boundaries between sequentially-transmitted symbols. The first logic circuit may provide a single pulse in a combination signal at each boundary between pairs of symbols by combining one or more transition pulses. The delay flipflop is configured to respond to each pulse in the combination signal by changing signaling state of a clock signal that is output by the clock recovery apparatus. The symbols may be sequentially transmitted over the three-wire bus in accordance with a C-PHY protocol.

Abstract: System, methods and apparatus are described that support multimode operation of a data communication interface. An apparatus includes a physical layer interface coupled to a serial bus and configurable for a high-speed mode of communication and a low-speed mode of communication, and a rate detector configured to receive a clock signal from the serial bus, and to use a reference clock to determine a unit interval representative of a data rate of the serial bus. The apparatus may also include interval calculation logic configured to determine an interval related to timing of a data signal transmitted on the serial bus, the interval having a duration expressed as a number of cycles of the reference clock. The physical layer interface may be configured to use the interval to capture data in the data signal.