Patents by Inventor Shih-Yen Lin

Shih-Yen Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10867835
    Abstract: A method and structure for packaging a semiconductor device are provided. In an embodiment a first substrate is bonded to a second substrate, which is bonded to a third substrate. A thermal interface material is placed on the second substrate prior to application of an underfill material. A ring can be placed on the thermal interface material, and an underfill material is dispensed between the second substrate and the third substrate. By placing the thermal interface material and ring prior to the underfill material, the underfill material cannot interfere with the interface between the thermal interface material and the second substrate, and the thermal interface material and ring can act as a physical barrier to the underfill material, thereby preventing overflow.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Lin Ho, Chin-Liang Chen, Wei-Ting Lin, Yu-Chih Liu, Shih-Yen Lin
  • Patent number: 10784351
    Abstract: A method of fabricating a semiconductor device having two dimensional (2D) lateral hetero-structures includes forming alternating regions of a first metal dichalcogenide film and a second metal dichalcogenide film extending along a surface of a first substrate. The first metal dichalcogenide and the second metal dichalcogenide films are different metal dichalcogenides. Each second metal dichalcogenide film region is bordered on opposing lateral sides by a region of the first metal dichalcogenide film, as seen in cross-sectional view.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: September 22, 2020
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yen Lin, Si-Chen Lee, Samuel C. Pan, Kuan-Chao Chen
  • Publication number: 20200266059
    Abstract: A method of fabricating a semiconductor device includes plasma etching a portion of a plurality of metal dichalcogenide films comprising a compound of a metal and a chalcogen disposed on a substrate by applying a plasma to the plurality of metal dichalcogenide films. After plasma etching, a chalcogen is applied to remaining portions of the plurality of metal dichalcogenide films to repair damage to the remaining portions of the plurality of metal dichalcogenide films from the plasma etching. The chalcogen is S, Se, or Te.
    Type: Application
    Filed: April 27, 2020
    Publication date: August 20, 2020
    Inventors: Shih-Yen LIN, Kuan-Chao CHEN, Si-Chen LEE, Samuel C. PAN
  • Publication number: 20200194258
    Abstract: The current disclosure describes semiconductor devices, e.g., transistors, include a substrate, a semiconductor region including, at the surface, MoS2 and/or other monolayer material over the substrate, and a terminal structure at least partially over the semiconductor region, which includes a different monolayer material grown directly over the semiconductor region.
    Type: Application
    Filed: December 12, 2019
    Publication date: June 18, 2020
    Inventors: Shih-Yen Lin, Hsuan-An Chen, Si-Chen Lee
  • Patent number: 10636652
    Abstract: A method of fabricating a semiconductor device includes plasma etching a portion of a plurality of metal dichalcogenide films comprising a compound of a metal and a chalcogen disposed on a substrate by applying a plasma to the plurality of metal dichalcogenide films. After plasma etching, a chalcogen is applied to remaining portions of the plurality of metal dichalcogenide films to repair damage to the remaining portions of the plurality of metal dichalcogenide films from the plasma etching. The chalcogen is S, Se, or Te.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: April 28, 2020
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yen Lin, Kuan-Chao Chen, Si-Chen Lee, Samuel C. Pan
  • Patent number: 10541132
    Abstract: The current disclosure describes semiconductor devices, e.g., transistors, include a substrate, a semiconductor region including, at the surface, MoS2 and/or other monolayer material over the substrate, and a terminal structure at least partially over the semiconductor region, which includes a different monolayer material grown directly over the semiconductor region.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: January 21, 2020
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yen Lin, Hsuan-An Chen, Si-Chen Lee
  • Publication number: 20200006541
    Abstract: The current disclosure describes semiconductor devices, e.g., transistors, including a substrate, a semiconductor region including, at the surface, monolayer MoS2 and/or other monolayer material over the substrate, and a terminal structure over the semiconductor region, which includes a different monolayer material grown directly over the semiconductor region.
    Type: Application
    Filed: December 28, 2018
    Publication date: January 2, 2020
    Inventors: Shih-Yen Lin, Hsuan-An Chen
  • Publication number: 20190378715
    Abstract: The current disclosure describes semiconductor devices, e.g., transistors, include a substrate, a semiconductor region including, at the surface, MoS2 and/or other monolayer material over the substrate, and a terminal structure at least partially over the semiconductor region, which includes a different monolayer material grown directly over the semiconductor region.
    Type: Application
    Filed: June 11, 2018
    Publication date: December 12, 2019
    Inventors: Shih-Yen Lin, Hsuan-An Chen, Si-Chen Lee
  • Patent number: 10505052
    Abstract: A semiconductor device includes a first film disposed over a semiconductor substrate, the first film comprising a first transition metal dichalcogenide; a second film disposed over the first film, the second film comprising a second transition metal dichalcogenide different from the first transition metal dichalcogenide; source and drain features formed over the second film; a first gate stack formed over the second film and interposed between the source and drain features; and a second gate stack formed over the semiconductor substrate opposite from the first gate stack such that the semiconductor substrate is between the first and second gate stacks.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: December 10, 2019
    Assignees: Taiwan Semiconductor Manufacturing Co., Ltd., National Taiwan University
    Inventors: Shih-Yen Lin, Chi-Wen Liu, Chong-Rong Wu, Xiang-Rui Chang
  • Publication number: 20190319101
    Abstract: A semiconductor device and method of formation are provided. The semiconductor device includes a substrate, a first active area over the substrate, a second active area over the substrate, a graphene channel between the first active area and the second active area, and a first in-plane gate. In some embodiments, the graphene channel, the first in-plane gate, the first active area, and the second active area include graphene. A method of forming the first in-plane gate, the first active area, the second active area, and the graphene channel from a single layer of graphene is also provided.
    Type: Application
    Filed: April 22, 2019
    Publication date: October 17, 2019
    Inventors: Meng-Yu Lin, Shih-Yen Lin, Si-Chen Lee
  • Patent number: 10403744
    Abstract: A method for manufacturing a semiconductor device comprising two-dimensional (2D) materials may include: epitaxially forming a first two-dimensional (2D) material layer over a substrate; calculating a mean thickness of the first 2D material layer; comparing the mean thickness of the first 2D material layer with a reference parameter; determining that the mean thickness of the first 2D material layer is not substantially equal to the reference parameter; and after the determining, epitaxially forming a second 2D material layer over the first 2D material layer.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: September 3, 2019
    Assignees: Taiwan Semiconductor Manufacturing Company, Ltd., National Taiwan University
    Inventors: Shih-Yen Lin, Samuel C. Pan, Chong-Rong Wu, Xian-Rui Chang
  • Publication number: 20190237328
    Abstract: A method of fabricating a semiconductor device includes plasma etching a portion of a plurality of metal dichalcogenide films comprising a compound of a metal and a chalcogen disposed on a substrate by applying a plasma to the plurality of metal dichalcogenide films. After plasma etching, a chalcogen is applied to remaining portions of the plurality of metal dichalcogenide films to repair damage to the remaining portions of the plurality of metal dichalcogenide films from the plasma etching. The chalcogen is S, Se, or Te.
    Type: Application
    Filed: April 12, 2019
    Publication date: August 1, 2019
    Inventors: Shih-Yen LIN, Kuan-Chao CHEN, Si-Chen LEE, Samuel C. PAN
  • Publication number: 20190139817
    Abstract: A method and structure for packaging a semiconductor device are provided. In an embodiment a first substrate is bonded to a second substrate, which is bonded to a third substrate. A thermal interface material is placed on the second substrate prior to application of an underfill material. A ring can be placed on the thermal interface material, and an underfill material is dispensed between the second substrate and the third substrate. By placing the thermal interface material and ring prior to the underfill material, the underfill material cannot interfere with the interface between the thermal interface material and the second substrate, and the thermal interface material and ring can act as a physical barrier to the underfill material, thereby preventing overflow.
    Type: Application
    Filed: December 17, 2018
    Publication date: May 9, 2019
    Inventors: Kuan-Lin Ho, Chin-Liang Chen, Wei-Ting Lin, Yu-Chih Liu, Shih-Yen Lin
  • Publication number: 20190123211
    Abstract: A semiconductor device includes a first film disposed over a semiconductor substrate, the first film comprising a first transition metal dichalcogenide; a second film disposed over the first film, the second film comprising a second transition metal dichalcogenide different from the first transition metal dichalcogenide; source and drain features formed over the second film; a first gate stack formed over the second film and interposed between the source and drain features; and a second gate stack formed over the semiconductor substrate opposite from the first gate stack such that the semiconductor substrate is between the first and second gate stacks.
    Type: Application
    Filed: December 19, 2018
    Publication date: April 25, 2019
    Inventors: Shih-Yen Lin, Chi-Wen Liu, Chong-Rong Wu, Xiang-Rui Chang
  • Publication number: 20190122946
    Abstract: Disclosed herein is a device having a shaped seal ring comprising a workpiece, the workpiece comprising at least one dielectric layer disposed on a first side of a substrate, a seal ring disposed in the at least one dielectric layer, and at least one groove in the seal ring. A lid is disposed over the workpiece, the workpiece extending into a recess in the lid and a first thermal interface material (TIM) contacts the seal ring and the lid, with the first TIM extending into the at least one groove. The workpiece is mounted to the package carrier. A die is mounted over a first side of workpiece and disposed in the recess. A first underfill a disposed under the die and a second underfill is disposed between the workpiece and the package carrier. The first TIM is disposed between the first underfill and the second underfill.
    Type: Application
    Filed: December 20, 2018
    Publication date: April 25, 2019
    Inventors: Shih-Yen Lin, Yu-Chih Liu, Chin-Liang Chen, Wei-Ting Lin, Kuan-Lin Ho
  • Patent number: 10269902
    Abstract: A semiconductor device and method of formation are provided. The semiconductor device includes a substrate, a first active area over the substrate, a second active area over the substrate, a graphene channel between the first active area and the second active area, and a first in-plane gate. In some embodiments, the graphene channel, the first in-plane gate, the first active area, and the second active area include graphene. A method of forming the first in-plane gate, the first active area, the second active area, and the graphene channel from a single layer of graphene is also provided.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Meng-Yu Lin, Shih-Yen Lin, Si-Chen Lee
  • Patent number: 10269564
    Abstract: A method of fabricating a semiconductor device includes plasma etching a portion of a plurality of metal dichalcogenide films comprising a compound of a metal and a chalcogen disposed on a substrate by applying a plasma to the plurality of metal dichalcogenide films. After plasma etching, a chalcogen is applied to remaining portions of the plurality of metal dichalcogenide films to repair damage to the remaining portions of the plurality of metal dichalcogenide films from the plasma etching. The chalcogen is S, Se, or Te.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: April 23, 2019
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yen Lin, Kuan-Chao Chen, Si-Chen Lee, Samuel C. Pan
  • Patent number: 10269668
    Abstract: Disclosed herein is a device having a shaped seal ring comprising a workpiece, the workpiece comprising at least one dielectric layer disposed on a first side of a substrate, a seal ring disposed in the at least one dielectric layer, and at least one groove in the seal ring. A lid is disposed over the workpiece, the workpiece extending into a recess in the lid and a first thermal interface material (TIM) contacts the seal ring and the lid, with the first TIM extending into the at least one groove. The workpiece is mounted to the package carrier. A die is mounted over a first side of workpiece and disposed in the recess. A first underfill a disposed under the die and a second underfill is disposed between the workpiece and the package carrier. The first TIM is disposed between the first underfill and the second underfill.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yen Lin, Yu-Chih Liu, Chin-Liang Chen, Wei-Ting Lin, Kuan-Lin Ho
  • Patent number: 10164122
    Abstract: A method includes depositing a first transition metal film having a first transition metal on a substrate and performing a first sulfurization process to the first transition metal film, thereby forming a first transition metal sulfide film. The method further includes depositing a second transition metal film having a second transition metal on the first transition metal sulfide film and performing a second sulfurization process to the second transition metal film, thereby forming a second transition metal sulfide film. The first and the second transition metals are different. The method further includes forming a gate stack, and source and drain features over the second transition metal sulfide film. The gate stack is interposed between the source and drain features. The gate stack, source and drain features, the first transition metal sulfide film and the second transition metal sulfide film are configured to function as a hetero-structure transistor.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yen Lin, Chi-Wen Liu, Chong-Rong Wu, Xiang-Rui Chang
  • Patent number: 10157772
    Abstract: A method and structure for packaging a semiconductor device are provided. In an embodiment a first substrate is bonded to a second substrate, which is bonded to a third substrate. A thermal interface material is placed on the second substrate prior to application of an underfill material. A ring can be placed on the thermal interface material, and an underfill material is dispensed between the second substrate and the third substrate. By placing the thermal interface material and ring prior to the underfill material, the underfill material cannot interfere with the interface between the thermal interface material and the second substrate, and the thermal interface material and ring can act as a physical barrier to the underfill material, thereby preventing overflow.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: December 18, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Lin Ho, Chin-Liang Chen, Wei-Ting Lin, Yu-Chih Liu, Shih-Yen Lin