Patents by Inventor Shih-Yuan Wang

Shih-Yuan Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978773
    Abstract: A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes a stack of channel structures over a base structure. The semiconductor device structure also includes a first epitaxial structure and a second epitaxial structure sandwiching the channel structures. The semiconductor device structure further includes a gate stack wrapped around each of the channel structures and a backside conductive contact connected to the second epitaxial structure. A first portion of the backside conductive contact is directly below the base structure, and a second portion of the backside conductive contact extends upwards to approach a bottom surface of the second epitaxial structure. In addition, the semiconductor device structure includes an insulating spacer between a sidewall of the base structure and the backside conductive contact.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Shih-Chuan Chiu, Cheng-Chi Chuang, Chih-Hao Wang
  • Patent number: 11968817
    Abstract: A semiconductor device includes a fin structure. A source/drain region is formed on the fin structure. A first gate structure is disposed over the fin structure. A source/drain contact is disposed over the source/drain region. The source/drain contact has a protruding segment that protrudes at least partially over the first gate structure. The source/drain contact electrically couples together the source/drain region and the first gate structure.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jui-Lin Chen, Chao-Yuan Chang, Ping-Wei Wang, Fu-Kai Yang, Ting Fang, I-Wen Wu, Shih-Hao Lin
  • Patent number: 11955515
    Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Chuan Chiu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang, Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Yu-Ming Lin
  • Patent number: 11929434
    Abstract: A switch device includes a P-type substrate, a first gate structure, a first N-well, a shallow trench isolation structure, a first P-well, a second gate structure, a first N-type doped region, a second P-well, and a second N-type doped region. The first N-well is formed in the P-type substrate and partly under the first gate structure. The shallow trench isolation structure is formed in the first N-well and under the first gate structure. The first P-well is formed in the P-type substrate and under the first gate structure. The first N-type doped region is formed in the P-type substrate and between the first gate structure and the second gate structure. The second P-well is formed in the P-type substrate and under the second gate structure. The second N-type doped region is formed in the second P-well and partly under the second gate structure.
    Type: Grant
    Filed: April 15, 2022
    Date of Patent: March 12, 2024
    Assignee: eMemory Technology Inc.
    Inventors: Chih-Hsin Chen, Shih-Chen Wang, Tsung-Mu Lai, Wen-Hao Ching, Chun-Yuan Lo, Wei-Chen Chang
  • Publication number: 20240063317
    Abstract: Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.
    Type: Application
    Filed: October 30, 2023
    Publication date: February 22, 2024
    Inventors: Shih-Yuan WANG, Shih-Ping WANG
  • Patent number: 11830954
    Abstract: Microstructures of micro and/or nano holes on one or more surfaces enhance photodetector optical sensitivity. Arrangements such as a CMOS Image Sensor (CIS) as an imaging LIDAR using a high speed photodetector array wafer of Si, Ge, a Ge alloy on SI and/or Si on Ge on Si, and a wafer of CMOS Logic Processor (CLP) ib Si fi signal amplification, processing and/or transmission can be stacked for electrical interaction. The wafers can be fabricated separately and then stacked or can be regions of the same monolithic chip. The image can be a time-of-flight image. Bayer arrays can be enhanced with microstructure holes. Pixels can be photodiodes, avalanche photodiodes, single photon avalanche photodiodes and phototransistors on the same array and can be Ge or Si pixels. The array can be of high speed photodetectors with data rates of 56 Gigabits per second, Gbps, or more per photodetector.
    Type: Grant
    Filed: October 26, 2022
    Date of Patent: November 28, 2023
    Assignee: W&WSens Devices Inc.
    Inventors: Shih-Yuan Wang, Shih-Ping Wang
  • Publication number: 20230354620
    Abstract: Resistive RAM (RRAM) devices having increased reliability and related manufacturing methods are described in combination with stacked technology with CMOS ASIC wafters. Greater reliability of RRAM cells over time can be achieved by avoiding direct contact of metal electrodes with the device switching layer. Stacking technology can be used to address incompatibility of ReRAM processing and CMOS ASICs processing.
    Type: Application
    Filed: September 13, 2021
    Publication date: November 2, 2023
    Inventors: Shih-Yuan WANG, Shih-Ping WANG
  • Patent number: 11791432
    Abstract: Lateral and vertical microstructure enhanced photodetectors and avalanche photodetectors are monolithically integrated with CMOS/BiCMOS ASICs and can also be integrated with laser devices using fluidic assembly techniques. Photodetectors can be configured in a vertical PIN arrangement or lateral metal-semiconductor-metal arrangement where electrodes are in an inter-digitated pattern. Microstructures, such as holes and protrusions, can improve quantum efficiency in silicon, germanium and III-V materials and can also reduce avalanche voltages for avalanche photodiodes. Applications include optical communications within and between datacenters, telecommunications, LIDAR, and free space data communication.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: October 17, 2023
    Assignee: W&WSens Devices, Inc.
    Inventors: Shih-Yuan Wang, Shih-Ping Wang
  • Publication number: 20230215962
    Abstract: Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.
    Type: Application
    Filed: February 23, 2023
    Publication date: July 6, 2023
    Inventors: Shih-Yuan WANG, Shih-Ping WANG
  • Publication number: 20230146424
    Abstract: The present invention discloses an automatic cement plastering and rendering system configured on a machine with a slurry supply apparatus and a robot, wherein the system comprises at least one image capture device, a storage, and a processor. Said processer is coupled to the at least one image capture device and the storage, and communicatively connected with the machine.
    Type: Application
    Filed: January 26, 2022
    Publication date: May 11, 2023
    Inventors: YU-TING SHENG, SHIH-YUAN WANG
  • Patent number: 11621360
    Abstract: Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: April 4, 2023
    Assignee: W&W Sens Devices, Inc.
    Inventors: Shih-Yuan Wang, Shih-Ping Wang
  • Publication number: 20230082683
    Abstract: An indirect operating system is suitable for a mobile electronic device to remotely operate a controlled device, and allows the mobile electronic device, after scanning a device barcode of the controlled device, to obtain a corresponding set of user operation pages from a background device and display it on a remote control interface shown by the mobile electronic device, and then, the mobile electronic device converts the user's operation on the user operation page(s) into a control barcode or a driving packet with identification information of the controlled device. Through the driving packet or control barcode, the controlled device can obtain the user's input information and operate according to the input information.
    Type: Application
    Filed: September 12, 2022
    Publication date: March 16, 2023
    Inventors: Zheng-Yao WANG, Geeng-Jen SHEU, Chien-Yi CHEN, Min-Syong HUANG, Shih-Yuan WANG
  • Publication number: 20230054279
    Abstract: Microstructures of micro and/or nano holes on one or more surfaces enhance photodetector optical sensitivity. Arrangements such as a CMOS Image Sensor (CIS) as an imaging LIDAR using a high speed photodetector array wafer of Si, Ge, a Ge alloy on SI and/or Si on Ge on Si, and a wafer of CMOS Logic Processor (CLP) ib Si fi signal amplification, processing and/or transmission can be stacked for electrical interaction. The wafers can be fabricated separately and then stacked or can be regions of the same monolithic chip. The image can be a time-of-flight image. Bayer arrays can be enhanced with microstructure holes. Pixels can be photodiodes, avalanche photodiodes, single photon avalanche photodiodes and phototransistors on the same array and can be Ge or Si pixels. The array can be of high speed photodetectors with data rates of 56 Gigabits per second, Gbps, or more per photodetector.
    Type: Application
    Filed: October 26, 2022
    Publication date: February 23, 2023
    Inventors: Shih-Yuan WANG, Shih-Ping Wang
  • Patent number: 11409860
    Abstract: A system enables a content creator to upload the content onto the server and set rules and conditions for the access and retrieval. The content is downloaded to a portable storage medium, the content will be encrypted for display at a particular destination device. When the content is loaded on the destination device, the destination device will check if the content is loaded on the correct destination device by checking the information of the destination device attached to the content against the device information stored on the destination device.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: August 9, 2022
    Assignee: Equalearning Corp.
    Inventor: Shih-Yuan Wang
  • Publication number: 20220246775
    Abstract: Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.
    Type: Application
    Filed: March 29, 2022
    Publication date: August 4, 2022
    Inventors: Shih-Yuan WANG, Shih-Ping WANG
  • Publication number: 20220149098
    Abstract: Microstructure enhanced photodector arrangements uses a CMOS image sensor (CIS) wafer of crystalline Si and a CMOS Logic Processor (CLP) wafer stacked on each other for electrical interaction. The wafers can be fabricated separately and stacked or can be regions of the same monolithic chip. The image can be a time-of-flight image. Bayer arrays are enhanced with microstructure holes. Avalanche photodiodes, single photon avalanche photodiodes and phototransistors can be laterally and/or vertically doped. Photodetectors/photosensors can have slanted sidewalls for improved optical confinement and reduced crosstalk.
    Type: Application
    Filed: September 21, 2020
    Publication date: May 12, 2022
    Inventors: Shih-Yuan WANG, Shih-Ping Wang
  • Patent number: 11309444
    Abstract: Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: April 19, 2022
    Assignee: W&W Sens Devices, Inc.
    Inventors: Shih-Yuan Wang, Shih-Ping Wang
  • Publication number: 20220102563
    Abstract: Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.
    Type: Application
    Filed: November 22, 2021
    Publication date: March 31, 2022
    Inventors: Shih-Yuan WANG, Shih-Ping WANG
  • Publication number: 20210365540
    Abstract: A system enables a content creator to upload the content onto the server and set rules and conditions for the access and retrieval. The content is downloaded to a portable storage medium, the content will be encrypted for display at a particular destination device. When the content is loaded on the destination device, the destination device will check if the content is loaded on the correct destination device by checking the information of the destination device attached to the content against the device information stored on the destination device.
    Type: Application
    Filed: May 21, 2020
    Publication date: November 25, 2021
    Inventor: Shih-Yuan Wang
  • Patent number: 11121271
    Abstract: Lateral and vertical microstructure enhanced photodetectors and avalanche photodetectors are monolithically integrated with CMOS/BiCMOS ASICs and can also be integrated with laser devices using fluidic assembly techniques. Photodetectors can be configured in a vertical PIN arrangement or lateral metal-semiconductor-metal arrangement where electrodes are in an inter-digitated pattern. Microstructures, such as holes and protrusions, can improve quantum efficiency in silicon, germanium and III-V materials and can also reduce avalanche voltages for avalanche photodiodes. Applications include optical communications within and between datacenters, telecommunications, LIDAR, and free space data communication.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: September 14, 2021
    Assignee: W&WSens, Devices, Inc.
    Inventors: Shih-Yuan Wang, Shih-Ping Wang