STORAGE CONTROL DEVICE HAVING CONTROLLER OPERATED ACCORDING TO DETECTION SIGNAL DERIVED FROM MONITORING POWER SIGNAL AND RELATED METHOD THEREOF

Abstract

One exemplary storage control device for a storage medium includes a controller and a voltage detector, where the controller controls data access of the storage medium, and the voltage detector monitors a power signal and asserts a detection signal to notify the controller when anomaly of the power signal is detected. Another exemplary storage control device for a storage medium includes a voltage detector and a controller, where the voltage detector monitors a power signal to generate a detection signal, and the controller controls data access of the storage medium. In addition, the controller enters a first operational state when the detection signal indicates that a voltage level of the power signal falls within a first voltage range, and enters a second operational state when the detection signal indicates that the voltage level of the power signal falls within a second voltage range.

Description

CROSS REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of U.S. Provisional Application No. 61/221,569, filed on Jun. 30, 2009 and included herein by reference.

BACKGROUND

The present invention is related to accessing a storage medium, and more particularly, to a storage control device having a controller operated according to a detection signal derived from monitoring a power signal and related method thereof.

In general, the supply power of a storage subsystem is provided by a host which also issues read and write requests to the storage subsystem for reading data from and writing data into the storage subsystem. A power signal derived from the externally supplied power is inputted to internal power elements of the storage subsystem. Therefore, anomaly of the power signal might severely damage the data storage of the storage subsystem.

Taking one storage subsystem which uses a non-volatile memory (e.g., a flash memory) as a storage medium for example, a table, such as a flash translation layer (FTL) table, used to translate logical addresses of the host into physical addresses of the non-volatile memory is usually temporarily saved in a volatile memory (e.g., a dynamic random access memory) of the storage subsystem due to performance consideration. However, anomaly of the power signal used by the storage subsystem might damage the integrality of the table stored in the volatile memory, leading to loss of user data.

Taking another storage subsystem which uses an optical disc as a storage medium for example, the recording (encoding) and reading (decoding) qualities of the storage subsystem are deeply dominated by the power stability. Therefore, anomaly of the power signal used by the storage subsystem (e.g., an optical disc drive) might severely degrade the data access performance. In addition, the anomaly of the power signal might even damage the optical disc when the storage subsystem is operating under a write mode for emitting a laser beam with an unstable write power upon the optical disc.

SUMMARY

In accordance with embodiments of the present invention, a storage control device having a controller operated according to a detection signal derived from monitoring a power signal and related method thereof are proposed to solve the problems mentioned above.

According to a first aspect of the present invention, an exemplary storage control device for a storage medium is disclosed. The exemplary storage control device includes: a controller, for controlling data access of the storage medium; and a voltage detector, coupled to the controller, for monitoring a power signal and for asserting a detection signal to notify the controller when anomaly of the power signal is detected.

According to a second aspect of the present invention, an exemplary storage control device for a storage medium is disclosed. The exemplary storage control device includes: a voltage detector, for monitoring a power signal to generate a detection signal; and a controller, coupled to the voltage detector, for controlling data access of the storage medium, where the controller enters a first operational state when the detection signal indicates that a voltage level of the power signal falls within a first voltage range, and the controller enters a second operational state different from the first operational state when the detection signal indicates that the voltage level of the power signal falls within a second voltage range different from the first voltage range.

According to a third aspect of the present invention, an exemplary method applied to a controller utilized for controlling data access of a storage medium is disclosed. The exemplary method includes: monitoring a power signal to detect anomaly therein; and notifying the controller when the anomaly of the power signal is detected.

According to a fourth aspect of the present invention, an exemplary method applied to a controller utilized for controlling data access of a storage medium is disclosed. The exemplary method includes: monitoring a power signal; when a voltage level of the power signal falls within a first voltage range, operating the controller under a first operational state; and when the voltage level of the power signal falls within a second voltage range different from the first voltage range, operating the controller under a second operational state different from the first operational state.

These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram illustrating a first embodiment of a storage subsystem according to the present invention.

FIG. 2 is a circuit diagram illustrating one exemplary implementation of a voltage detector shown in FIG. 1.

FIG. 3 is a diagram illustrating the relation between a detection signal and a power signal.

FIG. 4 is a diagram illustrating one exemplary controller chip having a voltage detector and a controller disposed therein.

FIG. 5 is a diagram illustrating a second embodiment of a storage subsystem according to the present invention.

FIG. 6 is a diagram illustrating another exemplary controller chip having a voltage detector and a controller disposed therein.

FIG. 7 is a flowchart of a generalized control method of a controller in a storage subsystem according to an embodiment of the present invention.

DETAILED DESCRIPTION

Certain terms are used throughout the description and following claims to refer to particular components. As one skilled in the art will appreciate, manufacturers may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms “include” and “comprise” are used in an open-ended fashion, and thus should be interpreted to mean “include, but not limited to . . . ”. Also, the term “couple” is intended to mean either an indirect or direct electrical connection. Accordingly, if one device is coupled to another device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections.

The conception of the present invention is to monitor a power signal to detect anomaly therein and to inform a controller of a storage subsystem when anomaly of the power signal is detected. In this way, the controller of the storage subsystem is capable of taking appropriate action upon receiving the power anomaly notification. For clarity, several exemplary embodiments are given as follows.

FIG. 1 is a diagram illustrating a first embodiment of a storage subsystem according to the present invention. The exemplary storage subsystem 100 includes, but is not limited to, a storage control device 102, a first storage medium 104, and a regulator 106, where the storage control device 102 includes a controller 108, a voltage detector 110, and a second storage medium 112. By way of example, but not limitation, the first storage medium 104 may be a non-volatile storage medium, such as a flash memory, the second storage medium 112 may be a volatile storage medium, such as a dynamic random access memory (DRAM), and the controller 108 is a flash memory controller. The regulator 106 receives external supply power P_ext from a host 116, and accordingly generates a power signal P_in for powering other elements included in the storage subsystem 100. The controller 108 communicates with the host 116 via a host interface 114, and is employed for controlling data access (reading/recording) of the first storage medium 104. For example, when the controller 108 receives a read request from the host 116, the controller 108 serves the read request by reading stored data from the first storage medium 104 and transmitting the readout data to the host 116. Additionally, when the controller 108 receives a write request and data to be recorded from the host 116, the controller 108 serves the write request by recording the received data into the first storage medium 104.

The voltage detector 110 is coupled to the controller 108, and devised for monitoring a power status of the storage subsystem 100. In this exemplary embodiment, the voltage detector 110 identifies the instant power status of the storage subsystem 100 by monitoring the power signal P_in generated from the regulator 106 (i.e., a power signal received by the controller 108). The voltage detector 110 will output a detection signal SD to notify the controller 108 when anomaly of the power signal P_in is detected and will not output the detection signal SD when anomaly of the power signal P_in is not detected.

FIG. 2 is a circuit diagram illustrating one exemplary implementation of the voltage detector 110 shown in FIG. 1. The voltage detector 110 includes a voltage divider 202, a voltage generator 204 and a comparator 206. The voltage divider 202 divides a voltage level V_in of the power signal P_in according to resistance values of the resistors R1 and R2, and generates a monitored voltage V_M to the comparator 206. The monitored voltage V_M can be simply expressed as follows:

$V_M=V_{\mathrm{in}}·\frac{R2}{R1+R2}.$

The voltage generator 204 is used to provide a supply-independent reference voltage V_REF to the comparator 206. The comparator 206 compares the monitored voltage V_M with the reference voltage V_REF to assert/deassert the detection signal SD. For example, when the monitored voltage V_M is found lower than the reference voltage V_REF, implying that the voltage level V_in is lower than a predetermined threshold V_TH (not shown), the comparator 206 generates a logic-high output to thereby assert the detection signal SD. However, when the monitored voltage V_M is found higher than the reference voltage V_REF, implying that the voltage level V_in is higher than the predetermined threshold V_TH, the comparator 206 generates a logic-low output to thereby deassert the detection signal SD. In this way, the detection signal SD can be used to indicate whether the voltage level V_in of the power signal P_in is within a first voltage range (e.g., V_TH<V_in≦V_R, where V_R represents a regular voltage level of the power signal P_in) or a second voltage range (e.g., 0<V_in<V_TH).

In above example, the occurrence of power anomaly is detected by the voltage detector 110 when the voltage level V_in of the power signal P_in is found lower than the predetermined threshold V_TH. However, in an alternative design of the voltage detector 110, the occurrence of power anomaly is detected when the voltage level V_in of the power signal P_in is found greater than the predetermined threshold V_TH. This also obeys the spirit of the present invention.

The controller 108 refers to the detection signal SD for switching its operational state to a normal state or an anomaly-power state. FIG. 3 is a diagram illustrating the relation between the detection signal SD and the power signal P_in. As can be seen from the figure, the controller 108 operates in the normal state before the voltage level V_in of the power signal P_in is lower than the predetermined threshold V_TH. When the voltage level V_in of the power signal P_in goes below the predetermined threshold V_TH, the voltage detector 110 determines that the anomaly of the power signal P_in is detected and asserts the detection signal SD to notify the controller 108. Therefore, the controller 108 leaves the normal state and enters the anomaly-power state upon receiving the detection signal SD asserted by the voltage detector 110. When the voltage level V_in of the power signal P_in increases to exceed the predetermined threshold V_TH after the detection signal SD is asserted, the voltage detector 110 determines that the anomaly of the power signal P_in is not detected and deasserts the detection signal SD accordingly. Therefore, the controller 108 leaves the anomaly-power state and enters the normal state again when notified by the detection signal SD deasserted by the voltage detector 110.

In this embodiment, in order to avoid the loss of data stored in the storage subsystem 100 due to power anomaly, the controller 108 further takes predetermined action in response to the detection signal SD asserted by the voltage detector 110. For example, the second storage medium 112 acting as a buffer may be implemented by a volatile storage medium. Therefore, system information (e.g., a table TB utilized for translating logical addresses of the host 116 to physical addresses of the first storage medium 104) and user data DATA_U (e.g., data waiting to be recorded into the first storage medium 104 or readout data waiting to be delivered to the host 116) will be buffered in the second storage medium 112 for achieving better performance. In a case where the first storage medium 104 is a flash memory, the table TB is an FTL table of the flash memory. The predetermined action taken by the controller 108 may include recording a backup of the data stored in the second storage medium 112 into the first storage medium 104 and/or rejecting requests, such as read requests or write requests, issued by the host 116 for accessing the first storage medium 104. The backup of the data stored into the second storage medium 112 may include the table TB and/or the user data DATA_U.

In addition, provided that the first storage medium 104 contains at least a first storage region SR_1 and a second storage region SR_2 with different inherent access speeds, the backup of the data stored in the second storage medium 112 will be stored into one storage region with faster access speed, say, the first storage region SR_1. By way of example, but not limitation, the first storage medium 104 may be implemented by a flash memory having a first page group and a second page group within the same block, where the program time of each page included in the first page group is shorter than that of each page included in the second page group. Therefore, the backup of the data stored in the second storage medium 112 will be stored into page(s) selected from the first page group.

As shown in FIG. 1, the voltage detector 110 and the controller 108 are individual elements within the storage subsystem 100. However, the voltage detector 110 may be embedded in the controller 108 to form a single element. Please refer to FIG. 4, which is a diagram illustrating a controller chip 400 having the voltage detector 110 and the controller 108 disposed therein. Therefore, the controller chip 400 will have functionalities of the voltage detector 110 and the controller 108, and can be employed in the storage subsystem 100 shown in FIG. 1. Such an alternative storage subsystem design also obeys the spirit of the present invention.

FIG. 5 is a diagram illustrating a second embodiment of a storage subsystem according to the present invention. The storage subsystem 500 includes, but is not limited to, a storage control device 502, a storage medium 504, the aforementioned regulator 106, and an access mechanism 506. The storage control device 502 includes a controller 508 and the aforementioned voltage detector 110. The regulator 106 receives supply power P_ext from the host 116, and accordingly generates the power signal P_in for powering other elements included in the storage subsystem 100. The controller 508 communicates with the host 116 via the host interface 114, and is employed for controlling data access of the storage medium 104. The major difference between the storage subsystems 100 and 500 is that the controller 508 is unable to access the storage medium 504 directly. For example, mechanical means is required to access the storage medium 504. The controller 508 therefore reads data from or writes data into the storage medium 504 by means of the access mechanism 506. In this exemplary embodiment, the storage medium 104 is an optical storage medium (e.g., an optical disc), and the access mechanism 506 includes an optical pick-up unit (OPU) 510 and a servo system 512. However, this is for illustrative purposes only. Any well-known architecture can be employed to realize the access mechanism 506 used for accessing an optical storage medium. In addition, as a person skilled in the optical storage field can readily understand details of recording data onto and reading data from the optical storage medium, further description of the access mechanism 506 is omitted here for brevity.

As mentioned above, the voltage detector 110 is capable of monitoring a power status of a storage subsystem, and informs the controller 508 of the instant power status of the storage subsystem. In this exemplary embodiment, the voltage detector 110 monitors the power signal P_in generated from the regulator 106 (i.e., the power signal P_in received by the controller 508). Similarly, the voltage detector 110 will assert the detection signal SD to notify the controller 508 when anomaly of the power signal P_in is detected. As details of the voltage detector 110 have been described in above paragraphs, further description is omitted here for brevity.

Similar to the controller 108 shown in FIG. 1, the controller 508 receives the detection signal SD from the voltage detector 110, and switches its operational state to a normal state or an anomaly-power state according to the detection signal SD, as shown in FIG. 3. In this embodiment, in order to improve the data access performance of the storage subsystem 500 and/or prevent the storage medium (e.g., an optical disc) 504 from being damaged due to power anomaly, the controller 508 further takes predetermined action in response to the detection signal SD asserted by the voltage detector 110. For example, the predetermined action taken by the controller 508 may include lowering a processing speed of requests for accessing the storage medium 504 (e.g., lowering the recording (encoding) or reading (decoding) speed to reduce the overall system power consumption), suspending a current data access of the storage medium 504 (e.g., suspending the recording process in case the optical disc is damaged because of irregular write power), and/or rejecting requests, such as read requests or write requests, issued by the host 116 for accessing the first storage medium 504.

As shown in FIG. 5, the voltage detector 110 and the controller 508 are individual elements within the storage subsystem 500. However, the voltage detector 110 may be embedded in the controller 508 to form a single element. Please refer to FIG. 6, which is a diagram illustrating a controller chip 600 having the voltage detector 110 and the controller 508 disposed therein. Therefore, the controller chip 600 will have functionalities of the voltage detector 110 and the controller 508, and can be employed in the storage subsystem 500 shown in FIG. 1. Such an alternative storage subsystem design also obeys the spirit of the present invention.

It should be noted that the storage medium 104 may be a magnetic storage medium such as a hard disk, and the access mechanism 506 may contain elements required to access the magnetic storage medium. Such an application also falls within the scope of the present invention.

FIG. 7 is a flowchart of a generalized control method of a controller in a storage subsystem according to an embodiment of the present invention. Provided that the result is substantially the same, the steps are not required to be executed in the exact order shown in FIG. 7. The generalized control method may be employed to control operations of either of the exemplary controllers 108 and 508, and includes the following steps.

Step 700: Start.

Step 702: The controller enters a first operational state (e.g., a normal state) to control data access of a storage medium (e.g., a non-volatile storage medium).

Step 704: The voltage detector monitors a power signal to detect anomaly therein and generates a detection signal accordingly, where the detection signal is asserted when the anomaly of the power signal is detected, and deasserted when the anomaly of the power signal is not detected.

Step 706: The controller receives the detection signal, and checks the logic level of the detection signal. If the detection signal is asserted to indicate the occurrence of power anomaly, the flow goes to step 708; if the detection signal is deasserted to indicate that no power anomaly occurs, the flow proceeds with step 702.

Step 708: The controller enters a second operational state (e.g., an anomaly-power state) to take predetermined action. The flow goes to step 706.

As a person skilled in the art can readily understand details of each step in FIG. 7 after reading above paragraphs directed to the exemplary storage subsystems 100 and 500, further description is omitted here for brevity.

Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.

Claims

1. A storage control device for a first storage medium, comprising:

a controller, for controlling data access of the first storage medium; and

a voltage detector, coupled to the controller, for monitoring a power signal and for asserting a detection signal to notify the controller when anomaly of the power signal is detected.

2. The storage control device of claim 1, wherein the controller further takes predetermined action in response to the anomaly of the power signal when notified by the detection signal.

3. The storage control device of claim 2, wherein the storage control device further comprises:

a second storage medium, coupled to the controller, for storing data accessible to the controller;

wherein the predetermined action includes recording a backup of the data stored in the second storage medium into the first storage medium.

4. The storage control device of claim 3, wherein the backup of the data stored in the second storage medium includes a table utilized for translating logical addresses of a host into physical addresses of the first storage medium.

5. The storage control device of claim 3, wherein the backup of the data stored in the second storage medium includes user data.

6. The storage control device of claim 3, wherein the first storage medium comprises a first storage region and a second storage region, where an inherent access speed of the first storage region is faster than an inherent access speed of the second storage region; and the backup of the data stored in the second storage medium is stored into the first storage region.

7. The storage control device of claim 2, wherein the predetermined action includes lowering a processing speed of requests for accessing the first storage medium.

8. The storage control device of claim 2, wherein the predetermined action includes suspending a current data access of the first storage medium.

9. The storage control device of claim 2, wherein the controller communicates with a host via a host interface, and the predetermined action includes rejecting requests issued by the host for accessing the first storage medium.

10. The storage system of claim 1, wherein after asserting the detection signal, the voltage detector further deasserts the detection signal when the anomaly of the power signal is not detected.

11. The storage control device of claim 1, wherein when a voltage level of the monitored power signal is lower than a predetermined threshold, the voltage detector determines that the anomaly of the power signal is detected.

12. The storage control device of claim 1, wherein the controller and the voltage detector are integrated in a controller chip.

13. The storage control device of claim 1, wherein the first storage medium is a non-volatile storage medium.

14. The storage control device of claim 13, wherein the non-volatile storage medium is a non-volatile memory or an optical storage medium.

15. A storage control device for a first storage medium, comprising:

a voltage detector, for monitoring a power signal to generate a detection signal; and

a controller, coupled to the voltage detector, for controlling data access of the first storage medium, wherein the controller enters a first operational state when the detection signal indicates that a voltage level of the power signal falls within a first voltage range, and the controller enters a second operational state different from the first operational state when the detection signal indicates that the voltage level of the power signal falls within a second voltage range different from the first voltage range.

16. The storage control device of claim 15, wherein the storage control device further comprises:

a second storage medium, coupled to the controller, for storing data accessible to the controller;

wherein when the controller operates under the second operational state, the controller records a backup of the data stored in the second storage medium into the first storage medium.

17. The storage control device of claim 16, wherein the backup of the data stored in the second storage medium includes a table utilized for translating logical addresses of a host to physical addresses of the first storage medium.

18. The storage control device of claim 16, wherein the backup of the data stored in the second storage medium includes user data.

19. The storage control device of claim 16, wherein the first storage medium comprises a first storage region and a second storage region, where an inherent access speed of the first storage region is faster than an inherent access speed of the second storage region; and the backup of the data stored in the second storage medium is stored into the first storage region.

20. The storage control device of claim 15, wherein when the controller operates under the second operational state, the controller lowers a processing speed of requests for accessing the first storage medium.

21. The storage control device of claim 15, wherein when the controller operates under the second operational state, the controller suspends a current data access of the first storage medium.

22. The storage control device of claim 15, wherein the controller communicates with a host via a host interface; and when the controller operates under the second operational state, the controller rejects requests issued by the host for accessing the first storage medium.

23. The storage control device of claim 15, wherein the controller and the voltage detector are integrated in a controller chip.

24. The storage control device of claim 15, wherein the first storage medium is a non-volatile storage medium.

25. The storage control device of claim 24, wherein the non-volatile storage medium is a non-volatile memory or an optical storage medium.

26. A control method of a controller utilized for controlling data access of a storage medium, comprising:

monitoring a power signal to detect anomaly therein; and

notifying the controller when the anomaly of the power signal is detected.

27. A control method of a controller utilized for controlling data access of a storage medium, comprising:

monitoring a power signal;

when a voltage level of the power signal falls within a first voltage range, operating the controller under a first operational state; and

when the voltage level of the power signal falls within a second voltage range different from the first voltage range, operating the controller under a second operational state different from the first operational state.