Patents by Inventor Shin Wu
Shin Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140313466Abstract: A pixel structure including a scan line, a data line, an active device, a pixel electrode, a capacitor electrode line, a semi-conductive pattern layer and at least one dielectric layer is provided. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The capacitor electrode line is located under the pixel electrode. A first storage capacitor is formed between the capacitor electrode line and the pixel electrode. The semi-conductive pattern layer is disposed between the capacitor electrode line and the pixel electrode, the pixel electrode is electrically connected to the semi-conductive pattern layer. A second storage capacitor is formed between the semi-conductive pattern layer and the capacitor electrode line. The dielectric layer is disposed between the capacitor electrode line and the pixel electrode and located between the semi-conductive pattern layer and the capacitor electrode line.Type: ApplicationFiled: July 1, 2014Publication date: October 23, 2014Inventors: Hsiao-Wei Cheng, Sung-Hui Lin, Ming-Yung Huang, Pin-Miao Liu, Wen-Shin Wu, Chun-Yao Huang, Wei-Sheng Yu
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Patent number: 8828767Abstract: The disclosure discloses a fabrication method for a light absorption layer of a solar cell, including: forming a precursor film on a substrate, wherein the precursor film includes the Group IB-IIB-IVA-VIA amorphous nanoparticles; and conducting a thermal process to the precursor film to form the light absorption layer on the substrate.Type: GrantFiled: August 31, 2012Date of Patent: September 9, 2014Assignee: Industrial Technology Research InstituteInventors: Tsung-Shin Wu, Shih-Hsiung Wu, Hung-Chun Pan, Lung-Teng Cheng, Yu-Yun Wang
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Patent number: 8804059Abstract: A pixel structure including a scan line, a data line, an active device, a pixel electrode, a capacitor electrode line, a semi-conductive pattern layer and at least one dielectric layer is provided. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The capacitor electrode line is located under the pixel electrode. A first storage capacitor is formed between the capacitor electrode line and the pixel electrode. The semi-conductive pattern layer is disposed between the capacitor electrode line and the pixel electrode, the pixel electrode is electrically connected to the semi-conductive pattern layer. A second storage capacitor is formed between the semi-conductive pattern layer and the capacitor electrode line. The dielectric layer is disposed between the capacitor electrode line and the pixel electrode and located between the semi-conductive pattern layer and the capacitor electrode line.Type: GrantFiled: February 11, 2011Date of Patent: August 12, 2014Assignee: Au Optronics CorporationInventors: Hsiao-Wei Cheng, Sung-Hui Lin, Ming-Yung Huang, Pin-Miao Liu, Wen-Shin Wu, Chun-Yao Huang, Wei-Sheng Yu
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Publication number: 20140179048Abstract: A method for preparing an absorbing layer of a solar cell includes the following steps. An absorbing layer precursor containing at least one group XIV element is loaded on a substrate. A solid vapor source containing a group XIV element, the same as the group XIV element in the absorbing layer precursor is provided. The solid vapor source corresponds to the absorbing layer precursor. The solid vapor source and the absorbing layer precursor are kept apart by a distance. A heating process is performed so that the absorbing layer precursor forms an absorbing layer, the solid vapor source is vaporized and generates a gas containing the group XIV element, and the gas containing the group XIV element inhibits the effusion of the group XIV element of the absorbing layer precursor so that the proportion of the group XIV element in the formed absorbing layer is consistent.Type: ApplicationFiled: June 3, 2013Publication date: June 26, 2014Inventors: Tzung-Shin Wu, Shih-Hsiung Wu, Yu-Yun Wang, Hung-Ru Hsu, Ho-Min Chen
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Publication number: 20140179053Abstract: A method for fabricating an absorbing layer of a solar cell and a thermal treatment device thereof adapted for forming an absorbing layer on a substrate are disclosed. The method includes the following steps. First, a solid-phase vapor source in a chamber and an absorbing layer precursor on a substrate are maintained by a predetermined distance. The solid-phase vapor source contains tin. The absorbing layer precursor contains copper, zinc, tin and sulfur. The temperature inside the chamber is raised to a forming temperature, so that the absorbing layer precursor forms an absorbing layer on the substrate.Type: ApplicationFiled: December 20, 2013Publication date: June 26, 2014Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Tsung-Shin Wu, Shih-Hsiung Wu, Chia-Wen Chang, Hung-Ru Hsu
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Publication number: 20140161979Abstract: Chemical bath deposition (CBD) apparatuses and fabrication methods for compound thin films are presented. A chemical bath deposition apparatus includes a chemical bath reaction container, a substrate chuck for fixing a substrate arranged face-down toward the bottom of the chemical bath reaction container, multiple solution containers connecting to a reaction solution mixer and further connection to the chemical bath reaction container, and a temperature control system including a first heater controlling the temperature of the chemical bath reaction container, a second heater controlling the temperature of the substrate chuck, and a third heater controlling the temperature of the multiple solution containers.Type: ApplicationFiled: February 10, 2014Publication date: June 12, 2014Applicant: Industrial Technology Research InstituteInventors: Chung-Shin WU, Pei-Sun SHENG, Wei-Tse HSU
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Patent number: 8683942Abstract: Chemical bath deposition (CBD) apparatuses and fabrication methods for compound thin films are presented. A chemical bath deposition apparatus includes a chemical bath reaction container, a substrate chuck for fixing a substrate arranged face-down toward the bottom of the chemical bath reaction container, multiple solution containers connecting to a reaction solution mixer and further connection to the chemical bath reaction container, and a temperature control system including a first heater controlling the temperature of the chemical bath reaction container, a second heater controlling the temperature of the substrate chuck, and a third heater controlling the temperature of the multiple solution containers.Type: GrantFiled: September 24, 2010Date of Patent: April 1, 2014Assignee: Industrial Technology Research InstituteInventors: Chung-Shin Wu, Pei-Sun Sheng, Wei-Tse Hsu
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Patent number: 8558674Abstract: A wireless presentation system includes a first wireless input element, a second wireless input element and a wireless receiving and processing host. A pairing method for use in the wireless presentation system includes the following steps. The wireless receiving and processing host generates a first identification code, and if the first wireless input element is present, issues the first identification code to the first wireless input element for storage, so that a pairing relation therebetween is established by the first identification code. The wireless receiving and processing host automatically generates a second identification code after the first identification code is issued, and if the second wireless input element is present, issues the second identification code to the second wireless input element for storage, so that the pairing relation therebetween is established by the second identification code.Type: GrantFiled: September 10, 2008Date of Patent: October 15, 2013Assignee: Aver Information Inc.Inventors: Christopher Yen, Jiun-Shin Wu, Tzung-Lin Lee, Chen-Hsiang Yu, Mei-Jen Kuo
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Patent number: 8502509Abstract: A power conversion system and power control method for reducing cross regulation effect uses a voltage feedback adjustment circuit to modulate an error signal fed back from an output voltage so as to predict the energy of an output corresponding to its load states. While the energy delivered to an output terminal with its load remaining the same does not change, the energy delivered to an output terminal with its load changing is adjusted accordingly. The power conversion system thus effectively reduces the cross regulation effect and obtains excellent steady system output and transient response.Type: GrantFiled: August 7, 2012Date of Patent: August 6, 2013Assignee: Alpha & Omega Semiconductor, Inc.Inventors: Jean-shin Wu, Ke-Horng Chen
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Publication number: 20130171768Abstract: The disclosure discloses a fabrication method for a light absorption layer of a solar cell, including: forming a precursor film on a substrate, wherein the precursor film includes the Group IB-IIB-IVA-VIA amorphous nanoparticles; and conducting a thermal process to the precursor film to form the light absorption layer on the substrate.Type: ApplicationFiled: August 31, 2012Publication date: July 4, 2013Inventors: Tsung-Shin Wu, Shih-Hsiung Wu, Hung-Chun Pan, Lung-Teng Cheng, Yu-Yun Wang
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Patent number: 8405085Abstract: A thin film transistor includes a gate, a pair of electrodes, a first semiconductor layer disposed between the gate and the pair of electrodes, and a semiconductor stacked layer disposed between the first semiconductor layer and the pair of the electrodes. The semiconductor stacked layer includes a second semiconductor layer disposed adjacent to the pair of electrodes and at least one pair of semiconductor layers including a third semiconductor layer and a fourth semiconductor layer, the third semiconductor layer being sandwiched between the second semiconductor layer and the fourth semiconductor layer. In particular, the electric conductivity of the third semiconductor layer is substantially smaller than the electric conductivity of the second semiconductor layer and the electric conductivity of the fourth semiconductor layer.Type: GrantFiled: December 1, 2010Date of Patent: March 26, 2013Assignee: Au Optronics CorporationInventors: Wen-Shin Wu, Chun-Yao Huang, Hsin-Hua Lin
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Publication number: 20130017322Abstract: An embodiment of the invention provides a method for forming an indium (III) sulfide film, including providing a mixed solution containing a complexing agent, indium ions, and hydrogen sulfide ions; and contacting the mixed solution with a substrate to form an indium (III) sulfide film thereon, wherein the complexing agent has the following formula: wherein each of R1 and R2 respectively is hydrogen or hydroxyl.Type: ApplicationFiled: November 25, 2011Publication date: January 17, 2013Inventors: Chung-Shin WU, Yu-Yun Wang, Pei-Sun Sheng
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Publication number: 20120299567Abstract: A power conversion system and power control method for reducing cross regulation effect uses a voltage feedback adjustment circuit to modulate an error signal fed back from an output voltage so as to predict the energy of an output corresponding to its load states. While the energy delivered to an output terminal with its load remaining the same does not change, the energy delivered to an output terminal with its load changing is adjusted accordingly. The power conversion system thus effectively reduces the cross regulation effect and obtains excellent steady system output and transient response.Type: ApplicationFiled: August 7, 2012Publication date: November 29, 2012Inventors: Jean-Shin Wu, Ke-Horng Chen
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Patent number: 8305054Abstract: An energy control method for a inductive conversion device comprising: determination of individual error of multiple output voltages; determination of peak current based on the errors, determination of total energy through the peak current and charging to at least one inductor according to the peak current, whereas the inductor will store the total energy.Type: GrantFiled: January 13, 2010Date of Patent: November 6, 2012Assignee: Alpha & Omega Semiconductor, Inc.Inventors: Ke-Horng Chen, Jean-Shin Wu, Yu-Nong Tsai, Ming-Yan Fan
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Publication number: 20120223960Abstract: An exemplary image control method is adapted for an image control system including a document camera and a first user device. In the image control method, the document camera generates a first image and provides the first image to the first user device for display. The first user device then produces a control information in response to an operation performed on the first image displayed on the first user device. After that, the first image is transformed into a second image. Finally, the first user device displays the second image.Type: ApplicationFiled: March 1, 2011Publication date: September 6, 2012Applicant: AVERMEDIA INFORMATION, INC.Inventors: KUO-CHIANG CHIANG, MING-CHUNG HUNG, JIUN-SHIN WU
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Patent number: 8258767Abstract: A power conversion system and power control method for reducing cross regulation effect uses a voltage feedback adjustment circuit to modulate an error signal fed back from an output voltage so as to predict the energy of an output corresponding to its load states. While the energy delivered to an output terminal with its load remaining the same does not change, the energy delivered to an output terminal with its load changing is adjusted accordingly. The power conversion system thus effectively reduces the cross regulation effect and obtains excellent steady system output and transient response.Type: GrantFiled: April 30, 2010Date of Patent: September 4, 2012Assignee: Alpha & Omega Semiconductor, Inc.Inventors: Jean-shin Wu, Ke-Horng Chen
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Patent number: 8253176Abstract: A photodiode device and methods of manufacturing the same are provided. The photodiode device comprises a light absorption layer defining a light-facing side and a back-light side; a via passing through the absorption layer, the via defining a side wall and a bottom surface; a conformal isolation layer covering the side wall and the bottom surface; a first patterned conductive layer disposed on the back-light side, the first patterned conductive layer having a first portion covering a first portion of the conformation isolation layer; a second patterned conductive layer disposed on the light-facing side of the absorption layer; and an opening through the conformal isolation layer, wherein the opening is filled with the second patterned conductive layer such that the second patterned conductive layer is connected with the first portion of the first patterned conductive layer.Type: GrantFiled: July 23, 2010Date of Patent: August 28, 2012Assignee: Solapoint CorporationInventors: Chan Shin Wu, Tai-Hui Liu
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Publication number: 20120139043Abstract: A thin film transistor includes a gate, a pair of electrodes, a first semiconductor layer disposed between the gate and the pair of electrodes, and a semiconductor stacked layer disposed between the first semiconductor layer and the pair of the electrodes. The semiconductor stacked layer includes a second semiconductor layer disposed adjacent to the pair of electrodes and at least one pair of semiconductor layers including a third semiconductor layer and a fourth semiconductor layer, the third semiconductor layer being sandwiched between the second semiconductor layer and the fourth semiconductor layer. In particular, the electric conductivity of the third semiconductor layer is substantially smaller than the electric conductivity of the second semiconductor layer and the electric conductivity of the fourth semiconductor layer.Type: ApplicationFiled: December 1, 2010Publication date: June 7, 2012Applicant: AU OPTRONICS CORPORATIONInventors: Wen-Shin Wu, Chun-Yao Huang, Hsin-Hua Lin
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Publication number: 20120092605Abstract: A pixel structure including a scan line, a data line, an active device, a pixel electrode, a capacitor electrode line, a semi-conductive pattern layer and at least one dielectric layer is provided. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The capacitor electrode line is located under the pixel electrode. A first storage capacitor is formed between the capacitor electrode line and the pixel electrode. The semi-conductive pattern layer is disposed between the capacitor electrode line and the pixel electrode, the pixel electrode is electrically connected to the semi-conductive pattern layer. A second storage capacitor is formed between the semi-conductive pattern layer and the capacitor electrode line. The dielectric layer is disposed between the capacitor electrode line and the pixel electrode and located between the semi-conductive pattern layer and the capacitor electrode line.Type: ApplicationFiled: February 11, 2011Publication date: April 19, 2012Applicant: AU OPTRONICS CORPORATIONInventors: Hsiao-Wei Cheng, Sung-Hui Lin, Ming-Yung Huang, Pin-Miao Liu, Wen-Shin Wu, Chun-Yao Huang, Wei-Sheng Yu
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Patent number: 8132028Abstract: A motherboard and a power supply module thereof are disclosed. The power supply module provided by the invention can be directly fixed on a motherboard supporting an AM2 CPU and an AM2+ CPU. The power supply module provided by the invention utilizes a switching unit to switch between a group of pulse width modulation (PWM) signals for generating core voltages needed by an AM2 CPU and another PWM signal for generating a core voltage needed by an AM2+ CPU according to a version signal provided by the CPU of the motherboard. Therefore, no matter a CPU socket of the motherboard receives the AM2 CPU or the AM2+ CPU, the power supply module of the invention can obtain the maximum usage efficiency thereof, and the manufacture cost of motherboard with the power supply module decreases.Type: GrantFiled: June 9, 2008Date of Patent: March 6, 2012Assignee: ASUSTeK Computer Inc.Inventors: Jiang-Shin Wu, En-Li Chen