Abstract: This invention relates generally to methods and computer readable media for upgrading firmware stored in a non-volatile memory, in phases, and restoring firmware in-situ to compensate for failed firmware upgrades. In various embodiments, methods and computer readable media can upgrade and restore the firmware as the non-volatile memory remains functioning. In one embodiment, a method includes designating a first copy of firmware for accessing, and designating a second copy of the firmware for upgrading. The method continues by accessing one or more firmware instructions from the first copy. It also can include upgrading at least a portion of the second copy with at least a portion of new firmware. Upgrading the second copy can be coincident or substantially coincident to accessing the one or more firmware instructions in the first copy.

Abstract: This invention relates to an apparatus, a memory controller and a system for upgrading firmware stored in a non-volatile memory, in phases, and restoring firmware in-situ to compensate for failed firmware upgrades. In various embodiments, the apparatus, memory controller and system can upgrade and restore the firmware as the non-volatile memory remains functioning. In one embodiment, a multi-mode memory controller includes a firmware selector for selecting a first copy of firmware for accessing in a functional mode, and for selecting a second copy of the firmware for upgrading in an upgrade mode. It also can include a phased upgrade controller being configured to access the first copy in the functional mode coincident or substantially coincident to replacing at least a portion of the second copy with at least a portion of an upgrade firmware in the upgrade mode.

Abstract: This invention relates generally to methods and computer readable media for upgrading firmware stored in a non-volatile memory, in phases, and restoring firmware in-situ to compensate for failed firmware upgrades. In various embodiments, methods and computer readable media can upgrade and restore the firmware as the non-volatile memory remains functioning. In one embodiment, a method includes designating a first copy of firmware for accessing, and designating a second copy of the firmware for upgrading. The method continues by accessing one or more firmware instructions from the first copy. It also can include upgrading at least a portion of the second copy with at least a portion of new firmware. Upgrading the second copy can be coincident or substantially coincident to accessing the one or more firmware instructions in the first copy.

Abstract: A transparent system interrupt is invoked by the assertion of an electrical signal at an external pin of a microprocessor CPU chip. Upon assertion of this interrupt, the CPU begins program execution in a dedicated RAM area that is inaccessible both to the operating system and all application programs. A set of instructions, which may be unique to the system in which the CPU chip is installed, services the interrupt. Typically, the state of the CPU and associated components in the system immediately prior to assertion of the interrupt will be saved into the dedicated RAM area by the interrupt service routine. Recovery from the interrupt is accomplished upon recognition of an external event that invokes a RESUME instruction causing the CPU and associated components to be restored to exactly the same state that existed prior to the interrupt and in a manner entirely transparent to any program executing at the time of the interrupt.

Abstract: A transparent system interrupt is invoked by the assertion of an electrical signal at an external pin of a microprocessor CPU chip. Upon assertion of this interrupt, the CPU begins program execution in a dedicated RAM area that is inaccessible both to the operating system and all application programs. A set of instructions, which may be unique to the system in which the CPU chip is installed, services the interrupt. Typically, the state of the CPU and associated components in the system immediately prior to assertion of the interrupt will be saved into the dedicated RAM area by the interrupt service routine. Recovery from the interrupt is accomplished upon recognition of an external event that invokes a RESUME instruction causing the CPU and associated components to be restored to exactly the same state that existed prior to the interrupt and in a manner entirely transparent to any program executing at the time of the interrupt.