Abstract: Novel fluorinated carboxylic acid derivatives of the general formula: ##STR1## wherein R.sup.1 and R.sup.2 are independently selected from substituted or unsubstituted monovalent hydrocarbon groups, Rf is a divalent perfluoroalkyl or perfluoropolyether group, X is a hydrogen atom or triorganosilyl group, and a is equal to 2 or 3 are useful curing catalysts for RTV organopolysiloxane compositions. These fluorinated carboxylic acid derivatives are prepared by effecting hydrosilylation between alkenyl-containing fluorinated carboxylic acid derivatives and hydrosilanes in the presence of catalysts.

Abstract: A complementary semiconductor device having an improved capability of isolating devices comprises a P well 3 and an N well 2 both formed adjacent to each other on a main surface of a substrate 1, an N type impurity layer formed in the P well 8 on the main surface of the substrate, a P type impurity layer formed in the N well 9 on the main surface of the substrate, an N type region formed at the junction of the N well and the P well 71 on the main surface of the substrate, a first shield electrode 52 formed between the N type impurity layer 8 and the N type region 71 on the main surface of the substrate through an insulating film and a second shield electrode 51 formed between the N type region 71 and the P type impurity layer 9 on the main surface of the substrate through an insulating film. The first shield electrode 52 is connected to a potential V.sub.SS and the second shield electrode 51 and the N type region 71 are connected to a potential V.sub.

Abstract: A semiconductor device has MOS field effect transistors isolated by a field shield. The field shield has a gate of conductor layers formed spaced apart from each other on a silicon substrate through an insulating film and with the surface thereof being covered with an insulating film. In regions isolated by the field shield, MOS field effect transistors are formed. Each of the MOS field effect transistors has a gate electrode of a conductor layer formed on the silicon substrate through an insulating film and with the surface thereof being covered with an insulating film. An impurity diffused region is formed in a region on the silicon substrate between the gate electrode and the field shield. A portion on an exposed surface of the impurity diffused region between the field shield and the gate electrode is selectively filled with a tungsten buried layer. The tungsten buried layer is formed, flattened relative to the gate electrode and the gate constituting the field shield.

Abstract: A high load resistance type static random access memory (SRAM) is provided, as an example of a semiconductor device having a high resistance layer. The SRAM includes a semiconductor substrate (1) of a first conductivity type with an impurity diffusion region (3) of second conductivity type selectively formed thereon. An aluminum interconnection layer (8) is formed over the impurity diffusion region (3). Provided between the aluminum interconnection layer (8) and the impurity diffusion region (3) is a double-layer high resistance structure which comprises a nitride layer (63a) formed adjacent the semiconductor substrate (1) and an oxide layer (63b) adjacent the aluminum interconnection layer (8). The impurity diffusion region (3) forms part of a MOS field effect transistor, which is coupled to the high resistance layer (63) to form a flip-flop memory cell.

Abstract: A field effect transistor comprises n type impurity regions formed spaced apart on a P type semiconductor substrate to be the source.multidot.drain regions and a T-shaped gate electrode formed on the region sandwiched by the n type impurity regions with an insulating film interposed therebetween, the gate electrode being formed of upper and lower two layers with the upper layer wider than the lower layer, wherein a n type channel region is formed between the source and the drain when the prescribed voltage is applied to the T-shaped gate electrode.

Abstract: An organosilicon compound having the general formula (I): ##STR1## wherein R.sup.1 represents the methyl group or the ethyl group, R.sup.2 represents an alkyl group having from 1 to 4 carbon atoms, and n represents an integer of from 1 to 3. This compound is useful in preparing room temperature vulcanizable organopolisiloxane compositions which have good storage stability, and release no smelly or corrosive condensation by-product on curing.

Abstract: A process for producing an .alpha., .omega.-hydroxyfluoroalkylpolysiloxane comprising polymerizing a cyclotrisiloxane in the presence of a polymerization catalyst of lithium hydroxide or a lithium salt of a diorganosiloxane, and a promoter of phtalic diorganoester and/or ortho-dialkoxybenzene, and stopping the polymerization by adding a neutralizer is disclosed. This process very easily obtains the .alpha., .omega.-hydroxyfluoroalkylpolysiloxane of a desired viscosity.If a chloroethane of the general formula CHX, CCl X.sub.2 (X is the hydrogen or chlorine atom) is used as the neutralizer, the .alpha., .omega.-hydroxyfluoroalkylpolysiloxane does not exhibit any substantial change of viscosity over time.

Abstract: A semiconductor device includes a substrate (4) in a periphery of which are formed elements isolating regions. A bonding pad (3) is formed above the elements isolating region, with an isolation layer (7) provided therebetween. An underlying layer (12) having a buffering function is formed on a surface of the bonding pad and the semiconductor substrate. In one aspect of the invention, wherein the elements isolating region is formed of LOCOS film (30), the underlying layer is formed between the bonding pad and the LOCOS film. In another aspect of the invention, the elements isolating region is of a field-shield structure (13, 14), and the underlying layer (12) is formed by separating a part of a gate electrode layer (14) of the field shield into an island. The underlying layer buffers the structure against an external force that is applied on the bonding pad in a bonding processing, to thereby prevent generation of cracks in the semiconductor layer.

Abstract: A first conductor for a field shield and a first insulating film are sequentially formed in a predetermined shape on a major surface of a P-type semiconductor substrate through an insulating film. A third insulating film is formed over the semiconductor substrate so as to cover the first conductor and a second insulating film thereon. The third insulating film is anisotropically etched, so that a sidewall insulating film is formed on sidewalls of the first conductor. Second and third conductors respectively serving as gate electrodes of field effect transistors are formed through a fourth insulating film. N-type impurities are implanted into the major surface of the semiconductor substrate utilizing as masks the first insulating film, the sidewall oxide film, the second conductor and the third conductor and are diffused, to form impurity regions.

Abstract: A room temperature-curable organopolysiloxane composition, which is capable of giving a cured silicone rubber having excellent resistance against oils, e.g., automobile engine oil, and little responsible for foaming of the oil contaminated with the silicone rubber, can be prepared by first blending a silanol-terminated dimethyl polysiloxane, an iminoxy-substituted organosilane compound, e.g., vinyl tributanoxime silane, an organotin compound as a catalyst and an inorganic filler. e.g, zinc oxide, to give a uniform mixture and further admixing the uniform mixture with a trimethylsilyl-terminated dimethyl polysiloxane, an alkenyloxy-substituted organosilane compound, e.g., vinyl triisopropenyloxy silane, and a methyl polysiloxane having a network structure of the molecules as consisting of the monofunctional units of the formula (CH.sub.3).sub.3 SiO.sub.0.5 and tetrafunctional units of the formula SiO.sub.2 each in a specified amount.

Abstract: In a content addressable memory (CAM) cell according to the present invention, a pair of non-volatile memory transistors hold data, whereby stored data will not disappear even if power is cut. Conducting terminals of these non-volatile transistors are connected to a bit line pair, so that the stored data can be directly read out from the bit line pair. Further, the invention CAM system converts the value of a current flowing in a match line into a voltage value to perform content reference, and hence the same can be employed as an associative memory system.

Abstract: A semiconductor integrated circuit device having at least one capacitor comprises a first semiconductor layer (9) having a relatively high impurity concentration and a second semiconductor layer (10) formed on said first semiconductor layer and having a relatively low impurity concentration of the same conductivity type as that of said first semiconductor layer. The capacitor is formed with a groove (15) extending at least up to an interface between the first semiconductor layer (9) and the second semiconductor layer (10) and the capacitor electrode (5) extends along the groove (15), so that a storage capacitance of the capacitor can be increased.

Abstract: A semiconductor memory device according to the present invention comprises a memory cell having one transistor and one stacked capacitor. The stacked capacitor is stacked on the surface of a semiconductor substrate. Further, the stacked capacitor has a structure extending on a gate electrode and a word line through an insulating layer. A lower electrode layer of the capacitor has various concave/convex shapes, i.e. step portions and projecting portions formed on the surface thereof. These shapes are made by employing various etching processes. The lower electrode layer has such various concave/convex shapes formed thereon, so that a surface area and capacitance of the capacitor can be increased.

Abstract: A semiconductor memory device comprises a semiconductor substrate (10), a trench (12) formed on a main surface (11) of the semiconductor substrate, a gate region (15) formed on a main surface portion in the trench, a passive element region (16) formed on a bottom side portion of the trench and a source/drain region (20) formed on the main surface of the semiconductor substrate. The method for manufacturing the semiconductor memory device comprises the steps of forming a wide first trench (31) on a portion of the main surface of the semiconductor substrate, forming a narrow second trench (32) on the bottom portion of the first trench, forming a passive element region in the second trench, forming a gate region in the first trench, and forming a source/drain region on the main surface portion of the semiconductor substrate.

Abstract: A semiconductor memory comprises a semiconductor substrate (1), word lines (200) and bit lines (3a, 3b), memory cells and sense amplifier (SA). The semiconductor substrate (1) has a major surface. The word lines (200) and bit lines (3a, 3b) intersect each other on the major surface of the substrate (1). The bit lines (3a, 3b) are arranged in the form of parallel bit line pairs. The memory cells are arranged at intersections of the word lines (200) and the bit lines (3a, 3b). The sense amplifier (SA) senses voltage differentials of the bit line pairs. Corresponding sections of the bit lines (3a, 3b) of the bit line pair are interchanged laterally on the substrate (1) along the length of the bit line pair. Corresponding sections of the bit lines (3a, 3b) of each bit line pair have the same number of joining portions (10) respectively. It is possible to provide a semiconductor memory device having a wiring structure capable of minimizing an influence due to the noise from the adjacent wiring line.

Abstract: In an element forming region (10) of a semiconductor substrate (1), there are provided a gate electrode (2), sidewall insulating films (4), impurity diffusion regions (5a and 5b) of a lower concentration having their one ends are overlapped with the side sections of the gate electrode (2), and impurity diffusion regions (6a and 6b) of a higher concentration having their one ends are overlapped with the side sections of the sidewall insulating films (4). In an element isolation region (7) of the semiconductor substrate, there are formed an electrostatic screening electrode (31) for element isolation and an insulating film (30) substantially enclosing the electrostatic screening electrode. By employing the electrostatic screening electrode (31) for element isolation in the LDD MOS transistor, there is obtained a semiconductor device of high performance and reliability which is free from intrusion of impurities from the element isolation region.

Abstract: A semiconductor device has MOS field effect transistors isolated by a field shield. The field shield has a gate of conductor layers formed spaced apart from each other on a silicon substrate through an insulating film and with the surface thereof being covered with an insulating film. In regions isolated by the field shield, MOS field effect transistors are formed. Each of the MOS field effect transistors has a gate electrode of a conductor layer formed on the silicon substrate through an insulating film and with the surface thereof being covered with an insulating film. An impurity diffused region is formed in a region on the silicon substrate between the gate electrode and the field shield. A portion on an exposed surface of the impurity diffused region between the field shield and the gate electrode is selectively filled with a tungsten buried layer. The tungsten buried layer is formed, flattened relative to the gate electrode and the gate constituting the field shield.

Abstract: A dynamic type semiconductor device comprises a memory cell array including a plurality of cell groups, each of the cell groups including four adjacent memory cells disposed in a point symmetry fashion, with a single contact hole formed at the center of the point symmetry to be common to the four memory cells, in which the four memory cells and bit lines are connected through the single contact hole.

Abstract: A room temperature vulcanizable organopolysiloxane composition capable of yielding a cured product exhibiting an improved resistance to oil and improved adhesiveness to metals, which comprises a diorganopolysiloxane blocked with a hydroxyl group at both ends of the molecule, an organosilane or siloxane having at least two hydrolyzable groups, each bonded to a silicone atom, in one molecule, and an organosilane or siloxane having at least one vinyl group and at least one hydroxyl group, each bonded to a silicon atom, in one molecule. The composition may further comprise a filler.

Abstract: A cell plate (6) is formed on a main surface of a semiconductor substrate (7) with an insulating film (8) interposed therebetween and an interconnection (1) having T-shape cross section is formed on the cell plate (6) with an interlayer insulating film (11) interposed therebetween. An upper insulating film (12) is formed to cover the interconnection (1).