Patents by Inventor Shinichi Watanabe

Shinichi Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210106292
    Abstract: A material decomposition apparatus for performing decomposition of a material in an object. The apparatus includes a data storage section for storing correction data preliminarily generated by decomposing one of three or more materials into the other two materials, a data input section to which radiation data of the object is inputted, the radiation data being divided into a plurality of energy levels, and a decomposition processing section for repeatedly performing two-material decomposition for decomposition of the other two materials of the three or more materials using the radiation data at different energy levels and the correction data to perform decomposition of the inside of the object into the three or more materials.
    Type: Application
    Filed: May 18, 2020
    Publication date: April 15, 2021
    Inventors: Shinichi KOJIMA, Kazuma YOKOI, Isao TAKAHASHI, Fumito WATANABE, Fuyuhiko TERAMOTO, Taiga GOTOU
  • Patent number: 10971338
    Abstract: In an active gas generating apparatus, a power feeder is provided above metal electrodes in an integrated high-voltage electrode unit. When seen in plan view, the power feeder has a shape that entirely covers the metal electrodes in the integrated high-voltage electrode unit. Each of power feeding units is provided below the metal electrodes in an integrated ground electrode unit. When seen in plan view, each of the power feeding units has a shape that entirely covers the metal electrodes of the integrated ground electrode unit.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: April 6, 2021
    Assignee: TOSHIBA MITSUBISHI-ELECTRIC INDUSTRIAL SYSTEMS CORPORATION
    Inventors: Ren Arita, Kensuke Watanabe, Shinichi Nishimura
  • Patent number: 10956547
    Abstract: A biometrics authentication system having a small and simple configuration and being capable of implementing both of biometrics authentication and position detection is provided. A biometrics authentication system includes a light source emitting light to an object, a microlens array section condensing light from the object, a light-sensing device obtaining light detection data of the object on the basis of the light condensed by the microlens array section, a position detection section detecting the position of the object on the basis of the light detection data obtained in the light-sensing device, and an authentication section, in the case where the object is a living body, performing authentication of the living body on the basis of the light detection data obtained in the light-sensing device.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: March 23, 2021
    Assignee: SONY CORPORATION
    Inventors: Kenji Yamamoto, Hideo Sato, Isao Ichimura, Toshio Watanabe, Shinichi Kai, Junji Kajihara, Kengo Hayasaka
  • Patent number: 10948782
    Abstract: A liquid crystal panel includes a first substrate including multiple pixel electrodes; a liquid crystal layer; and a second substrate including a common electrode. In at least 30 pixels consecutive in a row direction, arrays of the domains are identical, the domains in the display unit region located in an nth row are arranged in an order of a first domain, a second domain, a third domain, and a fourth domain, and each of the pixel electrodes includes a first pixel electrode having a configuration in which fine slits parallel to an alignment vector of the corresponding domain are provided in at least one of a region superimposed on the first domain, a region superimposed on the second domain, a region superimposed on the third domain, or a region superimposed on the fourth domain while the fine slits are not provided in the remaining regions.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: March 16, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Fumikazu Shimoshikiryoh, Shinichi Terashita, Kouichi Watanabe
  • Patent number: 10943932
    Abstract: This light-receiving element includes: a substrate; a photoelectric conversion layer that is provided on the substrate and includes a first compound semiconductor, and absorbs a wavelength in an infrared region to generate electric charges; a semiconductor layer that is provided on the photoelectric conversion layer and includes a second compound semiconductor, and has an opening in a selective region; and an electrode that buries the opening of the semiconductor layer and is electrically coupled to the photoelectric conversion layer.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: March 9, 2021
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Shinichi Yoshida, Shunsuke Maruyama, Ryosuke Matsumoto, Shuji Manda, Tomomasa Watanabe
  • Patent number: 10937799
    Abstract: In one embodiment, a semiconductor device includes electrode layers and insulating layers alternately provided on a substrate and stacked in a first direction perpendicular to a surface of the substrate, and semiconductor layers provided in the electrode layers and insulating layers, extending in the first direction, and adjacent to each other in a second direction parallel to the surface of the substrate. The device further includes first and second charge trapping layers provided between the semiconductor layers and electrode layers sandwiching the semiconductor layers in a third direction parallel to the surface of the substrate. The device further includes insulators provided between the semiconductor layers being adjacent to each other in the second direction, and including a first insulator having a first width, and a second insulator having a second width longer than the first width and having nitrogen concentration different from that in the first insulator.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: March 2, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Shinichi Nakao, Kei Watanabe
  • Publication number: 20210057192
    Abstract: In the present invention, a high-voltage side electrode component further includes a conductive film disposed on an upper surface of a dielectric electrode independently of a metal electrode. The conductive film is disposed between at least one gas ejection port and the metal electrode in plan view, and the conductive film is set to ground potential.
    Type: Application
    Filed: May 30, 2018
    Publication date: February 25, 2021
    Applicant: Toshiba Mitsubishi-Electric Industrial Systems Corporation
    Inventors: Ren ARITA, Kensuke WATANABE, Shinichi NISHIMURA
  • Publication number: 20210055687
    Abstract: An image forming apparatus includes: an image former that forms a toner image; a fixing device that fixes the toner image to a sheet onto which the toner image formed by the image former has been transferred; a housing that houses the image former and the fixing device; an air supply fan that supplies air into the housing; an exhaust fan that exhausts air from the housing; and a hardware processor that controls driving of the image former, the fixing device, the air supply fan, and the exhaust fan, wherein when the driving of the air supply fan is changed, the hardware processor changes a blowing capacity of the exhaust fan in accordance with the change in the driving of the air supply fan.
    Type: Application
    Filed: July 10, 2020
    Publication date: February 25, 2021
    Inventors: Shinichi KAWABATA, Kanehiro WATANABE
  • Patent number: 10927454
    Abstract: A method of forming a nitride film wherein (a) a silane-based gas is supplied to a processing chamber through a gas supply port; (b) a nitrogen radical gas from a radical generator is supplied to the processing chamber through a radical gas pass-through port; and (c) the silane-based gas supplied in (a) is reacted with the nitrogen radical gas supplied in (b), without causing a plasma phenomenon in the processing chamber, to form a nitride film on a wafer.
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: February 23, 2021
    Assignees: Toshiba Mitsubishi-Electric Industrial Systems Corporation, Tohoku University
    Inventors: Shinichi Nishimura, Kensuke Watanabe, Yoshihito Yamada, Akinobu Teramoto, Tomoyuki Suwa, Yoshinobu Shiba
  • Patent number: 10908271
    Abstract: An obstacle determination device mounted on a mining work machine determines whether the state of the mining work machine is a state immediately after progressing or a normal travel state; selects, as a distance threshold provided to determine a non-obstacle, a starting distance threshold if in the state immediately after starting, or a normal distance threshold if in the normal travel state; extracts obstacle candidates on the basis of the result of comparison of the distance at which an obstacle candidate was initially detected with the distance threshold; selects a starting reflection intensity threshold if the state immediately after starting, or a normal reflection intensity threshold if in the normal travel state; excludes non-obstacles on the basis of the result of comparison of the reception strength of the reflection wave of the remaining obstacle candidates with the reflection intensity threshold; and outputs the remaining obstacle candidates as obstacles.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: February 2, 2021
    Assignee: HITACHI CONSTRUCTION MACHINERY CO., LTD.
    Inventors: Atsushi Watanabe, Takuya Naka, Shinichi Uotsu, Koei Takeda
  • Patent number: 10905388
    Abstract: X-ray photons are counted as to each of energy bands (bins) to which optimum energy ranges are provided, and an image with reduced noise is displayed in a short time. An energy range of at least one of multiple energy bands in an X-ray detector is adjusted, on the basis of a distribution of degrees of X-ray attenuation at respective energy levels, the distribution of degrees of X-ray attenuation being measured in advance with respect to a predetermined direction of a subject. By using the X-ray detector with the energy bands after the adjustment, photon-counting CT imaging is performed.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: February 2, 2021
    Assignee: HITACHI, LTD.
    Inventors: Shinichi Kojima, Fumito Watanabe, Yasutaka Konno, Isao Takahashi, Kazuma Yokoi
  • Publication number: 20210028185
    Abstract: A semiconductor memory device includes: a semiconductor substrate; a memory cell array provided in a first region; a first transistor provided in a second region; a second transistor provided in a third region; and an insulative laminated film. The first and second transistors each include a semiconductor layer, a gate electrode, and a gate insulating film. A concentration of boron (B) in the gate electrode of the second transistor is higher than that of the first transistor. The insulative laminated film includes a first insulating film contacting the surface of the semiconductor substrate, and a second insulating film having a smaller diffusion coefficient of hydrogen (H) than that of the first insulating film. The second insulating film has a first portion contacting the semiconductor portion, and the first portion surrounds the third region.
    Type: Application
    Filed: October 15, 2020
    Publication date: January 28, 2021
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Tetsuya FURUKAWA, Tomoaki SHINO, Mitsuhiro NOGUCHI, Shinichi WATANABE, Yukio NISHIDA, Hiroyasu TANAKA
  • Patent number: 10903700
    Abstract: A dust core included in an axial-gap rotary electric machine. The dust core includes a sector-shaped plate-like yoke portion, and a tooth portion integrated with the yoke portion and projecting from the yoke portion. Denoting one of surfaces of the yoke portion from which the tooth portion projects as a toothed surface, the toothed surface has a concave portion provided between a peripheral edge of the tooth portion and a peripheral edge of the yoke portion.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: January 26, 2021
    Assignees: SUMITOMO ELECTRIC SINTERED ALLOY, LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Naoto Igarashi, Shinichi Hirono, Tomoyuki Ueno, Asako Watanabe
  • Patent number: 10889896
    Abstract: With respect to a dielectric electrode, gas-jetting holes and gas-jetting holes formed in two rows along the X direction are provided as three or more gas-jetting holes along the X direction in a central region. By providing a difference in the X direction between the position where the gas-jetting hole is formed and the position where the gas-jetting hole is formed, the gas-jetting holes and the gas-jetting holes disposed in two rows are provided such that gas-jetting holes and gas-jetting holes are alternately disposed along the X direction.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: January 12, 2021
    Assignee: TOSHIBA MITSUBISHI-ELECTRIC INDUSTRIAL SYSTEMS CORPORATION
    Inventors: Shinichi Nishimura, Kensuke Watanabe, Yoshihito Yamada
  • Publication number: 20210006212
    Abstract: A decline in image quality that is caused by a variation of a gain in an amplification circuit is suppressed. The amplification circuit includes an amplification transistor, a cascode transistor, and a control circuit. The amplification transistor amplifies an input signal. The cascode transistor is configured to, in a case where a drain-source voltage between a drain and a source is higher than a predetermined voltage, supply a substantially-constant drain current to a reference potential line with a predetermined reference potential via the amplification transistor. Further, the control circuit is configured to, in a case where an initialization instruction is issued, control the drain-source voltage to be a value higher than the predetermined voltage.
    Type: Application
    Filed: December 4, 2018
    Publication date: January 7, 2021
    Inventor: Shinichi Watanabe
  • Publication number: 20200409295
    Abstract: A power supply apparatus includes a plurality of power supply boards and a cooler. The power supply boards supply power. The cooler cools the power supply boards. The power supply boards are disposed in rows in a front-back direction and stepwise so as to be disposed more upward as disposed more forward.
    Type: Application
    Filed: June 26, 2020
    Publication date: December 31, 2020
    Inventors: Shinichi KAWABATA, Kanehiro WATANABE
  • Patent number: 10840065
    Abstract: An active gas generator that generates active gas by activating supplied material gas through discharge in a discharge space formed between a high-voltage side electrode component and a ground side electrode component of an active gas generation electrode group. A combined structure of covers completely separates the discharge space from an alternating-current voltage application space, and includes, independently from the alternating-current voltage application space, a material gas flow path for a material gas supply path, through which externally supplied material gas is guided to the discharge space. A housing contact space formed between a metal housing and each of the covers and an electrode component installation table is completely separated from the alternating-current voltage application space and the discharge space.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: November 17, 2020
    Assignee: TOSHIBA MITSUBISHI-ELECTRIC INDUSTRIAL SYSTEMS CORPORATION
    Inventors: Kensuke Watanabe, Yoshihito Yamada, Shinichi Nishimura
  • Patent number: 10840257
    Abstract: A semiconductor memory device includes: a semiconductor substrate; a memory cell array provided in a first region; a first transistor provided in a second region; a second transistor provided in a third region; and an insulative laminated film. The first and second transistors each include a semiconductor layer, a gate electrode, and a gate insulating film. A concentration of boron (B) in the gate electrode of the second transistor is higher than that of the first transistor. The insulative laminated film includes a first insulating film contacting the surface of the semiconductor substrate, and a second insulating film having a smaller diffusion coefficient of hydrogen (H) than that of the first insulating film. The second insulating film has a first portion contacting the semiconductor portion, and the first portion surrounds the third region.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: November 17, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Tetsuya Furukawa, Tomoaki Shino, Mitsuhiro Noguchi, Shinichi Watanabe, Yukio Nishida, Hiroyasu Tanaka
  • Publication number: 20200343078
    Abstract: The present invention has features (1) to (3). The feature (1) is that “an active gas generation electrode group is formed in such a manner that a ground side electrode component supports a high-voltage side electrode component”. The feature (2) is that “stepped parts are provided in a discharge space outside region of a dielectric electrode in the high-voltage side electrode component, and project downward, and by a formation height of these stepped parts, the gap length of a discharge space is defined”. The feature (3) is that “the high-voltage side electrode component and the ground side electrode component are formed to have the thickness of a discharge space formation region relatively thin and the thickness of a discharge space outside region relatively thick”.
    Type: Application
    Filed: January 10, 2018
    Publication date: October 29, 2020
    Applicant: Toshiba Mitsubishi-Electric Industrial Systems Corporation
    Inventors: Kensuke WATANABE, Shinichi NISHIMURA, Ren ARITA, Yoshihito YAMADA, Yoichiro TABATA
  • Patent number: D900174
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: October 27, 2020
    Assignees: Sumitomo Electric Sintered Alloy, Ltd., Sumitomo Electric Industries, Ltd.
    Inventors: Naoto Igarashi, Shinichi Hirono, Tomoyuki Ueno, Asako Watanabe