Patents by Inventor Shinichi Watanabe
Shinichi Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240242917Abstract: The purpose of the present disclosure is to provide a high-voltage insulating structure capable of reducing an electric field around a conductor to which a high voltage is applied. In this high-voltage insulating structure, an electrically conductive part, to which a high voltage is applied and which extends in an axial direction, is surrounded by an insulator, wherein the insulator comprises a first insulator 105, a second insulator 203 positioned on the opposite side from the first insulator in the axial direction, and a third insulator 205 positioned between the first and second insulators. The electrical resistivity of the third insulator 205 is smaller than the electrical resistivities of the first and second insulators. As for the thickness of the third insulator 205 in the axial direction, a first thickness at the outer side farther from the electrically conductive part is less than a second thickness at the inner side closer to the electrically conductive part.Type: ApplicationFiled: May 17, 2021Publication date: July 18, 2024Inventors: Yasuchika SUZUKI, Shinichi KATO, Takashi OHNISHI, Shunichi WATANABE
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Patent number: 11889212Abstract: The present technology relates to a comparator that can easily modify operating point potential of the comparator, and an imaging device. A pixel signal output from a pixel, and, a reference signal with changeable voltage are input to a differential pair. A current mirror connected to the differential pair, and a voltage drop mechanism allowed to cause a predetermined voltage drop is connected between a transistor that configures the differential pair, and a transistor that configures the current mirror. A switch is connected in parallel to the voltage drop mechanism. The present technology can be applied, for example, to an image sensor that captures an image.Type: GrantFiled: February 22, 2023Date of Patent: January 30, 2024Assignee: Sony Semiconductor Solutions CorporationInventors: Masayoshi Chiba, Shinichi Watanabe
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Publication number: 20230209222Abstract: The present technology relates to a comparator that can easily modify operating point potential of the comparator, and an imaging device. A pixel signal output from a pixel, and, a reference signal with changeable voltage are input to a differential pair. A current mirror connected to the differential pair, and a voltage drop mechanism allowed to cause a predetermined voltage drop is connected between a transistor that configures the differential pair, and a transistor that configures the current mirror. A switch is connected in parallel to the voltage drop mechanism. The present technology can be applied, for example, to an image sensor that captures an image.Type: ApplicationFiled: February 22, 2023Publication date: June 29, 2023Inventors: Masayoshi Chiba, Shinichi Watanabe
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Patent number: 11606522Abstract: The present technology relates to a comparator that can easily modify operating point potential of the comparator, and an imaging device. A pixel signal output from a pixel, and, a reference signal with changeable voltage are input to a differential pair. A current mirror connected to the differential pair, and a voltage drop mechanism allowed to cause a predetermined voltage drop is connected between a transistor that configures the differential pair, and a transistor that configures the current mirror. A switch is connected in parallel to the voltage drop mechanism. The present technology can be applied, for example, to an image sensor that captures an image.Type: GrantFiled: August 2, 2022Date of Patent: March 14, 2023Assignee: Sony Semiconductor Solutions CorporationInventors: Masayoshi Chiba, Shinichi Watanabe
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Publication number: 20220368843Abstract: The present technology relates to a comparator that can easily modify operating point potential of the comparator, and an imaging device. A pixel signal output from a pixel, and, a reference signal with changeable voltage are input to a differential pair. A current mirror connected to the differential pair, and a voltage drop mechanism allowed to cause a predetermined voltage drop is connected between a transistor that configures the differential pair, and a transistor that configures the current mirror. A switch is connected in parallel to the voltage drop mechanism. The present technology can be applied, for example, to an image sensor that captures an image.Type: ApplicationFiled: August 2, 2022Publication date: November 17, 2022Inventors: Masayoshi Chiba, Shinichi Watanabe
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Patent number: 11462556Abstract: A semiconductor memory device includes: a semiconductor substrate; a memory cell array provided in a first region; a first transistor provided in a second region; a second transistor provided in a third region; and an insulative laminated film. The first and second transistors each include a semiconductor layer, a gate electrode, and a gate insulating film. A concentration of boron (B) in the gate electrode of the second transistor is higher than that of the first transistor. The insulative laminated film includes a first insulating film contacting the surface of the semiconductor substrate, and a second insulating film having a smaller diffusion coefficient of hydrogen (H) than that of the first insulating film. The second insulating film has a first portion contacting the semiconductor portion, and the first portion surrounds the third region.Type: GrantFiled: October 15, 2020Date of Patent: October 4, 2022Assignee: Kioxia CorporationInventors: Tetsuya Furukawa, Tomoaki Shino, Mitsuhiro Noguchi, Shinichi Watanabe, Yukio Nishida, Hiroyasu Tanaka
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Patent number: 11438538Abstract: The present technology relates to a comparator that can easily modify operating point potential of the comparator, and an imaging device. A pixel signal output from a pixel, and, a reference signal with changeable voltage are input to a differential pair. A current mirror connected to the differential pair, and a voltage drop mechanism allowed to cause a predetermined voltage drop is connected between a transistor that configures the differential pair, and a transistor that configures the current mirror. A switch is connected in parallel to the voltage drop mechanism. The present technology can be applied, for example, to an image sensor that captures an image.Type: GrantFiled: June 25, 2019Date of Patent: September 6, 2022Assignee: Sony Semiconductor Solutions CorporationInventors: Masayoshi Chiba, Shinichi Watanabe
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Patent number: 11283417Abstract: A decline in image quality that is caused by a variation of a gain in an amplification circuit is suppressed. The amplification circuit includes an amplification transistor, a cascode transistor, and a control circuit. The amplification transistor amplifies an input signal. The cascode transistor is configured to, in a case where a drain-source voltage between a drain and a source is higher than a predetermined voltage, supply a substantially-constant drain current to a reference potential line with a predetermined reference potential via the amplification transistor. Further, the control circuit is configured to, in a case where an initialization instruction is issued, control the drain-source voltage to be a value higher than the predetermined voltage.Type: GrantFiled: December 4, 2018Date of Patent: March 22, 2022Assignee: Sony Semiconductor Solutions CorporationInventors: Shinichi Watanabe, Takehiro Otani
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Publication number: 20210274117Abstract: The present technology relates to a comparator that can easily modify operating point potential of the comparator, and an imaging device. A pixel signal output from a pixel, and, a reference signal with changeable voltage are input to a differential pair. A current mirror connected to the differential pair, and a voltage drop mechanism allowed to cause a predetermined voltage drop is connected between a transistor that configures the differential pair, and a transistor that configures the current mirror. A switch is connected in parallel to the voltage drop mechanism. The present technology can be applied, for example, to an image sensor that captures an image.Type: ApplicationFiled: June 25, 2019Publication date: September 2, 2021Inventors: Masayoshi Chiba, Shinichi Watanabe
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Publication number: 20210028185Abstract: A semiconductor memory device includes: a semiconductor substrate; a memory cell array provided in a first region; a first transistor provided in a second region; a second transistor provided in a third region; and an insulative laminated film. The first and second transistors each include a semiconductor layer, a gate electrode, and a gate insulating film. A concentration of boron (B) in the gate electrode of the second transistor is higher than that of the first transistor. The insulative laminated film includes a first insulating film contacting the surface of the semiconductor substrate, and a second insulating film having a smaller diffusion coefficient of hydrogen (H) than that of the first insulating film. The second insulating film has a first portion contacting the semiconductor portion, and the first portion surrounds the third region.Type: ApplicationFiled: October 15, 2020Publication date: January 28, 2021Applicant: TOSHIBA MEMORY CORPORATIONInventors: Tetsuya FURUKAWA, Tomoaki SHINO, Mitsuhiro NOGUCHI, Shinichi WATANABE, Yukio NISHIDA, Hiroyasu TANAKA
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Publication number: 20210006212Abstract: A decline in image quality that is caused by a variation of a gain in an amplification circuit is suppressed. The amplification circuit includes an amplification transistor, a cascode transistor, and a control circuit. The amplification transistor amplifies an input signal. The cascode transistor is configured to, in a case where a drain-source voltage between a drain and a source is higher than a predetermined voltage, supply a substantially-constant drain current to a reference potential line with a predetermined reference potential via the amplification transistor. Further, the control circuit is configured to, in a case where an initialization instruction is issued, control the drain-source voltage to be a value higher than the predetermined voltage.Type: ApplicationFiled: December 4, 2018Publication date: January 7, 2021Inventor: Shinichi Watanabe
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Patent number: 10840257Abstract: A semiconductor memory device includes: a semiconductor substrate; a memory cell array provided in a first region; a first transistor provided in a second region; a second transistor provided in a third region; and an insulative laminated film. The first and second transistors each include a semiconductor layer, a gate electrode, and a gate insulating film. A concentration of boron (B) in the gate electrode of the second transistor is higher than that of the first transistor. The insulative laminated film includes a first insulating film contacting the surface of the semiconductor substrate, and a second insulating film having a smaller diffusion coefficient of hydrogen (H) than that of the first insulating film. The second insulating film has a first portion contacting the semiconductor portion, and the first portion surrounds the third region.Type: GrantFiled: February 11, 2019Date of Patent: November 17, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Tetsuya Furukawa, Tomoaki Shino, Mitsuhiro Noguchi, Shinichi Watanabe, Yukio Nishida, Hiroyasu Tanaka
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Patent number: 10601379Abstract: A digital amplifier includes a digital PWM generator, a first amplifier circuit, a first low-pass filter, a second amplifier circuit, a second low-pass filter, an attenuator, an error extractor, an adder, and a voltage supply unit. The first amplifier circuit amplifies a digital PWM signal at a second voltage. The first low-pass filter extracts a low-frequency band voltage signal from the amplified digital PWM signal, and outputs the extracted voltage signal to a load. The second amplifier circuit amplifies the generated digital PWM signal at a third voltage. The error extractor extracts an error signal. The adder adds a digital error signal whose feedback gain is adjusted to a digital audio signal. The voltage supply unit generates the third voltage that has a voltage value of a predetermined ratio to a voltage value of the second voltage, and supplies the third voltage to the second amplifier circuit.Type: GrantFiled: July 3, 2018Date of Patent: March 24, 2020Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventor: Shinichi Watanabe
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Publication number: 20200066743Abstract: A semiconductor memory device includes: a semiconductor substrate; a memory cell array provided in a first region; a first transistor provided in a second region; a second transistor provided in a third region; and an insulative laminated film. The first and second transistors each include a semiconductor layer, a gate electrode, and a gate insulating film. A concentration of boron (B) in the gate electrode of the second transistor is higher than that of the first transistor. The insulative laminated film includes a first insulating film contacting the surface of the semiconductor substrate, and a second insulating film having a smaller diffusion coefficient of hydrogen (H) than that of the first insulating film. The second insulating film has a first portion contacting the semiconductor portion, and the first portion surrounds the third region.Type: ApplicationFiled: February 11, 2019Publication date: February 27, 2020Applicant: TOSHIBA MEMORY CORPORATIONInventors: Tetsuya FURUKAWA, Tomoaki SHINO, Mitsuhiro NOGUCHI, Shinichi WATANABE, Yukio NISHIDA, Hiroyasu TANAKA
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Publication number: 20190028069Abstract: A digital amplifier includes a digital PWM generator, a first amplifier circuit, a first low-pass filter, a second amplifier circuit, a second low-pass filter, an attenuator, an error extractor, an adder, and a voltage supply unit. The first amplifier circuit amplifies a digital PWM signal at a second voltage. The first low-pass filter extracts a low-frequency band voltage signal from the amplified digital PWM signal, and outputs the extracted voltage signal to a load. The second amplifier circuit amplifies the generated digital PWM signal at a third voltage. The error extractor extracts an error signal. The adder adds a digital error signal whose feedback gain is adjusted to a digital audio signal. The voltage supply unit generates the third voltage that has a voltage value of a predetermined ratio to a voltage value of the second voltage, and supplies the third voltage to the second amplifier circuit.Type: ApplicationFiled: July 3, 2018Publication date: January 24, 2019Inventor: SHINICHI WATANABE
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Patent number: 9621822Abstract: There is included: a light receiving device configured to receive light and convert the received light into a light detection signal; a pixel transistor connected to the light receiving device and configured to control connection between the light receiving device and a signal line; a low-pass filter configured to be applied with respect to the light detection signal; an A-D converter configured to convert an output signal of the low-pass filter into digital data; and a sequencer configured to, prior to causing the A-D converter to operate to output the digital data, control the pixel transistor to be in an ON state and thereby maintain the light receiving device to be connected to the signal line, in a state in which the low-pass filter is caused to function effectively with respect to the light detection signal.Type: GrantFiled: September 27, 2013Date of Patent: April 11, 2017Assignee: SONY CORPORATIONInventors: Michiru Senda, Shinichi Watanabe, Daisuke Kawazoe, Yuichiro Minami
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Patent number: 9351676Abstract: An electrochemical sensor includes a base plate provided with a concave part formed on one of surfaces thereof, a fluid channel formed so that a bottom part of the concave part and the other one of the surfaces of the base plate are communicated with each other, a plurality of electrodes formed on the concave part; a reagent fixed on the electrodes, a cover which covers the concave part, and an air channel which causes the inside and outside of the concave part to be communicated with each other.Type: GrantFiled: October 28, 2011Date of Patent: May 31, 2016Assignee: ARKRAY, Inc.Inventors: Yoshiharu Sato, Tadao Yamaguchi, Shinichi Watanabe, Yoshimitsu Matsuura
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Publication number: 20150288890Abstract: There is included: a light receiving device configured to receive light and convert the received light into a light detection signal; a pixel transistor connected to the light receiving device and configured to control connection between the light receiving device and a signal line; a low-pass filter configured to be applied with respect to the light detection signal; an A-D converter configured to convert an output signal of the low-pass filter into digital data; and a sequencer configured to, prior to causing the A-D converter to operate to output the digital data, control the pixel transistor to be in an ON state and thereby maintain the light receiving device to be connected to the signal line, in a state in which the low-pass filter is caused to function effectively with respect to the light detection signal.Type: ApplicationFiled: September 27, 2013Publication date: October 8, 2015Applicant: SONY CORPORATIONInventors: Michiru Senda, Shinichi Watanabe, Daisuke Kawazoe, Yuichiro Minami
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Patent number: 9034158Abstract: A sensor cartridge for supplying a sensor is used. The sensor cartridge includes a casing within which the plurality of sensors can be arranged, and that allows a sample to be introduced to a sensor located at a preset location, and a connection structure. The connection structure electrically connects an external device and a sensor electrode of the sensor located at the preset location. The casing is formed so as to be held by the external device when the external device and the sensor electrode of the sensor are electrically connected via the connection structure.Type: GrantFiled: October 22, 2010Date of Patent: May 19, 2015Assignee: ARKRAY, Inc.Inventor: Shinichi Watanabe
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Patent number: 8896376Abstract: The disclosed digital amplifier (200) is provided with a voltage value conversion block (220) for converting a digital value of a digital pulse width of a digital modulation block (210) to a voltage value; and an integration circuit block (230) for generating a triangular wave by way of a master clock and modulating the generated triangular wave on the basis of a signal corresponding to the value of the modulation width of digital pulse width modulation. The disclosed digital amplifier (200) is provided with a low-pass filter (260) for demodulating pulse power that has been power-amplified by way of a drive circuit (250) to analog power of an audio band, and an error amplifier (290) for computing the voltage difference between the voltage of a low-pass filter (280) and the low-pass filter (260) and amplifying thereof.Type: GrantFiled: March 25, 2011Date of Patent: November 25, 2014Assignee: Panasonic CorporationInventor: Shinichi Watanabe