Patents by Inventor Shinichiro Miyahara
Shinichiro Miyahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9633901Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a first semiconductor element and a second semiconductor element in a semiconductor wafer. The first semiconductor element includes a first electrode formed on a front surface of the semiconductor wafer. The second semiconductor element is adjacent to the first semiconductor element and includes a second electrode formed on the front surface. The method further includes forming a first insulating layer on the front surface located at a first boundary portion between the first electrode and the second electrode; applying a specific potential different from a potential of the second electrode on the first electrode after the formation of the first insulating layer; and cutting the semiconductor wafer at the first boundary portion so as to divide the first semiconductor element from the second semiconductor element.Type: GrantFiled: July 20, 2015Date of Patent: April 25, 2017Assignee: Toyota Jidosha Kabushiki KaishaInventors: Akitaka Soeno, Sachiko Aoi, Shinichiro Miyahara
-
Publication number: 20170012136Abstract: A terminal structure includes: a first trench extending along a depth direction from an upper surface of a semiconductor substrate; a plurality of second trenches, each of which extends along the depth direction from a bottom surface of the first trench and which are arranged at intervals in a direction away from an element portion; a plurality of first floating regions having a floating potential, each of which is exposed at the bottom surface of the first trench, is disposed between the second trenches, and forms a PN-junction with a surrounding region thereof; and a plurality of second floating regions having a floating potential, each of which is exposed at a bottom surface of the second trench and forms a PN-junction with a surrounding region thereof. The plurality of second floating regions is arranged to be separated from each other in the direction away from the element portion.Type: ApplicationFiled: July 5, 2016Publication date: January 12, 2017Inventors: Yosuke Maegawa, Shinichiro Miyahara, Narumasa Soejima
-
Publication number: 20160351665Abstract: A semiconductor device is provided with a semiconductor substrate and a trench gate. The semiconductor substrate is provided with a drift region of a first conductive type, wherein the drift region is in contact with the trench gate; a body region of a second conductive type, wherein the body region is disposed above the drift region and is in contact with the trench gate; a source region of the first conductive type, wherein the source region is disposed above the body region, exposed on the front surface of the semiconductor substrate and is in contact with the trench gate; and a front surface region of the second conductive type, wherein the front surface region is disposed above the source region, exposed on the front surface of the semiconductor substrate and is in contact with the trench gate.Type: ApplicationFiled: May 18, 2016Publication date: December 1, 2016Inventors: Masahiro Sugimoto, Sachiko Aoi, Shoji Mizuno, Shinichiro Miyahara
-
Publication number: 20160315157Abstract: Described herein is a semiconductor device comprising: a semiconductor substrate; a trench provided at a surface of the semiconductor substrate; a first insulating layer covering an inner surface of the trench; and a second insulating layer located at a surface of the first insulating layer in the trench. A refraction index of the first insulating layer is larger than a refraction index of the second insulating layer.Type: ApplicationFiled: October 14, 2014Publication date: October 27, 2016Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Atsushi ONOGI, Shinichiro MIYAHARA
-
Publication number: 20160300960Abstract: A diode is provided with a semiconductor substrate; an anode electrode located on a front surface of the semiconductor substrate; and a cathode electrode located on a rear surface of the semiconductor substrate. Each of the p-type contact regions includes: a first region being in contact with the anode electrode; a second region located on the rear surface side of the first region, having a p-type impurity density lower than a p-type impurity density in the first region; and a third region located on the rear surface side of the second region and having a p-type impurity density lower than the p-type impurity density in the second region. A thickness of the second region is thicker than a thickness of the first region.Type: ApplicationFiled: April 7, 2016Publication date: October 13, 2016Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATIONInventors: Hiroki MIYAKE, Tatsuji NAGAOKA, Shinichiro MIYAHARA, Sachiko AOI
-
Publication number: 20160284839Abstract: In a plane view of the front surface of the semiconductor substrate, the source region and the first contact region are arranged adjacent to each other in a direction along the gate trench in an area being in contact with a side surface of the gate trench, and the second contact region is arranged adjacent to the source region and the first contact region in an area apart from the gate trench. The impurity concentration of the first contact region is lower than the impurity concentration of the second contact region.Type: ApplicationFiled: March 21, 2016Publication date: September 29, 2016Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Masahiro SUGIMOTO, Yukihiko WATANABE, Shinichiro MIYAHARA
-
Publication number: 20160260608Abstract: A manufacturing method of a semiconductor device is provided by forming a trench in a surface of a SiC substrate, positioning a protective substrate to cover the trench, and annealing the SiC substrate and the protective substrate.Type: ApplicationFiled: February 29, 2016Publication date: September 8, 2016Inventors: Tomoharu Ikeda, Shinichiro Miyahara, Sachiko Aoi
-
Publication number: 20160218190Abstract: A semiconductor device includes: a semiconductor substrate; and a first trench and a second trench that extend from a front surface of the semiconductor substrate toward a rear surface side of the semiconductor substrate. A gate electrode is accommodated in the first trench. An insulator is accommodated in the second trench. An angle between a bottom surface and a side surface of the first trench is larger than an angle between a bottom surface and a side surface of the second trench. A void is provided in the insulator in the second trench.Type: ApplicationFiled: January 25, 2016Publication date: July 28, 2016Inventors: Yuji Fukuoka, Yukihiko Watanabe, Shinichiro Miyahara
-
Publication number: 20160211349Abstract: A semiconductor device includes a semiconductor substrate, a trench extending from a front surface toward a rear surface side of the semiconductor substrate, and an insulator filled in the trench. The semiconductor substrate is provided with in this order from the rear surface side toward the front surface, an n-type drift region, a p-type base region provided on a front surface side of the drift region, a p-type diffusion region provided on a front surface side of the base region and having a higher impurity concentration than that of the base region. The trench pierces the diffusion region and the base region, and reaches the drift region. A void is provided in a portion of the insulator that is filled between portions of the p-type diffusion region that are exposed on both side surfaces of the trench when seen along a vertical cross section of the semiconductor substrate.Type: ApplicationFiled: January 14, 2016Publication date: July 21, 2016Inventors: Yuji Fukuoka, Sachiko Aoi, Shinichiro Miyahara
-
Publication number: 20160149029Abstract: A semiconductor device includes a semiconductor substrate including a trench, a gate insulating layer, and a gate electrode. A step is arranged in a side surface of the trench. The semiconductor substrate includes first and second regions, a body region, and a side region. The body region extends from a position being in contact with the first region to a position located on the lower side with respect to the step. The body region is in contact with the gate insulating layer at a portion of the upper side surface located on a lower side with respect to the first region. The second region is located on a lower side of the body region and in contact with the gate insulating layer at the lower side surface. The side region is in contact with the gate insulating layer at the step surface and connected to the second region.Type: ApplicationFiled: November 12, 2015Publication date: May 26, 2016Inventors: Hidefumi TAKAYA, Katsuhiro KUTSUKI, Sachiko AOI, Shinichiro MIYAHARA
-
Publication number: 20160141409Abstract: A semiconductor device provided herein includes a trench in which a gate insulating layer (GIL) and a gate electrode are located. A step is provided in a lateral surface of the trench. The step surface descends toward a center of the trench. First and second regions are of a first conductivity type. A body region, a lateral region and a bottom region are of a second conductivity type. The first region, a body region, and the second region are in contact with the GIL at the upper lateral surface of the trench. The second region is in contact with the GIL at the lower lateral surface of the trench. A lateral region is in contact with the GIL at the lower lateral surface. A bottom region is in contact with the GIL at the bottom surface of the trench.Type: ApplicationFiled: November 16, 2015Publication date: May 19, 2016Inventors: Hidefumi Takaya, Shinichiro Miyahara, Katsuhiro Kutsuki, Sachiko Aoi
-
Publication number: 20160087094Abstract: A semiconductor device includes a semiconductor substrate having a main cell region and a sense cell region. A separation trench separating a main second semiconductor region from a sense second semiconductor region is provided in an upper surface of the semiconductor substrate. The semiconductor substrate includes a separation fourth semiconductor region being of a second conductivity type and separated from the main second semiconductor region and the sense second semiconductor substrate by a third semiconductor region.Type: ApplicationFiled: September 14, 2015Publication date: March 24, 2016Inventors: Hidefumi Takaya, Jun Saito, Sachiko Aoi, Yukihiko Watanabe, Shoji Mizuno, Shinichiro Miyahara
-
Publication number: 20160027662Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a first semiconductor element and a second semiconductor element in a semiconductor wafer. The first semiconductor element includes a first electrode formed on a front surface of the semiconductor wafer. The second semiconductor element is adjacent to the first semiconductor element and includes a second electrode formed on the front surface. The method further includes forming a first insulating layer on the front surface located at a first boundary portion between the first electrode and the second electrode; applying a specific potential different from a potential of the second electrode on the first electrode after the formation of the first insulating layer; and cutting the semiconductor wafer at the first boundary portion so as to divide the first semiconductor element from the second semiconductor element.Type: ApplicationFiled: July 20, 2015Publication date: January 28, 2016Inventors: Akitaka Soeno, Sachiko Aoi, Shinichiro Miyahara
-
Patent number: 9136372Abstract: In a silicon carbide semiconductor device, a plurality of trenches has a longitudinal direction in one direction and is arranged in a stripe pattern. Each of the trenches has first and second sidewalls extending in the longitudinal direction. The first sidewall is at a first acute angle to one of a (11-20) plane and a (1-100) plane, the second sidewall is at a second acute angle to the one of the (11-20) plane and the (1-100) plane, and the first acute angle is smaller than the second acute angle. A first conductivity type region is in contact with only the first sidewall in the first and second sidewalls of each of the trenches, and a current path is formed on only the first sidewall in the first and second sidewalls.Type: GrantFiled: June 25, 2012Date of Patent: September 15, 2015Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Shinichiro Miyahara, Masahiro Sugimoto, Hidefumi Takaya, Yukihiko Watanabe, Narumasa Soejima, Tsuyoshi Ishikawa
-
Publication number: 20150236127Abstract: In a method of manufacturing a silicon carbide semiconductor device including a vertical switching element having a trench gate structure, with the use of a substrate having an off angle with respect to a (0001) plane or a (000-1) plane, a trench is formed from a surface of a source region to a depth reaching a drift layer through a base region so that a side wall surface of the trench faces a (11-20) plane or a (1-100) plane, and a gate oxide film is formed without performing sacrificial oxidation after formation of the trench.Type: ApplicationFiled: August 6, 2013Publication date: August 20, 2015Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATIONInventors: Shinichiro Miyahara, Toshimasa Yamamoto, Jun Morimoto, Narumasa Soejima, Yukihiko Watanabe
-
Patent number: 9024330Abstract: A method of manufacturing a semiconductor device includes forming an ohmic electrode in a first area on one of main surfaces of a silicon carbide layer, siliciding the ohmic electrode, and forming a Schottky electrode in a second area on the one of the main surfaces of the silicon carbide layer with self alignment. The second area is exposed where the ohmic electrode is not formed.Type: GrantFiled: December 26, 2013Date of Patent: May 5, 2015Assignees: Toyota Jidosha Kabushiki Kaisha, Denso CorporationInventors: Yukihiko Watanabe, Sachiko Aoi, Masahiro Sugimoto, Akitaka Soeno, Shinichiro Miyahara
-
Patent number: 8975139Abstract: A manufacturing method of a silicon carbide semiconductor device includes: forming a drift layer on a silicon carbide substrate; forming a base layer on or in a surface portion of the drift layer; forming a source region in a surface portion of the base layer; forming a trench to penetrate the base layer and to reach the drift layer; forming a gate electrode on a gate insulation film in the trench; forming a source electrode electrically connected to the source region and the base layer; and forming a drain electrode on a back surface of the substrate. The forming of the trench includes: flattening a substrate surface; and etching to form the trench after flattening.Type: GrantFiled: September 4, 2012Date of Patent: March 10, 2015Assignees: DENSO CORPORATION, Toyota Jidosha Kabushiki KaishaInventors: Shinichiro Miyahara, Toshimasa Yamamoto, Hidefumi Takaya, Masahiro Sugimoto, Yukihiko Watanabe, Narumasa Soejima, Tsuyoshi Ishikawa
-
Publication number: 20140231827Abstract: A method of manufacturing a semiconductor device includes forming an ohmic electrode in a first area on one of main surfaces of a silicon carbide layer, siliciding the ohmic electrode, and forming a Schottky electrode in a second area on the one of the main surfaces of the silicon carbide layer with self alignment. The second area is exposed where the ohmic electrode is not formed.Type: ApplicationFiled: December 26, 2013Publication date: August 21, 2014Applicants: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Yukihiko WATANABE, Sachiko AOI, Masahiro SUGIMOTO, Akitaka SOENO, Shinichiro MIYAHARA
-
Publication number: 20130330896Abstract: A manufacturing method of a silicon carbide semiconductor device includes: forming a drift layer on a silicon carbide substrate; forming a base layer on or in a surface portion of the drift layer; forming a source region in a surface portion of the base layer; forming a trench to penetrate the base layer and to reach the drift layer; forming a gate electrode on a gate insulation film in the trench; forming a source electrode electrically connected to the source region and the base layer; and forming a drain electrode on a back surface of the substrate. The forming of the trench includes: flattening a substrate surface; and etching to form the trench after flattening.Type: ApplicationFiled: September 4, 2012Publication date: December 12, 2013Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATIONInventors: Shinichiro Miyahara, Toshimasa Yamamoto, Hidefumi Takaya, Masahiro Sugimoto, Yukihiko Watanabe, Narumasa Soejima, Tsuyoshi Ishikawa
-
Patent number: 8575689Abstract: An SiC semiconductor device includes a substrate, a drift layer, a base region, a source region, a trench, a gate oxide film, a gate electrode, a source electrode and a drain electrode. The substrate has a Si-face as a main surface. The source region has the Si-face. The trench is provided from a surface of the source region to a portion deeper than the base region and extends longitudinally in one direction and has a Si-face bottom. The trench has an inverse tapered shape, which has a smaller width at an entrance portion than at a bottom, at least at a portion that is in contact with the base region.Type: GrantFiled: December 20, 2011Date of Patent: November 5, 2013Assignees: DENSO CORPORATION, Toyota Jidosha Kabushiki KaishaInventors: Tomohiro Mimura, Shinichiro Miyahara, Hidefumi Takaya, Masahiro Sugimoto, Narumasa Soejima, Tsuyoshi Ishikawa, Yukihiko Watanabe