Abstract: A video signal processing circuit utilizes an analog-to-digital converter to output a digital signal derived from a demodulated video signal which is supplied from a video signal demodulating circuit. The circuit can compensate the demodulated video signal by utilizing the conversion characteristics of an analog-to-digital converter, to compensate the level differences or linearity differences between the video signal reproducing channels in a video tape recorder employing multi-channel recording.

Abstract: In a recorder system for recording a video signal, the video signal is modulated by a sine wave FM modulator and is then fed to a delay equalizer for successively rotating a phase of the modulated video signal so that a phase of high order side band components of the modulated video signal is shifted by 180 degrees relative to each other, and is then recorded on a video tape having a characteristic as a limiter. Hence, a moire component can be reduced. In a reproducing system, a reproduced video signal is fed to a filter circuit having a serially-connectred limiter and high-pass filter, a low-pass filter connected parallelly to the limiter, and an adder for adding an output signal of the high-pass filter and an output signal of the low-pass filter. A plurality of the filter circuits are serially connected so that the signal-to-noise ratio (S/N ratio) can be improved.

Abstract: In an electron beam recorder for recording pictures on a sensitive medium by scanning the sensitive medium with an electron beam, the electron beam recorder is disclosed which includes in the signal supplying circuit thereof a contrast compensating circuit consisting of delay means for providing the picture signal to be recorded with predetermined delay times and a non-adder-mixer for combining the signals obtained from the delay means with the original picture signal, wherein the exposure period by the electron beam is controlled to be shortened by means of the contrast compensating circuit.

Abstract: A video noise reduction system for use in a video signal recording apparatus adapted to record red, blue and green primary color component video signals on a plurality of separate tracks of a magnetic recording medium. The component video signals are applied to a matrix circuit which produces a wide-band luminance signal. The video noise reduction system includes a band splitter circuit for splitting the wide-band luminance signal into an upper-band luminance signal and a lower-band luminance signal and an emphasis circuit for emphasizing the low level components of the upper-band luminance signal before the upper-band luminance signal is FM modulated. Since the emphasis circuit follows the band splitter circuit having a flat phase versus frequency characteristic, the video noise reduction circuit can reduce video noise without causing distortion of the frequency modulated video signal.

Abstract: A main memory stores a signal reproduced from a recording medium with a time base error, and a read clock generator and phase modulator generates a read clock signal of variable phase for reading out the signal from the main memory. A velocity compensating circuit generates first discrete signals representative of the velocity error of the reproduced signal at designated sample points of a current field and second discrete signals representative of a velocity error of the reproduced signal at sample points of a previous field respectively corresponding to the designated points and interleaves the first and second discrete signals to produce a combined signal having a sampling frequency greater than that of either the first or second discrete signals.

Abstract: A hydraulic damper for use in a suspension device of a vehicle such as an automobile includes a main body forming a cylinder, a packing cap fitted on and fixedly secured to one end of the main body, a piston rod connected to a piston movably received in the cylinder and extending through the packing cap to the outside of the cylinder, a spring seat mounted on the outer periphery of the main body for receiving and supporting one end of a suspension spring, and a bump stop mounted on the packing cap for abutting a bump rubber mounted on the chassis of the vehicle and intended to bump against the damper when the damper is contracted. The bump stop includes a bump cap fitted on and fixedly secured to the packing cap, a bump plate for directly abutting the bump rubber and a plate cap formed to be integral with the bump plate and adapted to be fitted on and hooked to the bump cap, thereby preventing the plate cap from coming off the bump cap.

Abstract: A gas spring in which the piston rod is connected to a piston with a through-hole bored therethrough which is disposed in the cylinder filled with high pressure gas and oil and the spring action is effected by axial movement of the piston rod, characterized in that, when the piston rod is fully pushed into the cylinder, the oil reservoir formed within the cylinder is closed, yielding an ample sealing effect; and when the piston rod is fully pulled out of the cylinder, the high pressure gas can be filled along the piston rod into the cylinder without being hindered by the oil in the cylinder.

Abstract: A ball joint including a socket member having a recess therein for rockingly receiving a ball end of a ball member, and a retaining ring for retaining the ball end in the recess. The socket member is made of synthetic resin, and an annular plate member formed of metal is fitted in the recess for transmitting the force acting on the retaining ring from the ball member to the socket member.

Abstract: A ball joint including a ball member having a ball end, a socket member having a recess for pivotally receiving the ball end of the ball member and a retaining ring received in the recess of the socket member for retaining the ball end of the ball member in the recess. The socket member consists of at least two components of synthetic resin material, and the components are welded together by supersonic welding process.

Abstract: An analog-to-digital converting circuit comprises an input, a clock signal circuit providing first and second clock signals having the same frequency but having a half-cycle phase difference therebetween; first and second analog-to-digital converting stages each having an input coupled to the converting circuit input for receiving an input analog signal, a control terminal for receiving a respective one of the first and second control clock signals, and an output providing an N-bit binary-coded digital signal representing the level of the input analog signal, each having a voltage quantizing interval of .DELTA.V; an output terminal; and a multiplexing circuit, such as a parallel-to-serial converter, for alternately applying to the output terminal the binary coded digital signals of the first and the second analog-to-digital converting stages.

Abstract: A velocity error compensator adapted for use in a time base corrector of the type which includes a main memory into which individual periods, such as horizontal line intervals, of information signals, such as video signals, are written at a write-in rate synchronized with the information signals, and from which the individual periods of information signals are read out at a reference read-out rate. The velocity error compensator includes a storage device for storing velocity error signals associated with corresponding ones of the periods of information signals. The velocity error signal associated with the period of information signals then read out from the main memory, and also the velocity error signals associated with the preceding and next-following periods of information signals are simultaneously read out from the storage device. These three velocity error signals are combined to produce a velocity error correction signal which is used to modulate the information signal read-out rate.

Abstract: In apparatus for reproducing a signal recorded on a magnetic tape or other record medium and which includes a signal band containing an information signal, such as the chrominance component of a color video signal, and a reference signal of a predetermined frequency occurring only during spaced intervals, such as, the burst signal; the mentioned band of the reproduced signal is applied to a variable gain amplifier for controlling the level of the chrominance component, a burst gate receives the level-controlled output of the amplifier and is gated during the intervals of the burst signal to provide an output during each such interval, a crystal filter tuned to the frequency of the burst signal receives the output of the burst gate so as to pass only the burst signal, and the gain of the variable gain amplifier is controlled in accordance with the combined levels of the outputs of the burst gate and the crystal filter, respectively.

Abstract: A white level clipping circuit has an impedance element through which a video signal is supplied from an input terminal to an output terminal, the emitter of a PNP-type transistor is connected to the output side of the impedance element and the collector thereof is grounded while the base of the transistor is supplied with a constant bias voltage to effect white level clipping of the video signal derived at the output terminal. This clipping circuit carries out positive clipping operation with no frequency characteristics and hence avoids possible overmodulation when the clipped video signal is frequency-modulated for the recording thereof.