Patents by Inventor Shinji Mori

Shinji Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220310640
    Abstract: A semiconductor storage device includes a first conductive layer that extends in a first direction; a second conductive layer that extends in the first direction and is arranged with the first conductive layer in a second direction; a first insulating layer that is provided between the first conductive layer and the second conductive layer; a semiconductor layer that extends in the second direction and faces the first conductive layer, the second conductive layer, and the first insulating layer in a third direction; a first charge storage layer that is provided between the first conductive layer and the semiconductor layer; a second charge storage layer that is provided between the second conductive layer and the semiconductor layer; a first high dielectric constant layer that is provided between the first conductive layer and the first charge storage layer; and a second high dielectric constant layer provided between the second conductive layer and the second charge storage layer.
    Type: Application
    Filed: August 30, 2021
    Publication date: September 29, 2022
    Applicant: Kioxia Corporation
    Inventors: Natsuki FUKUDA, Ryota NARASAKI, Takashi KURUSU, Yuta KAMIYA, Kazuhiro MATSUO, Shinji MORI, Shoji HONDA, Takafumi OCHIAI, Hiroyuki YAMASHITA, Junichi KANEYAMA, Ha HOANG, Yuta SAITO, Kota TAKAHASHI, Tomoki ISHIMARU, Kenichiro TORATANI
  • Publication number: 20220302162
    Abstract: According to one embodiment, a semiconductor storage device includes a plurality of electrode films on a substrate, spaced from one another in a first direction. A charge storage film is provided on a side face the electrode films via a first insulating film. A semiconductor film is provided on a side face of the charge storage film via a second insulating film. The charge storage film includes a plurality of insulator regions contacting the first insulating film, a plurality of semiconductor or conductor regions provided between the insulator regions and another insulator region.
    Type: Application
    Filed: August 26, 2021
    Publication date: September 22, 2022
    Inventors: Hiroyuki Yamashita, Yuta Saito, Keiichi Sawa, Kazuhiro Matsuo, Yuta Kamiya, Shinji Mori, Kota Takahashi, Junichi Kaneyama, Tomoki Ishimaru, Kenichiro Toratani, Ha Hoang, Shouji Honda, Takafumi Ochiai
  • Publication number: 20220301896
    Abstract: A substrate processing apparatus includes a chamber, a supply pipe, a discharge pipe, a trap section, a heater, a buffer section, and a cooling pipe. The chamber houses a substrate. The supply pipe supplies a processing gas into the chamber. The discharge pipe discharges a gas produced in the chamber. The trap section is disposed in the discharge pipe. The heater heats the trap section. The buffer section is disposed downstream of the trap section in the discharge pipe. The cooling pipe cools the buffer section.
    Type: Application
    Filed: August 20, 2021
    Publication date: September 22, 2022
    Applicant: Kioxia Corporation
    Inventors: Yoshinori TOKUDA, Toshiaki YANASE, Shinji MORI
  • Publication number: 20220262954
    Abstract: A semiconductor device of an embodiment includes a first electrode, a second electrode, a first metallic region provided between the first electrode and the second electrode and includes at least one metallic element selected from the group consisting of indium (In), gallium (Ga), zinc (Zn), aluminum (Al), magnesium (Mg), manganese (Mn), titanium (Ti), tungsten (W), molybdenum (Mo), and tin (Sn), a second metallic region provided between the first metallic region and the second electrode and includes the at least one metallic element, a semiconductor region provided between the first metallic region and the second metallic region and includes the at least one metallic element and oxygen (O), an insulating region provided between the first metallic region and the second metallic region and is surrounded by the semiconductor region, a gate electrode surrounding the semiconductor region, and a gate insulating layer provided between the semiconductor region and the gate electrode.
    Type: Application
    Filed: May 2, 2022
    Publication date: August 18, 2022
    Applicant: Kioxia Corporation
    Inventors: Tomoki ISHIMARU, Shinji MORI, Kazuhiro MATSUO, Keiichi SAWA, Akifumi GAWASE
  • Publication number: 20220246640
    Abstract: In one embodiment, a semiconductor device includes a substrate, insulating films and first films alternately stacked on the substrate, at least one of the first films including an electrode layer and a charge storage layer provided on a face of the electrode layer via a first insulator, and a semiconductor layer provided on a face of the charge storage layer via a second insulator. The device further includes at least one of a first portion including nitrogen and provided between the first insulator and the charge storage layer with an air gap provided in the first insulator, a second portion including nitrogen, provided between the charge storage layer and the second insulator, and including a portion protruding toward the charge storage layer, and a third portion including nitrogen and provided between the second insulator and the semiconductor layer with an air gap provided in the first insulator.
    Type: Application
    Filed: April 20, 2022
    Publication date: August 4, 2022
    Applicant: KIOXIA CORPORATION
    Inventors: Keiichi SAWA, Kazuhiro MATSUO, Kazuhisa MATSUDA, Hiroyuki YAMASHITA, Yuta SAITO, Shinji MORI, Masayuki TANAKA, Kenichiro TORATANI, Atsushi TAKAHASHI, Shouji HONDA
  • Patent number: 11404437
    Abstract: A semiconductor device includes a semiconductor layer containing metal atoms, a charge storage layer provided on a surface of the semiconductor layer via a first insulating film, and an electrode layer provided on a surface of the charge storage layer via a second insulating film. The thickness of the first insulating film is 5 nm or more and 10 nm or less. The concentration of the metal atoms in the semiconductor layer is 5.0×1017 [EA/cm3] or higher and 1.3×1020 [EA/cm3] or lower.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: August 2, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Yuta Saito, Shinji Mori, Keiichi Sawa, Kazuhisa Matsuda, Kazuhiro Matsuo, Hiroyuki Yamashita
  • Patent number: 11398494
    Abstract: In one embodiment, a semiconductor storage device includes a stacked body in which a plurality of conducting layers are stacked through a plurality of insulating layers in a first direction, a semiconductor layer penetrating the stacked body, extending in the first direction and including metal atoms, and a memory film including a first insulator, a charge storage layer and a second insulator that are provided between the stacked body and the semiconductor layer. The semiconductor layer surrounds a third insulator penetrating the stacked body and extending in the first direction, and at least one crystal grain in the semiconductor layer has a shape surrounding the third insulator.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: July 26, 2022
    Assignee: Kioxia Corporation
    Inventors: Yuta Saito, Shinji Mori, Atsushi Takahashi, Toshiaki Yanase, Keiichi Sawa, Kazuhiro Matsuo, Hiroyuki Yamashita
  • Publication number: 20220189989
    Abstract: A semiconductor device includes a stacked film of electrode layers and insulating layers. A charge storage layer is in a hole in the stacked film on a first insulating film. A channel layer is on the charge storage layer via a second insulating film. An adsorption promoting layer is on surfaces of a third insulating layer covering the insulating layers and the first insulating film facing the electrode layers. The third insulating film includes a first metal element and a first element, and the adsorption promoting layer includes a second element and a third element. The difference in electronegativity between the second element and the third element is larger than a difference in electronegativity between the first metal element and the first element.
    Type: Application
    Filed: August 24, 2021
    Publication date: June 16, 2022
    Inventors: Masaya TODA, Kota TAKAHASHI, Kazuhiro MATSUO, Yuta KAMIYA, Shinji MORI, Kenichiro TORATANI
  • Patent number: 11349033
    Abstract: A semiconductor device of an embodiment includes a first electrode, a second electrode, a first metallic region provided between the first electrode and the second electrode and includes at least one metallic element selected from the group consisting of indium (In), gallium (Ga), zinc (Zn), aluminum (Al), magnesium (Mg), manganese (Mn), titanium (Ti), tungsten (W), molybdenum (Mo), and tin (Sn), a second metallic region provided between the first metallic region and the second electrode and includes the at least one metallic element, a semiconductor region provided between the first metallic region and the second metallic region and includes the at least one metallic element and oxygen (O), an insulating region provided between the first metallic region and the second metallic region and is surrounded by the semiconductor region, a gate electrode surrounding the semiconductor region, and a gate insulating layer provided between the semiconductor region and the gate electrode.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: May 31, 2022
    Assignee: Kioxia Corporation
    Inventors: Tomoki Ishimaru, Shinji Mori, Kazuhiro Matsuo, Keiichi Sawa, Akifumi Gawase
  • Patent number: 11335699
    Abstract: In one embodiment, a semiconductor device includes a substrate, insulating films and first films alternately stacked on the substrate, at least one of the first films including an electrode layer and a charge storage layer provided on a face of the electrode layer via a first insulator, and a semiconductor layer provided on a face of the charge storage layer via a second insulator. The device further includes at least one of a first portion including nitrogen and provided between the first insulator and the charge storage layer with an air gap provided in the first insulator, a second portion including nitrogen, provided between the charge storage layer and the second insulator, and including a portion protruding toward the charge storage layer, and a third portion including nitrogen and provided between the second insulator and the semiconductor layer with an air gap provided in the first insulator.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: May 17, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Keiichi Sawa, Kazuhiro Matsuo, Kazuhisa Matsuda, Hiroyuki Yamashita, Yuta Saito, Shinji Mori, Masayuki Tanaka, Kenichiro Toratani, Atsushi Takahashi, Shouji Honda
  • Publication number: 20210358925
    Abstract: A memory device of an embodiment includes a stacked body including a plurality of insulating layers and a plurality of gate electrode layers alternately stacked in a first direction, a semiconductor layer provided in the stacked body and extending in the first direction, and a gate insulating layer provided between the semiconductor layer and the gate electrode layer, the gate insulating layer including a first region including a first oxide containing at least one of hafnium oxide or zirconium oxide, the first region including an orthorhombic crystal, and the first region including at least one first element selected from the group consisting of carbon (C), nitrogen (N), chlorine (Cl), boron (B), hydrogen (H), fluorine (F), helium (He), and argon (Ar).
    Type: Application
    Filed: March 8, 2021
    Publication date: November 18, 2021
    Applicant: Kioxia Corporation
    Inventors: Kota TAKAHASHI, Kazuhiro MATSUO, Shinji MORI, Yuta KAMIYA, Kenichiro TORATANI
  • Publication number: 20210305431
    Abstract: A semiconductor device of an embodiment includes a first electrode, a second electrode, a first metallic region provided between the first electrode and the second electrode and includes at least one metallic element selected from the group consisting of indium (In), gallium (Ga), zinc (Zn), aluminum (Al), magnesium (Mg), manganese (Mn), titanium (Ti), tungsten (W), molybdenum (Mo), and tin (Sn), a second metallic region provided between the first metallic region and the second electrode and includes the at least one metallic element, a semiconductor region provided between the first metallic region and the second metallic region and includes the at least one metallic element and oxygen (O), an insulating region provided between the first metallic region and the second metallic region and is surrounded by the semiconductor region, a gate electrode surrounding the semiconductor region, and a gate insulating layer provided between the semiconductor region and the gate electrode.
    Type: Application
    Filed: September 16, 2020
    Publication date: September 30, 2021
    Applicant: Kioxia Corporation
    Inventors: Tomoki ISHIMARU, Shinji MORI, Kazuhiro MATSUO, Keiichi SAWA, Akifumi GAWASE
  • Publication number: 20210296347
    Abstract: According to one embodiment, a semiconductor memory device includes: a first semiconductor layer; first and second insulating layers in contact with the first semiconductor layer; a second semiconductor layer in contact with the first insulating layer; a third semiconductor layer in contact with the second insulating layer; a first conductor; a third insulating layer in contact with the first conductor; a fourth insulating layer provided between the second semiconductor layer and the third insulating layer; a first charge storage layer provided between the second semiconductor layer and the fourth insulating layer; and a fifth insulating layer provided between the second semiconductor layer and the first charge storage layer. The second semiconductor layer, the first conductor, the third to fifth insulating layers, and the first charge storage layer function as a first memory cell.
    Type: Application
    Filed: September 10, 2020
    Publication date: September 23, 2021
    Applicant: Kioxia Corporation
    Inventors: Yuta SAITO, Shinji MORI, Keiji HOSOTANI, Daisuke HAGISHIMA, Atsushi TAKAHASHI
  • Publication number: 20210118906
    Abstract: In one embodiment, a semiconductor device includes a substrate, insulating films and first films alternately stacked on the substrate, at least one of the first films including an electrode layer and a charge storage layer provided on a face of the electrode layer via a first insulator, and a semiconductor layer provided on a face of the charge storage layer via a second insulator. The device further includes at least one of a first portion including nitrogen and provided between the first insulator and the charge storage layer with an air gap provided in the first insulator, a second portion including nitrogen, provided between the charge storage layer and the second insulator, and including a portion protruding toward the charge storage layer, and a third portion including nitrogen and provided between the second insulator and the semiconductor layer with an air gap provided in the first insulator.
    Type: Application
    Filed: December 29, 2020
    Publication date: April 22, 2021
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Keiichi SAWA, Kazuhiro MATSUO, Kazuhisa MATSUDA, Hiroyuki YAMASHITA, Yuta SAITO, Shinji MORI, Masayuki TANAKA, Kenichiro TORATANI, Atsushi TAKAHASHI, Shouji HONDA
  • Patent number: 10964716
    Abstract: A semiconductor device comprises a substrate. A plurality of electrode layers and a plurality of insulating layers are formed in an alternating stack above the substrate. A semiconductor column extends through the plurality of electrode layers and the plurality of insulating layers. The semiconductor column comprises a single-crystal semiconductor material on an outer peripheral surface facing the electrode and insulating layers. First insulating films are formed between the semiconductor column and the electrode layers. The first insulating films are spaced from each other along the column length. Each first insulating film corresponds to one electrode layer. A charge storage layer is between each of the first insulating films and the electrode layers. A second insulating film is between the charge storage layer and each of the electrode layers.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: March 30, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Shinji Mori, Kazuhiro Matsuo, Yuta Saito, Keiichi Sawa, Kazuhisa Matsuda, Atsushi Takahashi, Masayuki Tanaka, Kenichiro Toratani
  • Patent number: 10923487
    Abstract: A semiconductor memory device includes a channel layer and a gate electrode. A first insulating layer is between the semiconductor layer and the gate electrode. A second insulating layer is between the first insulating layer and the gate electrode. A storage region is between the first insulating layer and the second insulating layer. The storage region comprises metal or semiconductor material. A coating layer comprises silicon and nitrogen and surrounds the storage region. The coating layer is between the storage region and the second insulating layer and between the storage region and the first insulating layer.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: February 16, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Hiroyuki Yamashita, Shinji Mori, Keiichi Sawa, Kazuhiro Matsuo, Kazuhisa Matsuda, Yuta Saito, Atsushi Takahashi, Masayuki Tanaka
  • Patent number: 10910401
    Abstract: In one embodiment, a semiconductor device includes a substrate, insulating films and first films alternately stacked on the substrate, at least one of the first films including an electrode layer and a charge storage layer provided on a face of the electrode layer via a first insulator, and a semiconductor layer provided on a face of the charge storage layer via a second insulator. The device further includes at least one of a first portion including nitrogen and provided between the first insulator and the charge storage layer with an air gap provided in the first insulator, a second portion including nitrogen, provided between the charge storage layer and the second insulator, and including a portion protruding toward the charge storage layer, and a third portion including nitrogen and provided between the second insulator and the semiconductor layer with an air gap provided in the first insulator.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: February 2, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Keiichi Sawa, Kazuhiro Matsuo, Kazuhisa Matsuda, Hiroyuki Yamashita, Yuta Saito, Shinji Mori, Masayuki Tanaka, Kenichiro Toratani, Atsushi Takahashi, Shouji Honda
  • Publication number: 20210013225
    Abstract: In one embodiment, a semiconductor storage device includes a stacked body in which a plurality of conducting layers are stacked through a plurality of insulating layers in a first direction, a semiconductor layer penetrating the stacked body, extending in the first direction and including metal atoms, and a memory film including a first insulator, a charge storage layer and a second insulator that are provided between the stacked body and the semiconductor layer. The semiconductor layer surrounds a third insulator penetrating the stacked body and extending in the first direction, and at least one crystal grain in the semiconductor layer has a shape surrounding the third insulator.
    Type: Application
    Filed: March 5, 2020
    Publication date: January 14, 2021
    Applicant: Kioxia Corporation
    Inventors: Yuta SAITO, Shinji MORI, Atsushi TAKAHASHI, Toshiaki YANASE, Keiichi SAWA, Kazuhiro MATSUO, Hiroyuki YAMASHITA
  • Publication number: 20200373328
    Abstract: A semiconductor device includes a semiconductor layer containing metal atoms, a charge storage layer provided on a surface of the semiconductor layer via a first insulating film, and an electrode layer provided on a surface of the charge storage layer via a second insulating film. The thickness of the first insulating film is 5 nm or more and 10 nm or less. The concentration of the metal atoms in the semiconductor layer is 5.0×1017 [EA/cm3] or higher and 1.3×1020 [EA/cm3] or lower.
    Type: Application
    Filed: August 14, 2020
    Publication date: November 26, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Yuta SAITO, Shinji MORI, Keiichi SAWA, Kazuhisa MATSUDA, Kazuhiro MATSUO, Hiroyuki YAMASHITA
  • Publication number: 20200295035
    Abstract: In one embodiment, a semiconductor device includes a substrate, insulating films and first films alternately stacked on the substrate, at least one of the first films including an electrode layer and a charge storage layer provided on a face of the electrode layer via a first insulator, and a semiconductor layer provided on a face of the charge storage layer via a second insulator. The device further includes at least one of a first portion including nitrogen and provided between the first insulator and the charge storage layer with an air gap provided in the first insulator, a second portion including nitrogen, provided between the charge storage layer and the second insulator, and including a portion protruding toward the charge storage layer, and a third portion including nitrogen and provided between the second insulator and the semiconductor layer with an air gap provided in the first insulator.
    Type: Application
    Filed: September 3, 2019
    Publication date: September 17, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Keiichi SAWA, Kazuhiro MATSUO, Kazuhisa MATSUDA, Hiroyuki YAMASHITA, Yuta SAITO, Shinji MORI, Masayuki TANAKA, Kenichiro TORATANI, Atsushi TAKAHASHI, Shouji HONDA