Abstract: A nonvolatile semiconductor storage device has a plurality of memory strings in which electrically rewritable memory cells are connected in series. The memory strings have word-line electroconductive layers laminated at a prescribed interval to sandwich an interlayer insulating film onto a semiconductor substrate and through holes that penetrate through the word-line electroconductive layers and the interlayer insulating films. The gate insulating film is formed along an inner wall of the through holes and includes a charge-accumulating film. The columnar semiconductor layer is formed inside the through holes to sandwich the gate insulating film along with the word-line electroconductive layer. The columnar semiconductor layer contains carbon, oxygen, or nitrogen.

Abstract: In a webbing take-up device, the overall lengths of pistons are set shorter than a separation between bent portions. Moreover, the overall length of a piston is set even shorter than the shorter separation out of a separation between the bent portions, and a separation between bent portions. Pistons do not straddle the bent portion and the bent portion, and do not straddle the bent portion and the bent portion. This enables the pistons to easily arrive at their initial disposed positions inside a cylinder.

Abstract: A webbing retractor that can alleviate the load on a reducing balance spring without increasing cost and weight is obtained. When a ring inertially rotates in a retraction direction together with a ratchet gear, a ring-side pressing portion of a load receiving portion accommodating portion formed in the ring presses a spring-side load receiving portion of a clutch spring in the retraction direction. Due to this, the clutch spring is loosened, whereby the ring can easily inertially rotate in the retraction direction together with the ratchet gear, and the load acting on a reducing balance spring can be alleviated.

Abstract: According to one embodiment, a method includes forming a first SiGe layer having a first profile of a concentration of Ge on a semiconductor substrate, forming a second SiGe layer having a second profile of a concentration of Ge on the first SiGe layer, the second profile lower than a first peak of the first profile, forming a mask layer on the second SiGe layer, etching the first and second SiGe layers by anisotropic etching using the mask layer as a mask to form trenches, selectively removing the first SiGe layer exposed into the trenches to form a cavity under the second SiGe layer, and oxidizing side and lower surfaces of the second SiGe layer exposed in the trenches and the cavity to increase the concentration of Ge in the second SiGe layer.

Abstract: A non-volatile semiconductor memory device according to an embodiment includes a semiconductor substrate and a transistor provided on the semiconductor substrate. The transistor includes a conductive layer, a gate insulating layer, a semiconductor layer, and an oxidation layer. The conductive layer functions as a gate of the transistor. The gate insulating layer contacts with a side surface of the conductive layer. The semiconductor layer has a side surface sandwiching the gate insulating layer with the conductive layer, extends a direction perpendicular to the semiconductor substrate, and functions as a body of the transistor. The oxidation layer contacts with the other side surface of the semiconductor layer. The semiconductor layer is made of silicon germanium. The oxidation layer is made of a silicon oxide.

Abstract: According to one embodiment, a method includes forming a first SiGe layer having a first profile of a concentration of Ge on a semiconductor substrate, forming a second SiGe layer having a second profile of a concentration of Ge on the first SiGe layer, the second profile lower than a first peak of the first profile, forming a mask layer on the second SiGe layer, etching the first and second SiGe layers by anisotropic etching using the mask layer as a mask to form trenches, selectively removing the first SiGe layer exposed into the trenches to form a cavity under the second SiGe layer, and oxidizing side and lower surfaces of the second SiGe layer exposed in the trenches and the cavity to increase the concentration of Ge in the second SiGe layer.

Abstract: A webbing take-up device which can improve the workability of the assembly work of a tension reducer is obtained. In this webbing take-up device, a take-up spring unit is arranged closer to the opening side of a case than a reduction spring unit within a case. For this reason, when a clutch is arranged inside the reduction balance spring and the inner end of the reduction balance spring in a spiral direction is locked to a spring case of the clutch, the clutch and the reduction balance spring can be easily and visually recognized from the opening side of the case. Thus, the other end of the reduction balance spring can be easily locked to the spring case.

Abstract: According to one embodiment, a semiconductor device, including a substrate, a stacked layer body provided above the substrate, the stacked layer body alternately stacking an insulator and an electrode film one on another, silicon pillars contained with fluorine, the silicon pillar penetrating through and provided in the stacked layer body, a tunnel insulator provided on a surface of the silicon pillar facing to the stacked layer body, a charge storage layer provided on a surface of the tunnel insulator facing to the stacked layer body, a block insulator provided on a surface of the charge storage layer facing to the stacked layer body, the block insulator being in contact with the electrode film, and an embedded portion provided in the silicon pillars.

Abstract: According to one embodiment, a semiconductor device, including a substrate, a stacked layer body provided above the substrate, the stacked layer body alternately stacking an insulator and an electrode film one on another, silicon pillars contained with fluorine, the silicon pillar penetrating through and provided in the stacked layer body, a tunnel insulator provided on a surface of the silicon pillar facing to the stacked layer body, a charge storage layer provided on a surface of the tunnel insulator facing to the stacked layer body, a block insulator provided on a surface of the charge storage layer facing to the stacked layer body, the block insulator being in contact with the electrode film, and an embedded portion provided in the silicon pillars.

Abstract: A nonvolatile semiconductor storage device has a plurality of memory strings in which electrically rewritable memory cells are connected in series. The memory strings have word-line electroconductive layers laminated at a prescribed interval to sandwich an interlayer insulating film onto a semiconductor substrate and through holes that penetrate through the word-line electroconductive layers and the interlayer insulating films. The gate insulating film is formed along an inner wall of the through holes and includes a charge-accumulating film. The columnar semiconductor layer is formed inside the through holes to sandwich the gate insulating film along with the word-line electroconductive layer. The columnar semiconductor layer contains carbon, oxygen, or nitrogen.

Abstract: A method of fabricating a semiconductor device according to one embodiment includes: exposing a surface of a semiconductor substrate to a halogen-containing gas that contains at least one of Si and Ge, the semiconductor substrate being provided with a member comprising an oxide and consisting mainly of Si; and exposing the surface of the semiconductor substrate to an atmosphere containing at least one of a Si-containing gas not containing halogen and a Ge-containing gas not containing halogen after starting exposure of the surface of the semiconductor substrate to the halogen-containing gas, thereby epitaxially growing a crystal film containing at least one of Si and Ge on the surface.

Abstract: A method of manufacturing a semiconductor device comprising: forming a first insulating film on a semiconductor substrate; forming an adsorption film on the first insulating film; forming a first film containing germanium on the adsorption film; forming a second insulating film on the first film; forming a floating electrode film on the second insulating film; forming a third insulating film on the floating electrode film; and forming a gate electrode on the third insulating film.

Abstract: A non-volatile semiconductor storage device according to one embodiment of the present application has a memory cell array that includes at least one memory string, a first select transistor, and a second select transistor on a substrate in a lattice form. The first select transistor is electrically connected to a first end of the memory string. The second select transistor is electrically connected to a second end of the memory string. The memory string includes a columnar portion. Multiple memory cells are formed in the columnar portion by multiple conductive layers, multiple insulating layers, a first insulating layer, a charge accumulation layer, a second insulating layer, and a memory channel layer, and are serially connected. The memory channel layer comprises silicon germanium doped with phosphorus.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device is provided in which memory strings, which are formed by providing a plurality of transistors having gate electrode films on sides of columnar semiconductor films in a height direction of the columnar semiconductor films via charge storage layers, are substantially perpendicularly arranged in a matrix shape on a substrate. A coupling section made of a semiconductor material that connects lower portions of the columnar semiconductor films forming a pair of the memory strings adjacent to each other in a predetermined direction is provided. Each of the columnar semiconductor films is formed of a generally single-crystal-like germanium film or silicon germanium film.

Abstract: According to one embodiment, a semiconductor memory device includes a semiconductor substrate, memory cell array portion, single-crystal semiconductor layer, and circuit portion. The memory cell array portion is formed on the semiconductor substrate, and includes memory cells. The semiconductor layer is formed on the memory cell array portion, and connected to the semiconductor substrate by being formed in a hole extending through the memory cell array portion. The circuit portion is formed on the semiconductor layer. The Ge concentration in the lower portion of the semiconductor layer is higher than that in the upper portion of the semiconductor layer.

Abstract: In a V-sensor of a webbing take-up device, concave portions are formed in supporting walls of a supporting member having a spring property, and peak ends of a rotating shaft of a sensor pawl gets into the concave portions, and the rotating shaft is thereby supported by the supporting walls. Cone-shaped concave portions come into contact by pressure with the cone-shaped peak ends of the rotating shaft due to the elasticity of the supporting walls, and therefore, when the rotating shaft attempts to be displaced in the axis direction thereof and in a direction orthogonal to the axis direction of the rotating shaft, the elasticity of the supporting walls withstand displacement of the rotating shaft. As a result, occurrence of a rattle of the rotating shaft, that is, the sensor pawl can be prevented or restrained.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device is provided in which memory strings, which are formed by providing a plurality of transistors having gate electrode films on sides of columnar semiconductor films in a height direction of the columnar semiconductor films via charge storage layers, are substantially perpendicularly arranged in a matrix shape on a substrate. A coupling section made of a semiconductor material that connects lower portions of the columnar semiconductor films forming a pair of the memory strings adjacent to each other in a predetermined direction is provided. Each of the columnar semiconductor films is formed of a generally single-crystal-like germanium film or silicon germanium film.

Abstract: A non-volatile semiconductor memory device according to an embodiment includes a semiconductor substrate and a transistor provided on the semiconductor substrate. The transistor includes a conductive layer, a gate insulating layer, a semiconductor layer, and an oxidation layer. The conductive layer functions as a gate of the transistor. The gate insulating layer contacts with a side surface of the conductive layer. The semiconductor layer has a side surface sandwiching the gate insulating layer with the conductive layer, extends a direction perpendicular to the semiconductor substrate, and functions as a body of the transistor. The oxidation layer contacts with the other side surface of the semiconductor layer. The semiconductor layer is made of silicon germanium. The oxidation layer is made of a silicon oxide.

Abstract: In a vehicle pop-up hood apparatus in which a rod is extended and a hood is pushed up by the operation of an actuator at a time of collision with a collision body, collision energy is absorbed with high efficiency when a collision load of a predetermined value or greater is input to an area near a hood pushed up position. Actuator (18) operates such that rod (20) moves in an axial direction toward a hood upper side, pushes up a rear edge side of hood rocker (12) and holds it at that position and, in that state, when a collision load of a predetermined value or greater acts from a hood upper side to near the pushed up position of the hood, push portion (54) slides along pushed up surface (38) of hinge arm (30) towards a vehicle rear side, and rod (20) is made to bend in conjunction therewith.

Abstract: A semiconductor device includes a first pMISFET region having an Si channel, a second pMISFET region having an Si channel and an nMISFET region having an Si channel. First SiGe layers which apply first compression strain to the Si channel are embedded and formed in the first pMISFET region to sandwich the Si channel thereof and second SiGe layers which apply second compression strain different from the first compression strain to the Si channel are embedded and formed in the second pMISFET region to sandwich the Si channel thereof.