Patents by Inventor Shinji Tanaka

Shinji Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200251511
    Abstract: The present disclosure relates to a solid-state imaging apparatus that can further downsize the size of the apparatus. The solid-state imaging apparatus is configured by laminating a first structure body, at which a pixel array unit in which pixels for performing photoelectric conversion are two-dimensionally aligned is formed, and a second structure body, at which an output circuit unit for outputting a pixel signal outputted from the pixels to the outside of the apparatus is formed. The output circuit unit, a through via which penetrates a semiconductor substrate constituting a part of the second structure body, and a signal output external terminal connected to the outside of the apparatus are arranged under the pixel array unit of the first structure body, the output circuit unit is connected to the signal output external terminal via the through via, and the outermost surface of the apparatus is a resin layer formed on an upper layer of an on-chip lens of the pixel array unit.
    Type: Application
    Filed: April 21, 2020
    Publication date: August 6, 2020
    Applicant: SONY CORPORATION
    Inventors: Harumi TANAKA, Yoshiaki MASUDA, Shinji MIYAZAWA, Minoru ISHIDA
  • Publication number: 20200239425
    Abstract: An object of the present invention is to provide a compound having an anti-inflammatory activity or a pharmacologically acceptable salt thereof. The solution of the present invention is a compound of general formula (1) or a pharmacologically acceptable salt thereof. wherein the symbols in the formula are defined below: R1: e.g., a C1-C6 alkyl group; R2: a C1-C6 alkyl group; A: e.g., an oxygen atom; and R3: e.g., a C1-C6 alkyl group.
    Type: Application
    Filed: April 9, 2020
    Publication date: July 30, 2020
    Applicant: Daiichi Sankyo Company, Limited
    Inventors: Keiji Saito, Katsuyoshi Nakajima, Toru Taniguchi, Osamu Iwamoto, Satoshi Shibuya, Yasuyuki Ogawa, Kazumasa Aoki, Nobuya Kurikawa, Shinji Tanaka, Momoko Ogitani, Eriko Kioi, Kaori Ito, Natsumi Nishihama, Tsuyoshi Mikkaichi, Wataru Saitoh
  • Patent number: 10725402
    Abstract: An intermediate transfer belt has a first region and a second region in an outer circumferential surface thereof that is in contact with a blade. The first region has a first dynamic friction coefficient in a belt conveyance direction, and the second region has a second dynamic friction coefficient. The distance of the second region in the belt conveyance direction is less than the distance of the first region and is greater than the distance of a contact portion in which the blade is in contact with the intermediate transfer belt.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: July 28, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventors: Keisuke Ishizumi, Shohei Ishio, Shinji Katagiri, Takayuki Tanaka, Tsuguhiro Yoshida, Shuichi Tetsuno
  • Patent number: 10718310
    Abstract: An ignition apparatus includes a plasma device, a first circuit, a second circuit, and a control unit. The plasma device produces a plasma discharge in an air-fuel mixture before an arc discharge is produced. The first circuit causes an ignition plug to start the arc discharge. The second circuit energizes a primary coil in a direction opposite to the direction of the energization by the first circuit during the arc discharge, to maintain energization of the secondary coil in the same direction as the direction of the energization started by an operation of the first circuit, to cause continuation of the arc discharge. The control unit controls operations of the first circuit, the second circuit, and the plasma device.
    Type: Grant
    Filed: August 23, 2016
    Date of Patent: July 21, 2020
    Assignees: DENSO CORPORATION, THE UNIVERSITY OF TOKYO
    Inventors: Masaaki Kono, Daisuke Tanaka, Takaaki Sato, Akimitsu Sugiura, Mitsuhiro Tsue, Shinji Nakaya
  • Patent number: 10705143
    Abstract: An object of the present invention is to provide a highly-reliable content addressable memory. Provided is a content addressable memory including: a plurality of CAM cells; a word line joined to the CAM cells; a plurality of bit lines joined to the CAM cells; a plurality of search lines joined to the CAM cells; a match line joined to the CAM cells; a match amplifier joined to the match line; and a selection circuit that can select the output of the match amplifier in accordance with the value of the word line.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: July 7, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Makoto Yabuuchi, Shinji Tanaka
  • Patent number: 10705164
    Abstract: A pair of detection coils, one coil provided on each side of a sample container across the width of the sample container. The detection coil is made of a superconductor and has an electric circuit pattern capable of detecting a magnetic resonance signal from a sample. The detection coil includes a lateral component intersectional to a static magnetic field H0 and having a part disposed at a position spaced away from a detection region, as compared to the remaining part.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: July 7, 2020
    Assignee: JEOL Ltd.
    Inventors: Fumio Hobo, Katsuyuki Toshima, Shinji Nakamura, Shigenori Tsuji, Ryoji Tanaka, Hiroto Suematsu
  • Patent number: 10700306
    Abstract: A light emitting apparatus (10) includes a substrate (100), an insulating layer (160), a light emitting element (102), a coating film (140), and a structure (150). The insulating layer (160) is formed over one surface of the substrate (100), and includes an opening (162). The light emitting element (102) is formed in the opening (162). The coating film (140) is formed over the one surface of the substrate (100), and covers a portion of the light emitting element (102), the insulating layer (160), and the one surface of the substrate (100). The coating film (140) does not cover another portion of the substrate (100) (for example, a portion of an end portion: hereinafter, referred to as a first portion). The structure (150) is located between the first portion of the substrate (100) and the insulating layer (160). The coating film (140) also covers the insulating layer (160).
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: June 30, 2020
    Assignee: PIONEER CORPORATION
    Inventors: Koji Fujita, Shinsuke Tanaka, Yuji Saito, Shinji Nakajima
  • Publication number: 20200202923
    Abstract: A semiconductor device capable of improving operating margins is provided. The semiconductor device comprises a memory circuit including a memory cell comprised of a SOTB transistor, and a mode designation circuit switching operation modes of the memory circuit for a first mode or a second mode. The memory circuit includes a substrate bias generation circuit supplying a substrate bias voltage to the SOTB transistor and a timing signal generation circuit generating a timing signal used for a reading operation or a writing operation of the memory circuit. The substrate bias generation circuit does not supply the substrate bias voltage to the SOTB transistor in the second mode.
    Type: Application
    Filed: October 30, 2019
    Publication date: June 25, 2020
    Inventors: Makoto YABUUCHI, Shinji TANAKA
  • Publication number: 20200181748
    Abstract: This free-cutting copper alloy comprises 76.0-78.7% Cu, 3.1-3.6% Si, 0.40-0.85% Sn, 0.05-0.14% P, and at least 0.005% to less than 0.020% Pb, with the remainder comprising Zn and inevitable impurities. The composition satisfies the following relations: 75.0?f1=Cu+0.8×Si?7.5×Sn+0.5×Pb?78.2; 60.0?f2=Cu?4.8×Si—0.8×Sn?P+0.5×Pb?61.5; and 0.09?f3=P/Sn?0.30. The area percentage (%) of respective constituent phases satisfies the following relations: 30???65; 0???2.0; 0???0.3; 0???2.0; 96.5?f4=?+?; 99.4?f5=?+?+?+?; 0?f6=?+??3.0; and 35?f7=1.05×?+6×?1/2+0.5×??70. ? phase is present in ? phase, the long side of the ? phase is at most 50 ?m, and the long side of the ? phase is at most 25 ?m.
    Type: Application
    Filed: February 21, 2018
    Publication date: June 11, 2020
    Inventors: Keiichiro Oishi, Kouichi Suzaki, Hiroki Goto, Shinji Tanaka
  • Publication number: 20200175592
    Abstract: A securities trading apparatus includes a memory; and a processor coupled to the memory, the processor configured to: extract transactions from trading transactions stored in the memory, the extracted transactions being one of order transactions or insert transactions, each of the order transactions being a buy order transaction or a sell order transaction; and generate a single trading transaction from the extracted transactions.
    Type: Application
    Filed: November 21, 2019
    Publication date: June 4, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Takeru Kido, SHINJI YAMABIRAKI, Tamaki Tanaka, ATSUHITO HIROSE
  • Patent number: 10672809
    Abstract: The present disclosure relates to a solid-state imaging apparatus that is configured by laminating a first structure body, at which a pixel array unit in which pixels for performing photoelectric conversion are two-dimensionally aligned is formed, and a second structure body, at which an output circuit unit for outputting a pixel signal outputted from the pixels to the outside of the apparatus is formed. The output circuit unit, a through via which penetrates a semiconductor substrate constituting a part of the second structure body, and a signal output external terminal connected to the outside of the apparatus are arranged under the pixel array unit of the first structure body, the output circuit unit is connected to the signal output external terminal via the through via, and the outermost surface of the apparatus is a resin layer formed on an upper layer of an on-chip lens of the pixel array unit.
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: June 2, 2020
    Assignee: Sony Corporation
    Inventors: Harumi Tanaka, Yoshiaki Masuda, Shinji Miyazawa, Minoru Ishida
  • Publication number: 20200165706
    Abstract: This free-cutting copper alloy comprises 75.4-78.7% Cu, 3.05-3.65% Si, 0.10-0.28% Sn, 0.05-0.14% P, and at least 0.005% to less than 0.020% Pb, with the remainder comprising Zn and inevitable impurities. The composition satisfies the following relations: 76.5?f1=Cu+0.8×Si?8.5×Sn+P?80.3; 60.7?f2=Cu?4.6×Si?0.7×Sn?P?62.1; and 0.25?f7=P/Sn?1.0. The area percentage (%) of respective constituent phases satisfies the following relations: 28???67; 0???1.0; 0???0.2; 0???1.5; 97.4?f3=?+?; 99.4?f4=?+?+?+?; 0?f5=?+??2.0; and 30?f6=?+6×?1/2+0.5×??70. The long side of the ? phase is at most 40 ?m, the long side of the ? phase is at most 25 ?m, and ? phase is present in ? phase.
    Type: Application
    Filed: February 21, 2018
    Publication date: May 28, 2020
    Inventors: Keiichiro Oishi, Kouichi Suzaki, Shinji Tanaka, Takayuki Oka
  • Publication number: 20200165772
    Abstract: Functional agent-containing fibers according to an embodiment of the present invention, wherein a functional agent is supported by silicone fixed to the fibers. The silicone includes an acrylic-modified organopolysiloxane having two or more acrylic groups per molecule. A rate of decrease in the functional agent after the functional agent-containing fibers are washed 10 times is less than 40%. In the present invention, the functional agent-containing fibers may be produced, e.g., by irradiating fibers impregnated with a fiber treatment agent A containing silicone with an electron beam so that the silicone is fixed to the fibers, and impregnating the fibers to which the silicone has been fixed with a fiber treatment agent B containing a functional agent. The functional agent-containing fibers may be produced, e.g.
    Type: Application
    Filed: March 26, 2018
    Publication date: May 28, 2020
    Inventors: Shinji IRIFUNE, Tomoya KANAI, Masaki TANAKA, Minoru SUGIYAMA, Hidenobu MORISHIMA, Kazuhiro SATO
  • Publication number: 20200157658
    Abstract: This free-cutting copper alloy casting contains: 76.0-79.0% Cu, 3.1-3.6% Si, 0.36-0.85% Sn, 0.06-0.14% P, 0.022-0.10% Pb, with the remainder being made up of Zn and unavoidable impurities. This composition satisfies the following relations: 75.5?f1=Cu+0.8×Si?7.5×Sn+P+0.5×Pb?78.7, 60.8?f2=Cu?4.5×Si—0.8×Sn?P+0.5×Pb?62.2, 0.09?f3=P/Sn?0.35. The area ratios (%) of the constituent phases satisfy the following relations, 30???63, 0???2.0, 0???0.3, 0???2.0, 96.5?f4=?+?, 99.3?f5=?+?+?+?, 0?f6=?+??3.0, and 37?f7=1.05×?+6×?1/2+0.5×??72. The ? phase is present within the ? phase, the long side of the ? phase does not exceed 50 ?m, and the long side of the ? phase does not exceed 25 ?m.
    Type: Application
    Filed: August 15, 2017
    Publication date: May 21, 2020
    Inventors: Keiichiro Oishi, Kouichi Suzaki, Shinji Tanaka, Yoshiyuki Goto
  • Publication number: 20200157688
    Abstract: The present invention provides a surface treatment method that improves antimicrobial activity of copper or a copper alloy and enhances immediate effects of antimicrobial actions on the surface of the copper or the copper alloy. A surface treatment method for copper or a copper alloy according to the present invention comprises preparing a reducing agent solution containing a biological reducing substance, and treating the surface of the copper or the copper alloy with the reducing agent solution. The present invention also provides a surface treatment liquid for sterilizing copper or a copper alloy, in which the surface treatment liquid contains a biological reducing substance. The present invention also provides a sterilization method that comprises bringing copper or a copper alloy treated by the surface treatment method into contact with a surface of an object to sterilize the surface of the object.
    Type: Application
    Filed: May 30, 2018
    Publication date: May 21, 2020
    Applicant: NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Akiko YAMAMOTO, Keiichiro OISHI, Shinji TANAKA
  • Patent number: 10654247
    Abstract: The present invention provides an electromagnetic wave suppression sheet provided with: an absorption layer which has surface resistivity of at least 100?/? and which contains an electrical conductive material and an insulating material in the state where the electrical conductive material and the insulating material are in direct contact with each other, the insulating material having a dielectric loss tangent of 0.01 or larger at a frequency of 60 Hz at 20° C.; and a contact layer which is formed on a surface, of the absorption layer, opposite to a surface to be irradiated with electromagnetic waves and of which a surface in contact with the absorption layer has surface resistivity of at least 20?/?.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: May 19, 2020
    Assignee: DUPONT TEIJIN ADVANCED PAPERS (JAPAN), LTD.
    Inventors: Shinji Naruse, Tatsushi Fujimori, Koichi Ukigaya, Chihiro Kondo, Yasunori Tanaka
  • Patent number: 10654821
    Abstract: An object of the present invention is to provide a compound having an anti-inflammatory activity or a pharmacologically acceptable salt thereof. The solution of the present invention is a compound of general formula (1) or a pharmacologically acceptable salt thereof. wherein the symbols in the formula are defined below: R1: e.g., a C1-C6 alkyl group; R2: a C1-C6 alkyl group; A: e.g., an oxygen atom; and R3: e.g., a C1-C6 alkyl group.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: May 19, 2020
    Assignee: Daiichi Sankyo Company, Limited
    Inventors: Keiji Saito, Katsuyoshi Nakajima, Toru Taniguchi, Osamu Iwamoto, Satoshi Shibuya, Yasuyuki Ogawa, Kazumasa Aoki, Nobuya Kurikawa, Shinji Tanaka, Momoko Ogitani, Eriko Kioi, Kaori Ito, Natsumi Nishihama, Tsuyoshi Mikkaichi, Wataru Saitoh
  • Patent number: 10658028
    Abstract: A semiconductor storage device includes a plurality of memory cells arranged in a matrix, a word line provided corresponding to a memory cell row, a dummy word line formed in a metal interconnection layer adjacent to a metal interconnection layer in which the word line is formed, a word driver circuit configured to drive the word line, and a dummy word driver circuit configured to increase voltage on the word line based on interline capacitance between the word line and the dummy word line.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: May 19, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yuichiro Ishii, Shinji Tanaka
  • Patent number: 10655860
    Abstract: A thrust increasing device includes: a fuel injector that ejects fuel toward a jet flow; an ignition device that is disposed downstream from the fuel injector; a cylindrical duct that surrounds a combustion region; a flame holder that is disposed in the duct; and a swirling flow generating part that maintains an axial flow of the jet flow in an axial direction of the duct in an outer region of the duct in a radial direction inside the duct and that converts the jet flow to a swirling flow centered on an axis of the duct in an inner region of the duct in the radial direction inside the duct.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: May 19, 2020
    Assignee: IHI Corporation
    Inventors: Shinji Tanaka, Jun Hosoi, Katsuyoshi Takahashi, Nagayoshi Hiromitsu
  • Patent number: 10649388
    Abstract: An intermediate transfer belt includes at least two layers which are a base layer and an inner surface layer having electric resistance lower than electric resistance of the base layer, and an end portion of the inner surface layer is positioned on an outside of an end portion of a development opening portion in a width direction as a direction orthogonal to a circumferential direction of the intermediate transfer belt.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: May 12, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tsuguhiro Yoshida, Shinji Katagiri, Takayuki Tanaka, Shuichi Tetsuno, Takahiro Ikeda