Patents by Inventor Shinji Tanaka

Shinji Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210219853
    Abstract: A belt providing improved durability and a blood pressure measurement device. A second belt of a belt of a blood pressure measurement device includes a second belt body constituted in a band-like shape using a resin material and including a plurality of small holes formed along a longitudinal direction, and a second insert being disposed in the second belt body and including a plurality of holes with a plurality of the small holes disposed on an inner side of the respective holes, a cross section of a portion of the second insert, which is between two adjacent holes and orthogonal to a width direction of the second belt body, being constituted like a trapezoid with a short side being disposed on a living body side, and the second insert being formed of a material having a higher tensile strength than the resin material constituting the second belt body.
    Type: Application
    Filed: April 6, 2021
    Publication date: July 22, 2021
    Inventors: Noboru KOHARA, Tomoyuki NISHIDA, Hirokazu TANAKA, Shinji MIZUNO, Kotaro KITAJO, Takashi ONO
  • Publication number: 20210212579
    Abstract: A blood pressure measurement device includes a curler curving with following a circumferential direction of a portion of a living body where the blood pressure measurement device is attached, a bag-like structure, including two sheet members, and a welded portion, formed by welding edges of the two sheet members, the welded portion, including a plurality of insertion holes, the bag-like structure, being inflated with a fluid and being disposed on an inner circumferential surface of the curler, and a junction means abutting a surface on the living body side of the welded portion and inserted into the plurality of insertion holes to join the welded portion, to the curler.
    Type: Application
    Filed: March 30, 2021
    Publication date: July 15, 2021
    Inventors: Tomoyuki NISHIDA, Hirokazu TANAKA, Noboru KOHARA, Shinji MIZUNO
  • Publication number: 20210208034
    Abstract: A device includes a sample rack having a mounting region for mounting a sample plate that holds a sample, a housing in which a temperature adjustment space for adjusting a temperature of the sample plate mounted on the sample rack while accommodating the sample rack inside is provided therein, and the housing having, in a lateral surface, a rack insertion opening through which the sample rack is inserted into the temperature adjustment space; and an air temperature adjustment part having an air intake port for taking in air in the temperature adjustment space, a temperature adjustment element for cooling or heating air taken in from the air intake portion, and an outlet for blowing out air cooled or heated by the temperature adjustment element.
    Type: Application
    Filed: June 18, 2018
    Publication date: July 8, 2021
    Inventors: Koki MIYAZAKI, Shinji TANAKA
  • Publication number: 20210156503
    Abstract: A resin tube is prepared. Further, a formation tool having a pressing surface and a projection that projects from the pressing surface and is insertable into the resin tube is prepared. The projection of the formation tool is inserted from an end of the resin tube into the resin tube. The pressing surface of the formation tool is pressed against an end surface of the resin tube. Thermal energy is applied to the end of the resin tube, whereby a shape of the pressing surface of the formation tool is transferred to the end surface of the resin tube, and the end of the resin tube is formed into a flange shape.
    Type: Application
    Filed: November 9, 2020
    Publication date: May 27, 2021
    Inventors: Jun YANAGIBAYASHI, Kenichi YASUNAGA, Shinji TANAKA, Shinya IMAMURA, Ryo HOSONO, Hiromu YAMASAKI, Koshi ABE
  • Patent number: 10975052
    Abstract: An object of the present invention is to provide a compound having an anti-inflammatory activity or a pharmacologically acceptable salt thereof. The solution of the present invention is a compound of general formula (1) or a pharmacologically acceptable salt thereof. wherein the symbols in the formula are defined below: R1: e.g., a C1-C6 alkyl group; R2: a C1-C6 alkyl group; A: e.g., an oxygen atom; and R3: e.g., a C1-C6 alkyl group.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: April 13, 2021
    Assignee: Daiichi Sankyo Company, Limited
    Inventors: Keiji Saito, Katsuyoshi Nakajima, Toru Taniguchi, Osamu Iwamoto, Satoshi Shibuya, Yasuyuki Ogawa, Kazumasa Aoki, Nobuya Kurikawa, Shinji Tanaka, Momoko Ogitani, Eriko Kioi, Kaori Ito, Natsumi Nishihama, Tsuyoshi Mikkaichi, Wataru Saitoh
  • Patent number: 10971219
    Abstract: A semiconductor device capable of improving operating margins is provided. The semiconductor device comprises a memory circuit including a memory cell comprised of a SOTB transistor, and a mode designation circuit switching operation modes of the memory circuit for a first mode or a second mode. The memory circuit includes a substrate bias generation circuit supplying a substrate bias voltage to the SOTB transistor and a timing signal generation circuit generating a timing signal used for a reading operation or a writing operation of the memory circuit. The substrate bias generation circuit does not supply the substrate bias voltage to the SOTB transistor in the second mode.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: April 6, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Makoto Yabuuchi, Shinji Tanaka
  • Patent number: 10964404
    Abstract: A semiconductor device capable of detecting whether test operation is normal is provided. The semiconductor device includes a plurality of memory cells arranged in a matrix, a plurality of word lines provided corresponding to each of the rows of the plurality of memory cells respectively, a decoder for generating driving signals for driving the plurality of word lines, and a detection circuit provided between the plurality of word lines and the decoder for simultaneously raising the plurality of word lines by test operation and detecting whether or not the rising state of the plurality of word lines is normal.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: March 30, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yoshisato Yokoyama, Shinji Tanaka
  • Publication number: 20200390245
    Abstract: A seat includes a backrest, and a fan that is installed on the backrest at a position corresponding to a height of a head of a sitter sitting on the seat and generates an airflow flowing from a front toward a rear of the backrest. The seat may further include a sitter detector that detects the height of the head of the sitter, a lifting-and-lowering motor that adjusts a height of the fan, and a lifting-and-lowering controller that controls the lifting-and-lowering motor. The lifting-and-lowering controller may control the lifting-and-lowering motor to adjust the height of the fan to the height of the head of the sitter detected by the sitter detector.
    Type: Application
    Filed: August 27, 2020
    Publication date: December 17, 2020
    Inventor: SHINJI TANAKA
  • Patent number: 10830180
    Abstract: An aft section structure of a jet engine with an axis is comprised of a casing defining a duct around the axis and opened axially fore and aft; a cone tapering aftward at a first angle with the axis and having a pointed end; guide vanes, each of the vanes radially extending from the cone to the casing and comprising a pressure side at a second angle with a plane containing the axis; spray bars, each of the spray bars extending radially within the duct and comprising trailing sides, each of the trailing sides being directed aftward at a third angle with a plane containing the axis; and flame holders, each of the flame holders extending radially within the duct and comprising one or more interior sides, each of the interior sides being directed aftward at a fourth angle with a plane containing the axis.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: November 10, 2020
    Assignee: IHI Corporation
    Inventors: Shinji Tanaka, Katsuyoshi Takahashi, Jun Hosoi
  • Publication number: 20200308674
    Abstract: A copper alloy according to the present invention includes 17 mass % to 34 mass % of Zn, 0.02 mass % to 2.0 mass % of Sn, 1.5 mass % to 5 mass % of Ni, and a balance consisting of Cu and unavoidable impurities, in which relationships of 12?f1=[Zn]+5×[Sn]?2×[Ni]?30, 10?[Zn]?0.3×[Sn]?2×[Ni]?28, 10?f3={f1×(32?f1)×[Ni]}1/2?33, 1.20?0.7×[Ni]+[Sn]?4, and 1.4?[Ni]/[Sn]?90 are satisfied, conductivity is 13% IACS to 25% IACS, a ratio of an ? phase is 99.5% or more by area ratio or an area ratio of a ? phase (?)% and an area ratio of a ? phase (?)% in an ? phase matrix satisfy a relationship of 0?2×(?)+(?)?0.7.
    Type: Application
    Filed: June 10, 2020
    Publication date: October 1, 2020
    Inventors: Keiichiro Oishi, Yosuke Nakasato, Katsuhiko Hata, Shinji Tanaka
  • Publication number: 20200308675
    Abstract: A copper alloy according to the present invention includes 17 mass % to 34 mass % of Zn, 0.02 mass % to 2.0 mass % of Sn, 1.5 mass % to 5 mass % of Ni, and a balance consisting of Cu and unavoidable impurities, in which relationships of 12?f1=[Zn]+5×[Sn]?2×[Ni]?30, 10?[Zn]?0.3×[Sn]?2×[Ni]?28, 10?f3={f1×(32?f1)×[Ni]}1/2?33, 1.2?0.7×[Ni]+[Sn]?4, and 1.4?[Ni]/[Sn]?90 are satisfied, conductivity is 13% IACS to 25% IACS, a ratio of an ? phase is 99.5% or more by area ratio or an area ratio of a ? phase (?)% and an area ratio of a ? phase (?)% in an ? phase matrix satisfy a relationship of 0?2×(?)+(?)?0.7.
    Type: Application
    Filed: June 10, 2020
    Publication date: October 1, 2020
    Inventors: Keiichiro Oishi, Yosuke Nakasato, Katsuhiko Hata, Shinji Tanaka
  • Publication number: 20200239425
    Abstract: An object of the present invention is to provide a compound having an anti-inflammatory activity or a pharmacologically acceptable salt thereof. The solution of the present invention is a compound of general formula (1) or a pharmacologically acceptable salt thereof. wherein the symbols in the formula are defined below: R1: e.g., a C1-C6 alkyl group; R2: a C1-C6 alkyl group; A: e.g., an oxygen atom; and R3: e.g., a C1-C6 alkyl group.
    Type: Application
    Filed: April 9, 2020
    Publication date: July 30, 2020
    Applicant: Daiichi Sankyo Company, Limited
    Inventors: Keiji Saito, Katsuyoshi Nakajima, Toru Taniguchi, Osamu Iwamoto, Satoshi Shibuya, Yasuyuki Ogawa, Kazumasa Aoki, Nobuya Kurikawa, Shinji Tanaka, Momoko Ogitani, Eriko Kioi, Kaori Ito, Natsumi Nishihama, Tsuyoshi Mikkaichi, Wataru Saitoh
  • Patent number: 10705143
    Abstract: An object of the present invention is to provide a highly-reliable content addressable memory. Provided is a content addressable memory including: a plurality of CAM cells; a word line joined to the CAM cells; a plurality of bit lines joined to the CAM cells; a plurality of search lines joined to the CAM cells; a match line joined to the CAM cells; a match amplifier joined to the match line; and a selection circuit that can select the output of the match amplifier in accordance with the value of the word line.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: July 7, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Makoto Yabuuchi, Shinji Tanaka
  • Publication number: 20200202923
    Abstract: A semiconductor device capable of improving operating margins is provided. The semiconductor device comprises a memory circuit including a memory cell comprised of a SOTB transistor, and a mode designation circuit switching operation modes of the memory circuit for a first mode or a second mode. The memory circuit includes a substrate bias generation circuit supplying a substrate bias voltage to the SOTB transistor and a timing signal generation circuit generating a timing signal used for a reading operation or a writing operation of the memory circuit. The substrate bias generation circuit does not supply the substrate bias voltage to the SOTB transistor in the second mode.
    Type: Application
    Filed: October 30, 2019
    Publication date: June 25, 2020
    Inventors: Makoto YABUUCHI, Shinji TANAKA
  • Publication number: 20200181748
    Abstract: This free-cutting copper alloy comprises 76.0-78.7% Cu, 3.1-3.6% Si, 0.40-0.85% Sn, 0.05-0.14% P, and at least 0.005% to less than 0.020% Pb, with the remainder comprising Zn and inevitable impurities. The composition satisfies the following relations: 75.0?f1=Cu+0.8×Si?7.5×Sn+0.5×Pb?78.2; 60.0?f2=Cu?4.8×Si—0.8×Sn?P+0.5×Pb?61.5; and 0.09?f3=P/Sn?0.30. The area percentage (%) of respective constituent phases satisfies the following relations: 30???65; 0???2.0; 0???0.3; 0???2.0; 96.5?f4=?+?; 99.4?f5=?+?+?+?; 0?f6=?+??3.0; and 35?f7=1.05×?+6×?1/2+0.5×??70. ? phase is present in ? phase, the long side of the ? phase is at most 50 ?m, and the long side of the ? phase is at most 25 ?m.
    Type: Application
    Filed: February 21, 2018
    Publication date: June 11, 2020
    Inventors: Keiichiro Oishi, Kouichi Suzaki, Hiroki Goto, Shinji Tanaka
  • Publication number: 20200165706
    Abstract: This free-cutting copper alloy comprises 75.4-78.7% Cu, 3.05-3.65% Si, 0.10-0.28% Sn, 0.05-0.14% P, and at least 0.005% to less than 0.020% Pb, with the remainder comprising Zn and inevitable impurities. The composition satisfies the following relations: 76.5?f1=Cu+0.8×Si?8.5×Sn+P?80.3; 60.7?f2=Cu?4.6×Si?0.7×Sn?P?62.1; and 0.25?f7=P/Sn?1.0. The area percentage (%) of respective constituent phases satisfies the following relations: 28???67; 0???1.0; 0???0.2; 0???1.5; 97.4?f3=?+?; 99.4?f4=?+?+?+?; 0?f5=?+??2.0; and 30?f6=?+6×?1/2+0.5×??70. The long side of the ? phase is at most 40 ?m, the long side of the ? phase is at most 25 ?m, and ? phase is present in ? phase.
    Type: Application
    Filed: February 21, 2018
    Publication date: May 28, 2020
    Inventors: Keiichiro Oishi, Kouichi Suzaki, Shinji Tanaka, Takayuki Oka
  • Publication number: 20200157688
    Abstract: The present invention provides a surface treatment method that improves antimicrobial activity of copper or a copper alloy and enhances immediate effects of antimicrobial actions on the surface of the copper or the copper alloy. A surface treatment method for copper or a copper alloy according to the present invention comprises preparing a reducing agent solution containing a biological reducing substance, and treating the surface of the copper or the copper alloy with the reducing agent solution. The present invention also provides a surface treatment liquid for sterilizing copper or a copper alloy, in which the surface treatment liquid contains a biological reducing substance. The present invention also provides a sterilization method that comprises bringing copper or a copper alloy treated by the surface treatment method into contact with a surface of an object to sterilize the surface of the object.
    Type: Application
    Filed: May 30, 2018
    Publication date: May 21, 2020
    Applicant: NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Akiko YAMAMOTO, Keiichiro OISHI, Shinji TANAKA
  • Publication number: 20200157658
    Abstract: This free-cutting copper alloy casting contains: 76.0-79.0% Cu, 3.1-3.6% Si, 0.36-0.85% Sn, 0.06-0.14% P, 0.022-0.10% Pb, with the remainder being made up of Zn and unavoidable impurities. This composition satisfies the following relations: 75.5?f1=Cu+0.8×Si?7.5×Sn+P+0.5×Pb?78.7, 60.8?f2=Cu?4.5×Si—0.8×Sn?P+0.5×Pb?62.2, 0.09?f3=P/Sn?0.35. The area ratios (%) of the constituent phases satisfy the following relations, 30???63, 0???2.0, 0???0.3, 0???2.0, 96.5?f4=?+?, 99.3?f5=?+?+?+?, 0?f6=?+??3.0, and 37?f7=1.05×?+6×?1/2+0.5×??72. The ? phase is present within the ? phase, the long side of the ? phase does not exceed 50 ?m, and the long side of the ? phase does not exceed 25 ?m.
    Type: Application
    Filed: August 15, 2017
    Publication date: May 21, 2020
    Inventors: Keiichiro Oishi, Kouichi Suzaki, Shinji Tanaka, Yoshiyuki Goto
  • Patent number: 10658028
    Abstract: A semiconductor storage device includes a plurality of memory cells arranged in a matrix, a word line provided corresponding to a memory cell row, a dummy word line formed in a metal interconnection layer adjacent to a metal interconnection layer in which the word line is formed, a word driver circuit configured to drive the word line, and a dummy word driver circuit configured to increase voltage on the word line based on interline capacitance between the word line and the dummy word line.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: May 19, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yuichiro Ishii, Shinji Tanaka
  • Patent number: 10655860
    Abstract: A thrust increasing device includes: a fuel injector that ejects fuel toward a jet flow; an ignition device that is disposed downstream from the fuel injector; a cylindrical duct that surrounds a combustion region; a flame holder that is disposed in the duct; and a swirling flow generating part that maintains an axial flow of the jet flow in an axial direction of the duct in an outer region of the duct in a radial direction inside the duct and that converts the jet flow to a swirling flow centered on an axis of the duct in an inner region of the duct in the radial direction inside the duct.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: May 19, 2020
    Assignee: IHI Corporation
    Inventors: Shinji Tanaka, Jun Hosoi, Katsuyoshi Takahashi, Nagayoshi Hiromitsu