Patents by Inventor Shinji Wakisaka

Shinji Wakisaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11376734
    Abstract: A trajectory control device includes: a contact sensor that can contact side surfaces of a workpiece; an actuator that moves a trajectory tracking member and the contact sensor; and a trajectory controller that calculates XY coordinates of a trajectory on the workpiece that is placed in an arbitrary position, by transforming XY coordinates of the trajectory on the workpiece in a reference position, based on positional information about the side surfaces of the workpiece in the reference position and positional information about the side surfaces of the workpiece placed in the arbitrary position. The positional information about the side surfaces of the workpiece placed in the arbitrary position is obtained by the contact sensor.
    Type: Grant
    Filed: November 16, 2020
    Date of Patent: July 5, 2022
    Assignee: SMC CORPORATION
    Inventors: Shinji Wakisaka, Kazuyuki Oguma, Hikaru Yasuda
  • Patent number: 11328998
    Abstract: A semiconductor device includes: a first semiconductor element having a first electrode on a main surface side thereof and a second electrode on a back surface side thereof; a base material provided with a connection conductor connected to the first electrode; a sealing resin provided on the base material to seal the first semiconductor element; and a first via provided in the sealing resin and electrically connected to the second electrode of the first semiconductor element.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: May 10, 2022
    Assignee: AOI Electronics Co., Ltd.
    Inventor: Shinji Wakisaka
  • Publication number: 20210154836
    Abstract: A trajectory control device includes: a contact sensor that can contact side surfaces of a workpiece; an actuator that moves a trajectory tracking member and the contact sensor; and a trajectory controller that calculates XY coordinates of a trajectory on the workpiece that is placed in an arbitrary position, by transforming XY coordinates of the trajectory on the workpiece in a reference position, based on positional information about the side surfaces of the workpiece in the reference position and positional information about the side surfaces of the workpiece placed in the arbitrary position. The positional information about the side surfaces of the workpiece placed in the arbitrary position is obtained by the contact sensor.
    Type: Application
    Filed: November 16, 2020
    Publication date: May 27, 2021
    Applicant: SMC CORPORATION
    Inventors: Shinji WAKISAKA, Kazuyuki OGUMA, Hikaru YASUDA
  • Publication number: 20210082820
    Abstract: A semiconductor device includes: a first semiconductor element having a first electrode on a main surface side thereof and a second electrode on a back surface side thereof; a base material provided with a connection conductor connected to the first electrode; a sealing resin provided on the base material to seal the first semiconductor element; and a first via provided in the sealing resin and electrically connected to the second electrode of the first semiconductor element.
    Type: Application
    Filed: September 16, 2020
    Publication date: March 18, 2021
    Inventor: Shinji WAKISAKA
  • Patent number: 9406637
    Abstract: A semiconductor construct includes a semiconductor substrate and connection pads provided on the semiconductor substrate. Some of the connection pads are connected to a common wiring and at least one of the remaining of the connection pads are connected to a wiring. The construct also includes a first columnar electrode provided to be connected to the common wiring and a second columnar electrode provided to be connected to a connection pad portion of the wiring.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: August 2, 2016
    Assignee: AOI ELECTRONICS CO., LTD.
    Inventors: Shinji Wakisaka, Takeshi Wakabayashi
  • Patent number: 9343428
    Abstract: A semiconductor device includes a semiconductor construct including a semiconductor substrate and an external connection electrode provided to protrude on a surface of the semiconductor substrate, a base plate on which the semiconductor construct is installed, and a sealing layer stacked on the semiconductor substrate except for the external connection electrode and on the base plate including a side surface of the semiconductor substrate.
    Type: Grant
    Filed: July 2, 2015
    Date of Patent: May 17, 2016
    Assignee: TERA PROBE, INC.
    Inventor: Shinji Wakisaka
  • Publication number: 20150311181
    Abstract: A semiconductor device includes a semiconductor construct including a semiconductor substrate and an external connection electrode provided to protrude on a surface of the semiconductor substrate, a base plate on which the semiconductor construct is installed, and a sealing layer stacked on the semiconductor substrate except for the external connection electrode and on the base plate including a side surface of the semiconductor substrate.
    Type: Application
    Filed: July 2, 2015
    Publication date: October 29, 2015
    Applicant: TERA PROBE, INC.
    Inventor: Shinji Wakisaka
  • Patent number: 9105580
    Abstract: A semiconductor device includes a semiconductor construct including a semiconductor substrate and an external connection electrode provided to protrude on a surface of the semiconductor substrate, a base plate on which the semiconductor construct is installed, and a sealing layer stacked on the semiconductor substrate except for the external connection electrode and on the base plate including a side surface of the semiconductor substrate.
    Type: Grant
    Filed: June 9, 2014
    Date of Patent: August 11, 2015
    Assignee: TERA PROBE, INC.
    Inventor: Shinji Wakisaka
  • Publication number: 20150097302
    Abstract: A semiconductor construct includes a semiconductor substrate and connection pads provided on the semiconductor substrate. Some of the connection pads are connected to a common wiring and at least one of the remaining of the connection pads are connected to a wiring. The construct also includes a first columnar electrode provided to be connected to the common wiring and a second columnar electrode provided to be connected to a connection pad portion of the wiring.
    Type: Application
    Filed: December 15, 2014
    Publication date: April 9, 2015
    Applicant: TERA PROBE, INC.
    Inventors: Shinji WAKISAKA, Takeshi WAKABAYASHI
  • Patent number: 8946079
    Abstract: A semiconductor construct includes a semiconductor substrate and connection pads provided on the semiconductor substrate. Some of the connection pads are connected to a common wiring and at least one of the remaining of the connection pads are connected to a wiring. The construct also includes a first columnar electrode provided to be connected to the common wiring and a second columnar electrode provided to be connected to a connection pad portion of the wiring.
    Type: Grant
    Filed: May 6, 2014
    Date of Patent: February 3, 2015
    Assignee: Tera Probe, Inc.
    Inventors: Shinji Wakisaka, Takeshi Wakabayashi
  • Publication number: 20140287555
    Abstract: A semiconductor device includes a semiconductor construct including a semiconductor substrate and an external connection electrode provided to protrude on a surface of the semiconductor substrate, a base plate on which the semiconductor construct is installed, and a sealing layer stacked on the semiconductor substrate except for the external connection electrode and on the base plate including a side surface of the semiconductor substrate.
    Type: Application
    Filed: June 9, 2014
    Publication date: September 25, 2014
    Inventor: Shinji Wakisaka
  • Publication number: 20140239511
    Abstract: A semiconductor construct includes a semiconductor substrate and connection pads provided on the semiconductor substrate. Some of the connection pads are connected to a common wiring and at least one of the remaining of the connection pads are connected to a wiring. The construct also includes a first columnar electrode provided to be connected to the common wiring and a second columnar electrode provided to be connected to a connection pad portion of the wiring.
    Type: Application
    Filed: May 6, 2014
    Publication date: August 28, 2014
    Inventors: Shinji WAKISAKA, Takeshi WAKABAYASHI
  • Patent number: 8754525
    Abstract: A semiconductor construct includes a semiconductor substrate and connection pads provided on the semiconductor substrate. Some of the connection pads are connected to a common wiring and at least one of the remaining of the connection pads are connected to a wiring. The construct also includes a first columnar electrode provided to be connected to the common wiring and a second columnar electrode provided to be connected to a connection pad portion of the wiring.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: June 17, 2014
    Assignee: Tera Probe, Inc.
    Inventors: Shinji Wakisaka, Takeshi Wakabayashi
  • Publication number: 20130320526
    Abstract: A semiconductor construct includes a semiconductor substrate and connection pads provided on the semiconductor substrate. Some of the connection pads are connected to a common wiring and at least one of the remaining of the connection pads are connected to a wiring. The construct also includes a first columnar electrode provided to be connected to the common wiring and a second columnar electrode provided to be connected to a connection pad portion of the wiring.
    Type: Application
    Filed: August 6, 2013
    Publication date: December 5, 2013
    Inventors: Shinji Wakisaka, Takeshi Wakabayashi
  • Patent number: 8525335
    Abstract: A semiconductor construct includes a semiconductor substrate and connection pads provided on the semiconductor substrate. Some of the connection pads are connected to a common wiring and at least one of the remaining of the connection pads are connected to a wiring. The construct also includes a first columnar electrode provided to be connected to the common wiring and a second columnar electrode provided to be connected to a connection pad portion of the wiring.
    Type: Grant
    Filed: July 1, 2010
    Date of Patent: September 3, 2013
    Assignee: Teramikros, Inc.
    Inventors: Shinji Wakisaka, Takeshi Wakabayashi
  • Patent number: 8487443
    Abstract: Disclosed is a semiconductor structure including a semiconductor substrate including an electronic circuit which is provided in a predetermined region of the semiconductor substrate, a wiring provided on the semiconductor substrate in a region outside of the predetermined region, an external connection electrode provided on the wiring, a sealing resin which covers a side surface of the external connection electrode and a wall which intervenes between the electronic circuit and the sealing resin.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: July 16, 2013
    Assignee: Teramikros, Inc.
    Inventor: Shinji Wakisaka
  • Patent number: 8319346
    Abstract: Disclosed is a semiconductor structure including a semiconductor substrate including an electronic circuit which is provided in a predetermined region of the semiconductor substrate; a wall which is formed to encircle the predetermined region of the semiconductor substrate; a wiring provided in a region of the semiconductor substrate outside of the predetermined region of the semiconductor substrate; an external connection electrode provided on the wiring; a sealing resin which seals the wiring, the sealing resin being filled in the region of the semiconductor substrate outside of the wall; and a transparent resin to seal the predetermined region of the semiconductor substrate, the transparent resin being filled inside of the wall.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: November 27, 2012
    Assignee: Teramikros, Inc.
    Inventor: Shinji Wakisaka
  • Publication number: 20110304043
    Abstract: A semiconductor device comprises a semiconductor chip which comprises mode-set terminals, and mode-set wiring lines respectively connected to the mode-set terminals, a sealing layer which covers the semiconductor chip and also covers a land of a first mode-set wiring line that is one of the mode-set wiring lines, the sealing layer including a mode-set via hole formed above a land of a second mode-set wiring line, the second mode-set wiring line being one of the mode-set wiring lines and being different from the first mode-set wiring line, a mode-set embedded conductor provided within the mode-set via hole to be connected to the second mode-set wiring line, and a mode-set conductive pattern which is connected to the mode-set embedded conductor and which is provided on the sealing layer above the land of the first mode-set wiring line.
    Type: Application
    Filed: June 3, 2011
    Publication date: December 15, 2011
    Applicant: CASIO COMPUTER CO., LTD.
    Inventor: Shinji Wakisaka
  • Publication number: 20110233739
    Abstract: Disclosed is a semiconductor structure including a semiconductor substrate including an electronic circuit which is provided in a predetermined region of the semiconductor substrate, a wiring provided on the semiconductor substrate in a region outside of the predetermined region, an external connection electrode provided on the wiring, a sealing resin which covers a side surface of the external connection electrode and a wall which intervenes between the electronic circuit and the sealing resin.
    Type: Application
    Filed: March 29, 2011
    Publication date: September 29, 2011
    Applicant: CASIO COMPUTER CO., LTD.
    Inventor: Shinji WAKISAKA
  • Patent number: RE43380
    Abstract: A first semiconductor element is mounted on a base plate, and is in a sealed state by the periphery thereof being covered by an insulation member, and the upper surface thereof being covered by an upper insulation film. An upper wiring layer formed on the upper insulation film, and the lower wiring layer formed below the base plate via lower insulation films are connected by conductors. A second semiconductor element is mounted exposed, being connected to the lower wiring layer.
    Type: Grant
    Filed: May 6, 2010
    Date of Patent: May 15, 2012
    Assignee: Teramikros, Inc.
    Inventors: Shinji Wakisaka, Hiroyasu Jobetto, Takeshi Wakabayashi, Ichiro Mihara