Patents by Inventor Shinya Iwasaki
Shinya Iwasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11911725Abstract: The present invention provides a separation membrane that is suitable for separating an acid gas from a gas mixture containing the acid gas and has a high acid gas permeability. A separation membrane (10) of the present invention includes: a separation functional layer (1); a porous support member (3) supporting the separation functional layer (1); and an intermediate layer (2) disposed between the separation functional layer (1) and the porous support member (3), and including a matrix (4) and nanoparticles (5) dispersed in the matrix (4).Type: GrantFiled: March 12, 2020Date of Patent: February 27, 2024Assignee: NITTO DENKO CORPORATIONInventors: Kazuya Yoshimura, Daiki Iwasaki, Naomichi Kimura, Shinya Nishiyama
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Publication number: 20240007422Abstract: A chat bot capable of seamlessly acquiring, in response to user input in a chat session, information necessary for an appropriate chat scenario for assisting the user from an external system and dynamically generating a chat scenario. Accordingly, the chat bot control device includes an external data acquisition unit for acquiring, in a chat session between a user and a chat bot, chat scenario creation data for generating a chat scenario from a predetermined external system based on a first input from the user; a scenario generation unit for generating, based on the chat scenario creation data, a first chat scenario that specifies transitions of a dialogue between the user and the chat bot using predetermined scenario conversion logic that defines a chat scenario generation pattern; and a scenario execution unit for executing the first chat scenario in the chat session.Type: ApplicationFiled: September 16, 2023Publication date: January 4, 2024Applicant: Hitachi Systems, Ltd.Inventors: Shinya IWASAKI, Ken IIKURA, Michiori YOSHITAKE, Natsuki OHTA, Hiroto FUKUSHIMA, Nobuo KUDO, Yoshimitsu TOYOBA, Naoya TSUMURA, Tomoharu ICHIHARA
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Patent number: 11799804Abstract: A chat bot capable of seamlessly acquiring, in response to user input in a chat session, information necessary for an appropriate chat scenario for assisting the user from an external system and dynamically generating a chat scenario. Accordingly, the chat bot control device includes an external data acquisition unit for acquiring, in a chat session between a user and a chat bot, chat scenario creation data for generating a chat scenario from a predetermined external system based on a first input from the user; a scenario generation unit for generating, based on the chat scenario creation data, a first chat scenario that specifies transitions of a dialogue between the user and the chat bot using predetermined scenario conversion logic that defines a chat scenario generation pattern; and a scenario execution unit for executing the first chat scenario in the chat session.Type: GrantFiled: September 3, 2020Date of Patent: October 24, 2023Assignee: Hitachi Systems, Ltd.Inventors: Shinya Iwasaki, Ken Iikura, Michiori Yoshitake, Natsuki Ohta, Hiroto Fukushima, Nobuo Kudo, Yoshimitsu Toyoba, Naoya Tsumura, Tomoharu Ichihara
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Patent number: 11710937Abstract: An electronic-component-equipped terminal block includes a terminal block including first and second through holes provided in a front wall; an electronic component including a component body first and second leads; and an electrically insulating attachment assistance tool. The attachment assistance tool includes a base portion arranged outside a housing such that a rear surface thereof abuts against the front wall; and first and second insertion portions protruding from the rear surface of the base portion to be thereby inserted into the first and second through hole, respectively. The attachment assistance tool is provided with a first passage portion through which the first lead is inserted, and a second passage portion through which the second lead is inserted, and a receiving portion that receives and accommodates a rear portion of the component body is provided at a front-side position.Type: GrantFiled: February 5, 2020Date of Patent: July 25, 2023Assignee: OMRON CORPORATIONInventors: Hiroki Utsunomiya, Ryohei Yoshioka, Shinya Iwasaki
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Publication number: 20230132894Abstract: A chat bot capable of seamlessly acquiring, in response to user input in a chat session, information necessary for an appropriate chat scenario for assisting the user from an external system and dynamically generating a chat scenario. Accordingly, the chat bot control device includes an external data acquisition unit for acquiring, in a chat session between a user and a chat bot, chat scenario creation data for generating a chat scenario from a predetermined external system based on a first input from the user; a scenario generation unit for generating, based on the chat scenario creation data, a first chat scenario that specifies transitions of a dialogue between the user and the chat bot using predetermined scenario conversion logic that defines a chat scenario generation pattern; and a scenario execution unit for executing the first chat scenario in the chat session.Type: ApplicationFiled: September 3, 2020Publication date: May 4, 2023Inventors: Shinya IWASAKI, Ken IIKURA, Michiori YOSHITAKE, Natsuki OHTA, Hiroto FUKUSHIMA, Nobuo KUDO, Yoshimitsu TOYOBA, Naoya TSUMURA, Tomoharu ICHIHARA
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Publication number: 20220149577Abstract: An electronic-component-equipped terminal block includes a terminal block including first and second through holes provided in a front wall; an electronic component including a component body first and second leads; and an electrically insulating attachment assistance tool. The attachment assistance tool includes a base portion arranged outside a housing such that a rear surface thereof abuts against the front wall; and first and second insertion portions protruding from the rear surface of the base portion to be thereby inserted into the first and second through hole, respectively. The attachment assistance tool is provided with a first passage portion through which the first lead is inserted, and a second passage portion through which the second lead is inserted, and a receiving portion that receives and accommodates a rear portion of the component body is provided at a front-side position.Type: ApplicationFiled: February 5, 2020Publication date: May 12, 2022Applicant: OMRON CorporationInventors: Hiroki UTSUNOMIYA, Ryohei YOSHIOKA, Shinya IWASAKI
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Patent number: 11101373Abstract: An insulated gate bipolar transistor includes: a semiconductor substrate; an emitter electrode arranged on one main surface of the semiconductor substrate; and a trench gate arranged in a rectangular trench having a rectangular shape and disposed on the one main surface of the semiconductor substrate. The semiconductor substrate includes a body contact region and an emitter region in a rectangular region surrounded by the rectangular trench. The rectangular trench has a straight trench that constitutes one side of the rectangular trench. The body contact region is in contact with a side of the straight trench. The emitter region is in contact with the side of the straight trench, and is adjacent to the body contact region. The body contact region has a protrusion portion protruding in a depth direction from a center portion of the body contact region.Type: GrantFiled: November 8, 2019Date of Patent: August 24, 2021Assignee: DENSO CORPORATIONInventors: Shinya Iwasaki, Hiroshi Hosokawa, Yuma Kagata
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Publication number: 20200152777Abstract: An insulated gate bipolar transistor includes: a semiconductor substrate; an emitter electrode arranged on one main surface of the semiconductor substrate; and a trench gate arranged in a rectangular trench having a rectangular shape and disposed on the one main surface of the semiconductor substrate. The semiconductor substrate includes a body contact region and an emitter region in a rectangular region surrounded by the rectangular trench. The rectangular trench has a straight trench that constitutes one side of the rectangular trench. The body contact region is in contact with a side of the straight trench. The emitter region is in contact with the side of the straight trench, and is adjacent to the body contact region. The body contact region has a protrusion portion protruding in a depth direction from a center portion of the body contact region.Type: ApplicationFiled: November 8, 2019Publication date: May 14, 2020Inventors: SHINYA IWASAKI, HIROSHI HOSOKAWA, YUMA KAGATA
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Publication number: 20200091327Abstract: An insulated gate bipolar transistor may include a gate electrode provided in a rectangular trench. An emitter region is in direct contact with a straight trench constituting one side of the rectangular trench. A surface layer body region is in direct contact with the straight trench in a range adjacent to the emitter region. A body contact region is in direct contact with the emitter region from an opposite side to the straight trench. The body contact region includes a first part and a second part protruding toward the emitter region than the first part. A width of the emitter region between the second part and the straight trench is narrower than a width of the emitter region between the first part and the straight trench.Type: ApplicationFiled: August 9, 2019Publication date: March 19, 2020Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Hiroshi HOSOKAWA, Shinya IWASAKI, Yuma KAGATA
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Patent number: 10269910Abstract: A method of manufacturing a semiconductor device, the method comprising: forming trenches in an upper surface of a semiconductor substrate, the semiconductor substrate comprising a first region and a second region, the trenches in the first region having a wide width, and the trenches in the second region having a narrow width; forming insulating films on inner surfaces of the trenches; filling conductive material inside the trenches; etching the conductive material until each of upper surfaces of the conductive material filled inside the trenches becomes lower than the upper surface of the semiconductor substrate; and forming, after the etching of the conductive material, an impurity layer by implanting impurities to a predetermined depth range, the impurity layer having a concentration by which a conductivity type of a region opposed to the conductive material via each insulating film is inverted by a potential applied to the conductive material.Type: GrantFiled: June 13, 2017Date of Patent: April 23, 2019Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventor: Shinya Iwasaki
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Patent number: 10141304Abstract: A small semiconductor device having a diode forward voltage less likely to change due to a gate potential is provided. An anode and an upper IGBT structure (emitter and body) are provided in a range in the substrate exposed at the upper surface. A trench, a gate insulating film, and a gate electrode extend along a border of the anode and the upper IGBT structure. Cathode and collector are provided in a range in the substrate exposed at the lower surface. A drift is provided between an upper structure and a lower structure. A crystal defect region extends across the drift above the cathode and the drift above the collector. When a thickness of the substrate is defined as x [?m] and a width of a portion of the crystal defect region that protrudes above the cathode is defined as y [?m], y?0.007x2?1.09x+126 is satisfied.Type: GrantFiled: July 17, 2014Date of Patent: November 27, 2018Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Shinya Iwasaki, Satoru Kameyama
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Patent number: 10074648Abstract: A method of manufacturing a semiconductor device includes: implanting charged particles into a first range and a second range in a semiconductor substrate from at least one of a first surface of the semiconductor substrate and a second surface of the semiconductor substrate located on an opposite side of the first surface so as to increase crystal defect densities in the first range and the second range; implanting n-type impurities into the first range from the first surface so as to make a region amorphous, the region being in the first range and disposed at the first surface; irradiating the first surface with first laser after the implantation of the charged particles and the implantation of the n-type impurities so as to heat the first range and the second range; and crystallizing the region which has been made amorphous in or after the irradiation of the first laser.Type: GrantFiled: September 28, 2017Date of Patent: September 11, 2018Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Hiroshi Hosokawa, Shinya Iwasaki, Tsuyoshi Nishiwaki, Atsushi Imai, Shuhei Oki
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Patent number: 10014368Abstract: An IGBT region includes a collector layer, a first drift layer, a first body layer, an emitter layer, and a trench gate reaching the first drift layer through the first body layer from a front surface side of a semiconductor substrate. A diode region includes a cathode layer, a second drift layer, and a second body layer. A lifetime control region which includes a peak of a crystal defect density is provided in the first drift layer and the second drift layer that are located between a depth of a lower end of the trench gate and surfaces of the first drift layer and the second drift layer. A silicon nitride film is further provided above the trench gate on the front surface side of the semiconductor substrate.Type: GrantFiled: November 19, 2014Date of Patent: July 3, 2018Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Shinya Iwasaki, Satoru Kameyama
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Patent number: 9978830Abstract: An IGBT region includes a collector layer, a first drift layer, a first body layer, an emitter layer, and a trench gate reaching the first drift layer through the first body layer from a front surface side of a semiconductor substrate. A diode region includes a cathode layer, a second drift layer, and a second body layer. A lifetime control region which includes a peak of a crystal defect density is provided in the first drift layer and the second drift layer that are located between a depth of a lower end of the trench gate and surfaces of the first drift layer and the second drift layer. A silicon nitride film is further provided above the trench gate on the front surface side of the semiconductor substrate.Type: GrantFiled: November 19, 2014Date of Patent: May 22, 2018Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Shinya Iwasaki, Satoru Kameyama
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Publication number: 20180138170Abstract: A method of manufacturing a semiconductor device includes: implanting charged particles into a first range and a second range in a semiconductor substrate from at least one of a first surface of the semiconductor substrate and a second surface of the semiconductor substrate located on an opposite side of the first surface so as to increase crystal defect densities in the first range and the second range; implanting n-type impurities into the first range from the first surface so as to make a region amorphous, the region being in the first range and disposed at the first surface; irradiating the first surface with first laser after the implantation of the charged particles and the implantation of the n-type impurities so as to heat the first range and the second range; and crystallizing the region which has been made amorphous in or after the irradiation of the first laser.Type: ApplicationFiled: September 28, 2017Publication date: May 17, 2018Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Hiroshi HOSOKAWA, Shinya IWASAKI, Tsuyoshi NISHIWAKI, Atsushi IMAI, Shuhei OKI
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Patent number: 9966372Abstract: A semiconductor device includes: a plurality of trenches provided in an upper surface of a semiconductor substrate; trench electrodes each provided in a corresponding one of the trenches; a first semiconductor layer of a first conductivity type provided in a first range interposed between adjacent ones of the trenches; a second semiconductor layer of a second conductivity type; a third semiconductor layer of the first conductivity type; an interlayer insulation film provided on the upper surface of the semiconductor substrate and including a plurality of contact holes; a first conductor layer provided in each of the contact holes; and a surface electrode provided on the interlayer insulation film and connected to each of the first conductor layers.Type: GrantFiled: June 8, 2015Date of Patent: May 8, 2018Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Satoru Kameyama, Tadashi Misumi, Jun Okawara, Shinya Iwasaki
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Publication number: 20180047821Abstract: A method of manufacturing a semiconductor device, the method comprising: forming trenches in an upper surface of a semiconductor substrate, the semiconductor substrate comprising a first region and a second region, the trenches in the first region having a wide width, and the trenches in the second region having a narrow width; forming insulating films on inner surfaces of the trenches; filling conductive material inside the trenches; etching the conductive material until each of upper surfaces of the conductive material filled inside the trenches becomes lower than the upper surface of the semiconductor substrate; and forming, after the etching of the conductive material, an impurity layer by implanting impurities to a predetermined depth range, the impurity layer having a concentration by which a conductivity type of a region opposed to the conductive material via each insulating film is inverted by a potential applied to the conductive material.Type: ApplicationFiled: June 13, 2017Publication date: February 15, 2018Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventor: Shinya IWASAKI
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Patent number: 9887191Abstract: The re-combination center introduction region has re-combination centers introduced therein so that a density of the re-combination centers in the re-combination center introduction region is higher than a density of re-combination centers in a periphery of the re-combination center introduction region. The re-combination center introduction region continuously extends from the diode region to the peripheral region along a longitudinal direction of the diode region.Type: GrantFiled: August 3, 2015Date of Patent: February 6, 2018Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Hiroshi Hata, Satoru Kameyama, Shinya Iwasaki
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Patent number: 9793266Abstract: An influence of a gate interference is suppressed and a reverse recovery property of a diode is improved. A diode includes a diode region located between the first boundary trench and the second boundary trench and a first and second IGBT regions. An emitter region and a body region are provided in each of the first and second IGBT regions. Each body region includes a body contact portion. An anode region is provided in the diode region. The anode region includes an anode contact portion. An interval between the first and second boundary trenches is equal to or longer than 200 ?m. An area ratio of the anode contact portion in the diode region is lower than each of an area ratio of the body contact portion in the first IGBT region and an area ratio of the body contact portion in the second IGBT region.Type: GrantFiled: May 18, 2015Date of Patent: October 17, 2017Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Satoru Kameyama, Shinya Iwasaki
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Publication number: 20170263603Abstract: The re-combination center introduction region has re-combination centers introduced therein so that a density of the re-combination centers in the re-combination center introduction region is higher than a density of re-combination centers in a periphery of the re-combination center introduction region. The re-combination center introduction region continuously extends from the diode region to the peripheral region along a longitudinal direction of the diode region.Type: ApplicationFiled: August 3, 2015Publication date: September 14, 2017Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Hiroshi HATA, Satoru KAMEYAMA, Shinya IWASAKI