Patents by Inventor Shinya Nunoue

Shinya Nunoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150236211
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a second semiconductor layer, a light emitting layer, a dielectric layer, a first electrode, a second electrode and a support substrate. The first layer has a first and second surface. The second layer is provided on a side of the second surface of the first layer. The emitting layer is provided between the first and the second layer. The dielectric layer contacts the second surface and has a refractive index lower than that of the first layer. The first electrode includes a first and second portion. The first portion contacts the second surface and provided adjacent to the dielectric layer. The second portion contacts with an opposite side of the dielectric layer from the first semiconductor layer. The second electrode contacts with an opposite side of the second layer from the emitting layer.
    Type: Application
    Filed: May 4, 2015
    Publication date: August 20, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi KATSUNO, Satoshi Mitsugi, Toshihide Ito, Shinya Nunoue
  • Patent number: 9112111
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting layer. The p-type semiconductor layer includes a first p-side layer, a second p-side layer, and a third p-side layer. A concentration profile of Mg of a p-side region includes a first portion, a second portion, a third portion, a fourth portion, a fifth portion, a sixth portion and a seventh portion. The p-side region includes the light emitting layer, the second p-side layer, and the third p-side layer. A Mg concentration of the sixth portion is not less than 1×1020 cm?3 and not more than 3×1020 cm?3. The Al concentration is 1/100 of the maximum value at a second position. A Mg concentration at the second position is not less than 2×1018 cm?3.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: August 18, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hajime Nago, Yoshiyuki Harada, Shigeya Kimura, Hisashi Yoshida, Shinya Nunoue
  • Publication number: 20150228851
    Abstract: According to one embodiment, a semiconductor light emitting device includes n-type and p-type semiconductor layers containing a nitride semiconductor and a light emitting layer. The emitting layer includes a barrier layer containing III group elements, and a well layer stacked with the barrier layer and containing III group elements. The barrier layer is divided into a first portion on an n-type semiconductor layer side and a second portion on a p-type semiconductor layer side, an In composition ratio in the III group elements of the second portion is lower than that of the first portion. The well layer is divided into a third portion on an n-type semiconductor layer side and a fourth portion on a p-type semiconductor layer side, an In composition ratio in the III group elements of the fourth portion is higher than that of the third portion.
    Type: Application
    Filed: April 24, 2015
    Publication date: August 13, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigeya KIMURA, Yoshiyuki Harada, Hajime Nago, Koichi Tachibana, Shinya Nunoue
  • Patent number: 9105810
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a light emitting unit, a second semiconductor layer, a reflecting electrode, an oxide layer and a nitrogen-containing layer. The first semiconductor layer is of a first conductivity type. The light emitting unit is provided on the first semiconductor layer. The second semiconductor layer is provided on the light emitting unit and is of a second conductivity type. The reflecting electrode is provided on the second semiconductor layer and includes Ag. The oxide layer is provided on the reflecting electrode. The oxide layer is insulative and has a first opening. The nitrogen-containing layer is provided on the oxide layer. The nitrogen-containing layer is insulative and has a second opening communicating with the first opening.
    Type: Grant
    Filed: February 24, 2012
    Date of Patent: August 11, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshihide Ito, Hiroshi Katsuno, Shinya Nunoue
  • Publication number: 20150221728
    Abstract: According to one embodiment, a nitride semiconductor device includes a stacked body and a functional layer. The stacked body includes an AlGaN layer of AlxGa1-xN (0<x?1), a first Si-containing layer, a first GaN layer, a second Si-containing layer, and a second GaN layer. The first Si-containing layer contacts an upper surface of the AlGaN layer. The first Si-containing layer contains Si at a concentration not less than 7×1019/cm3 and not more than 4×1020/cm3. The first GaN layer is provided on the first Si-containing layer. The first GaN layer includes a protrusion having an oblique surface tilted with respect to the upper surface. The second Si-containing layer is provided on the first GaN layer. The second Si-containing layer contains Si. The second GaN layer is provided on the second Si-containing layer. The functional layer is provided on the stacked body. The functional layer includes a nitride semiconductor.
    Type: Application
    Filed: April 16, 2015
    Publication date: August 6, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshiki HIKOSAKA, Yoshiyuki HARADA, Hisashi YOSHIDA, Naoharu SUGIYAMA, Shinya NUNOUE
  • Publication number: 20150214436
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a light emitting unit, a second semiconductor layer, a reflecting electrode, an oxide layer and a nitrogen-containing layer. The first semiconductor layer is of a first conductivity type. The light emitting unit is provided on the first semiconductor layer. The second semiconductor layer is provided on the light emitting unit and is of a second conductivity type. The reflecting electrode is provided on the second semiconductor layer and includes Ag. The oxide layer is provided on the reflecting electrode. The oxide layer is insulative and has a first opening. The nitrogen-containing layer is provided on the oxide layer. The nitrogen-containing layer is insulative and has a second opening communicating with the first opening.
    Type: Application
    Filed: April 13, 2015
    Publication date: July 30, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshihide ITO, Hiroshi Katsuno, Shinya Nunoue
  • Patent number: 9093588
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a well layer, a barrier layer, an Al-containing layer, and an intermediate layer. The p-type semiconductor layer is provided on a side of [0001] direction of the n-type semiconductor layer. The well layer, the barrier layer, the Al-containing layer and the intermediate layer are disposed between the n-type semiconductor layer and the p-type semiconductor layer subsequently. The Al-containing layer has a larger band gap energy than the barrier layer, a smaller lattice constant than the n-type semiconductor layer, and a composition of Alx1Ga1-x1-y1Iny1N. The intermediate layer has a larger band gap energy than the well layer, and has a first portion and a second portion provided between the first portion and the p-type semiconductor layer. A band gap energy of the first portion is smaller than that of the second portion.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: July 28, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jongil Hwang, Shinji Saito, Maki Sugai, Rei Hashimoto, Yasushi Hattori, Masaki Tohyama, Shinya Nunoue
  • Patent number: 9093609
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting part, and a p-side electrode. The light emitting part is provided between the n-type and the p-type semiconductor layers, and includes a plurality of barrier layers and a plurality of well layers. The p-side electrode contacts the p-type semiconductor layer. The p-type semiconductor layer includes first, second, third, and fourth p-type layers. The first p-type layer contacts the p-side electrode. The second p-type layer contacts the light emitting part. The third p-type layer is provided between the first p-type layer and the second p-type layer. The fourth p-type layer is provided between the second p-type layer and the third p-type layer. The second p-type layer contains Al and contains a p-type impurity in a lower concentration lower than that in the first concentration.
    Type: Grant
    Filed: February 7, 2014
    Date of Patent: July 28, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Tachibana, Hajime Nago, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
  • Publication number: 20150200255
    Abstract: According to one embodiment, a nitride semiconductor element includes a functional layer and a stacked body. The stacked body includes a GaN intermediate layer, a low Al composition layer, a high Al composition layer, and a first Si-containing layer. The low Al composition layer includes a nitride semiconductor having a first Al composition ratio. The low Al composition layer is provided between the GaN intermediate layer and the functional layer. The high Al composition layer includes a nitride semiconductor having a second Al composition ratio. The high Al composition layer is provided between the GaN intermediate layer and the low Al composition layer. The second Al composition ratio is higher than the first Al composition ratio. The first Si-containing layer is provided between the GaN intermediate layer and the high Al composition layer.
    Type: Application
    Filed: January 9, 2015
    Publication date: July 16, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshiki Hikosaka, Hisashi Yoshida, Hajime Nago, Shinya Nunoue
  • Patent number: 9082931
    Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structure body, a first electrode, a second electrode, and a dielectric body part. The stacked structure body includes a first semiconductor layer, having a first portion and a second portion juxtaposed with the first portion, a light emitting layer provided on the second portion, a second semiconductor layer provided on the light emitting layer. The first electrode includes a contact part provided on the first portion and contacting the first layer. The second electrode includes a first part provided on the second semiconductor layer and contacting the second layer, and a second part electrically connected with the first part and including a portion overlapping with the contact part when viewed from the first layer toward the second layer. The dielectric body part is provided between the contact part and the second part.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: July 14, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Katsuno, Satoshi Mitsugi, Toshiyuki Oka, Shinya Nunoue
  • Patent number: 9076929
    Abstract: According to one embodiment, a semiconductor light emitting element includes a first electrode, first and second light emitting units, first and second conductive layers, a first connection electrode, a first dielectric layer, first and second pads, and a first inter-light emitting unit dielectric layer. The first light emitting unit includes first and second semiconductor layers, and a first light emitting layer. The first semiconductor layer includes a first semiconductor portion and a second semiconductor portion. The second light emitting unit includes a third semiconductor layer, a fourth semiconductor layer, and a second light emitting layer. The fourth semiconductor layer is electrically connected with the first electrode. The first conductive layer is electrically connected with the third semiconductor layer. The second conductive layer is electrically connected with the second semiconductor layer.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: July 7, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Katsuno, Shinji Saito, Rei Hashimoto, Jongil Hwang, Shinya Nunoue
  • Patent number: 9070841
    Abstract: According to one embodiment, a semiconductor light emitting device includes: a stacked body, a wavelength conversion layer, a first metal layer, and a first insulating section. The stacked body includes: a first and a second semiconductor layers; and a first light emitting layer provided between the first and the second semiconductor layers. The wavelength conversion layer is configured to convert wavelength of light emitted from the first light emitting layer. The first semiconductor layer is placed between the first light emitting layer and the wavelength conversion layer. The first metal layer is electrically connected to the second semiconductor layer. The first insulating section is provided between a first side surface and a first side surface portion of the first metal layer and between the wavelength conversion layer and the first side surface portion.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: June 30, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinji Yamada, Hiroshi Katsuno, Satoshi Mitsugi, Shinya Nunoue
  • Patent number: 9072146
    Abstract: A light-emitting electric-power generation module according to an embodiment includes a photoelectric conversion element for emitting light and generating electric power, a light-emission controller configured to control light emission of the photoelectric conversion element, an electric-power generation controller configured to control electric-power generation of the photoelectric conversion element, and a switching unit configured to switch light-emission state and electric-power generation state of the photoelectric conversion element.
    Type: Grant
    Filed: April 1, 2013
    Date of Patent: June 30, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Rei Hashimoto, Jongil Hwang, Shinji Saito, Shinya Nunoue
  • Patent number: 9064997
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type and having a major surface, a second semiconductor layer of a second conductivity type, and a light emitting layer provided between the first and second semiconductor layers. The major surface is opposite to the light emitting layer. The first semiconductor layer has structural bodies provided in the major surface. The structural bodies are recess or protrusion. A centroid of a first structural body aligns with a centroid of a second structural body nearest the first structural. hb, rb, and Rb satisfy rb/(2·hb)?0.7, and rb/Rb<1, where hb is a depth of the recess, rb is a width of a bottom portion of the recess, and Rb is a width of the protrusion.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: June 23, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Hikosaka, Yoshiyuki Harada, Maki Sugai, Shinya Nunoue
  • Patent number: 9065003
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer and configured to emit a light having a peak wavelength of 440 nanometers or more. Tensile strain is applied to the first semiconductor layer. An edge dislocation density of the first semiconductor layer is 5×109/cm2 or less. A lattice mismatch factor between the first semiconductor layer and the light emitting layer is 0.11 percent or less.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: June 23, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisashi Yoshida, Koichi Tachibana, Tomonari Shioda, Toshiki Hikosaka, Jongil Hwang, Hung Hung, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 9065004
    Abstract: In general, according to one embodiment, a semiconductor light emitting element includes: a first semiconductor layer; a second semiconductor layer; a light emitting layer. The light emitting layer includes a well layer with a thickness of t1 (nanometers). The well layer includes InxGa1-xN having an In composition ratio x higher than 0 and lower than 1. The first semiconductor layer has a tensile strain of not less than 0.02 percent and not more than 0.25 percent in a plane perpendicular to a stacking direction. A peak wavelength ?p (nanometers) of light satisfies a relationship of ?p=a1+a2×(x+(t1?3.0)×a3). The a1 is not less than 359 and not more than 363. The a2 is not less than 534 and not more than 550. The a3 is not less than 0.0205 and not more than 0.0235.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: June 23, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoharu Sugiyama, Shigeya Kimura, Hisashi Yoshida, Toshiki Hikosaka, Jumpei Tajima, Hajime Nago, Shinya Nunoue
  • Patent number: 9059375
    Abstract: According to one embodiment, a semiconductor light emitting device includes first and second semiconductor layers, and a light emitting unit. The light emitting unit is provided between the first and second semiconductor layers and includes well layers and barrier layers. The barrier layers include p-side and n-side barrier layers, and a first intermediate barrier layer. The n-side barrier layer is provided between the p-side barrier layer and the first semiconductor layer. The first intermediate barrier layer is provided between the barrier layers. The well layers include p-side and n-side well layers, and a first intermediate well layer. The p-side well layer is provided between the p-side barrier layer and the second semiconductor layer. The n-side well layer is provided between the n-side barrier layer and the first intermediate barrier layer. The first intermediate well layer is provided between the first intermediate barrier layer and the p-side barrier layer.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: June 16, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeya Kimura, Shinya Nunoue
  • Patent number: 9053931
    Abstract: According to one embodiment, a nitride semiconductor wafer includes: a silicon substrate; a buffer section provided on the silicon substrate; and a functional layer provided on the buffer section and contains nitride semiconductor. The buffer section includes first to n-th buffer layers (n being an integer of 4 or more) containing nitride semiconductor. An i-th buffer layer (i being an integer of 1 or more and less than n) of the first to n-th buffer layers has a lattice length Wi in a first direction parallel to a major surface of the first buffer layer. An (i+1)-th buffer layer provided on the i-th buffer layer has a lattice length W(i+1) in the first direction. In the first to n-th buffer layers the i-th buffer layer and the (i+1)-th buffer layer satisfy relation of (W(i+1)?Wi)/Wi?0.008.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: June 9, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisashi Yoshida, Toshiki Hikosaka, Yoshiyuki Harada, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 9054036
    Abstract: According to one embodiment, a nitride semiconductor device includes a stacked body and a functional layer. The stacked body includes an AlGaN layer of AlxGa1-xN (0<x?1), a first Si-containing layer, a first GaN layer, a second Si-containing layer, and a second GaN layer. The first Si-containing layer contacts an upper surface of the AlGaN layer. The first Si-containing layer contains Si at a concentration not less than 7×1019/cm3 and not more than 4×1020/cm3. The first GaN layer is provided on the first Si-containing layer. The first GaN layer includes a protrusion having an oblique surface tilted with respect to the upper surface. The second Si-containing layer is provided on the first GaN layer. The second Si-containing layer contains Si. The second GaN layer is provided on the second Si-containing layer. The functional layer is provided on the stacked body. The functional layer includes a nitride semiconductor.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: June 9, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiki Hikosaka, Yoshiyuki Harada, Hisashi Yoshida, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 9054229
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a second semiconductor layer, a light emitting layer, a dielectric layer, a first electrode, a second electrode and a support substrate. The first layer has a first and second surface. The second layer is provided on a side of the second surface of the first layer. The emitting layer is provided between the first and the second layer. The dielectric layer contacts the second surface and has a refractive index lower than that of the first layer. The first electrode includes a first and second portion. The first portion contacts the second surface and provided adjacent to the dielectric layer. The second portion contacts with an opposite side of the dielectric layer from the first semiconductor layer. The second electrode contacts with an opposite side of the second layer from the emitting layer.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: June 9, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Katsuno, Satoshi Mitsugi, Toshihide Ito, Shinya Nunoue