Patents by Inventor Shinya Nunoue

Shinya Nunoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9048362
    Abstract: According to one embodiment, a semiconductor light emitting device includes n-type and p-type semiconductor layers containing a nitride semiconductor and a light emitting layer. The emitting layer includes a barrier layer containing III group elements, and a well layer stacked with the barrier layer and containing III group elements. The barrier layer is divided into a first portion on an n-type semiconductor layer side and a second portion on a p-type semiconductor layer side, an In composition ratio in the III group elements of the second portion is lower than that of the first portion. The well layer is divided into a third portion on an n-type semiconductor layer side and a fourth portion on a p-type semiconductor layer side, an In composition ratio in the III group elements of the fourth portion is higher than that of the third portion.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: June 2, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeya Kimura, Yoshiyuki Harada, Hajime Nago, Koichi Tachibana, Shinya Nunoue
  • Patent number: 9040322
    Abstract: According to one embodiment, a method is disclosed for manufacturing a semiconductor light emitting element. The method can include bonding a stacked main body of a structural body to a substrate main body. The structural body includes a growth substrate and the stacked main body provided on the growth substrate. The stacked main body includes a first nitride semiconductor film, a light emitting film provided on the first nitride semiconductor film, and a second nitride semiconductor film provided on the light emitting film. The method can include removing the growth substrate. The method can include forming a plurality of stacked bodies. The method can include forming an uneven portion in a surface of a first nitride semiconductor layer. The method can include forming a plurality of the semiconductor light emitting elements.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: May 26, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taisuke Sato, Kotaro Zaima, Jumpei Tajima, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 9035336
    Abstract: A semiconductor device has an active layer, a first semiconductor layer of first conductive type, an overflow prevention layer disposed between the active layer and the first semiconductor layer, which is doped with impurities of first conductive type and which prevents overflow of electrons or holes, a second semiconductor layer of first conductive type disposed at least one of between the active layer and the overflow prevention layer and between the overflow prevention layer and the first semiconductor layer, and an impurity diffusion prevention layer disposed between the first semiconductor layer and the active layer, which has a band gap smaller than those of the overflow prevention layer, the first semiconductor layer and the second semiconductor layer and which prevents diffusion of impurities of first conductive type.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: May 19, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koichi Tachibana, Chie Hongo, Hajime Nago, Shinya Nunoue
  • Patent number: 9024293
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting portion. The light emitting portion is provided between the semiconductor layers and includes barrier layers and well layers alternately stacked. An n-side end well layer which is closest to the n-type semiconductor layer contains InwnGa1-wnN and has a layer thickness twn. An n-side end barrier layer which is closest to the n-type semiconductor layer contains InbnGa1-bnN and has a layer thickness tbn. A p-side end well layer which is closest to the p-type semiconductor layer contains InwpGa1-wpN and has a layer thickness twp. A p-side end barrier layer which is closest to the p-type semiconductor contains InbpGa1-bpN and has a layer thickness tbp. A value of (wp×twp+bp×tbp)/(twp+tbp) is higher than (wn×twn+bn×tbn)/(twn+tbn) and is not higher than 5 times (wn×twn+bn×tbn)/(twn+tbn).
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: May 5, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Tachibana, Toshiki Hikosaka, Shigeya Kimura, Hajime Nago, Shinya Nunoue
  • Patent number: 9018665
    Abstract: Certain embodiments provide a method for manufacturing a semiconductor light emitting device, including: providing a first stack film on a first substrate, the first stack film being formed by stacking a p-type nitride semiconductor layer, an active layer having a multiquantum well structure of a nitride semiconductor, and an n-type nitride semiconductor layer in this order; forming an n-electrode on an upper face of the n-type nitride semiconductor layer; and forming a concave-convex region on the upper face of the n-type nitride semiconductor layer by performing wet etching on the upper face of the n-type nitride semiconductor layer with the use of an alkaline solution, except for a region in which the n-electrode is formed.
    Type: Grant
    Filed: July 9, 2014
    Date of Patent: April 28, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kotaro Zaima, Toru Gotoda, Toshiyuki Oka, Shinya Nunoue
  • Patent number: 9018654
    Abstract: According to one embodiment, a semiconductor light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer, a light emitting layer, a p-side electrode and an n-side electrode. The p-type semiconductor layer includes a nitride semiconductor and has a first major surface. The n-type semiconductor layer includes a nitride semiconductor and has a second major surface. The light emitting layer is provided between the n-type semiconductor layer and the p-type semiconductor layer. The p-side electrode contacts a part of the p-type semiconductor layer on the first major surface. The n-side electrode contacts a part of the n-type semiconductor layer on the second major surface. The n-side electrode is provided outside and around the p-side electrode in a plan view along a direction from the p-type semiconductor layer to the n-type semiconductor layer.
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: April 28, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taisuke Sato, Shigeya Kimura, Kotaro Zaima, Koichi Tachibana, Shinya Nunoue
  • Publication number: 20150108521
    Abstract: A light emitting device according to embodiments includes a light emitting element emitting light with a peak wavelength of 420˜445 nm, a first phosphor emitting light with a peak wavelength of 485˜530 nm, a second phosphor emitting light with a peak wavelength of 530˜580 nm, and a third phosphor emitting light with a peak wavelength of 600˜650 nm. The device emits light having an emission spectrum that has a local minimum value of light intensity between a wavelength of 450˜470 nm or less, the local minimum value being 60% or less of a maximum value of light intensity at a longer wavelength side from the local minimum value, and the device emits light having a color temperature of 4600 K or higher and 5400 K or less.
    Type: Application
    Filed: August 28, 2014
    Publication date: April 23, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yasushi HATTORI, Masahiro KATO, Kunio ISHIDA, Shinya NUNOUE, Yumi FUKUDA
  • Patent number: 9012886
    Abstract: According to one embodiment, a semiconductor light emitting device includes: a first semiconductor layer; a second semiconductor layer; and a light emitting layer provided between the first and the second semiconductor layers. The first semiconductor layer includes a nitride semiconductor, and is of an n-type. The second semiconductor layer includes a nitride semiconductor, and is of a p-type. The light emitting layer includes: a first well layer; a second well layer provided between the first well layer and the second semiconductor layer; a first barrier layer provided between the first and the second well layers; and a first Al containing layer contacting the second well layer between the first barrier layer and the second well layer and containing layer containing Alx1Ga1-x1N (0.1?x1?0.35).
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: April 21, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jongil Hwang, Shinji Saito, Rei Hashimoto, Shinya Nunoue
  • Publication number: 20150102381
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a light emitting layer, a second semiconductor layer, and a low refractive index layer. The first semiconductor layer has a first major surface and a second major surface being opposite to the first major surface. The light emitting layer has an active layer provided on the second major surface. The second semiconductor layer is provided on the light emitting layer. The low refractive index layer covers partially the first major surface and has a refractive index lower than the refractive index of the first semiconductor layer.
    Type: Application
    Filed: December 19, 2014
    Publication date: April 16, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Naoharu SUGIYAMA, Taisuke Sato, Hiroshi Ono, Satoshi Mitsugi, Tomonari Shioda, Jongil Hwang, Hung Hung, Shinya Nunoue
  • Patent number: 9006706
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting layer, a first intermediate layer, and a second intermediate layer. The n-type and p-type semiconductor layers include a nitride semiconductor. The light emitting layer is provided between the n-type and p-type semiconductor layers, and includes barrier layers and a well layer. A bandgap energy of the well layer is less than that of the barrier layers. The first intermediate layer is provided between the light emitting layer and the p-type semiconductor layer. A bandgap energy of the first intermediate layer is greater than that of the barrier layers. The second intermediate layer includes first and second portions. The first portion is in contact with a p-side barrier layer most proximal to the p-type semiconductor layer. The second portion is in contact with the first intermediate layer.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: April 14, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hung Hung, Yoshiyuki Harada, Jongil Hwang, Mitsuhiro Kushibe, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 9006013
    Abstract: According to one embodiment, a method is disclosed for manufacturing a semiconductor light emitting device. The method can include forming a nitride semiconductor layer including a light emitting layer on a first substrate having an unevenness, bonding the nitride layer to a second substrate, and separating the first substrate from the nitride layer by irradiating the nitride layer with light. The forming the nitride layer includes leaving a cavity in a space inside a depression of the unevenness while forming a thin film on the depression. The film includes a same material as part of the nitride layer. The separating includes causing the film to absorb part of the light so that intensity of the light applied to a portion of the nitride layer facing the depression is made lower than intensity of the light applied to a portion facing a protrusion of the unevenness.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: April 14, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toru Gotoda, Toshiyuki Oka, Shinya Nunoue, Kotaro Zaima, Hiroshi Ono, Hajime Nago
  • Patent number: 9006709
    Abstract: According to one embodiment, a semiconductor light emitting element includes a first semiconductor layer of an n-type, a second semiconductor layer of a p-type, and a light emitting unit. The first semiconductor layer includes a nitride semiconductor. The second semiconductor layer includes a nitride semiconductor. The light emitting unit is provided between the first semiconductor layer and the second semiconductor layer. The light emitting unit includes a plurality of well layers stacked alternately with a plurality of barrier layers. The well layers include a first p-side well layer most proximal to the second semiconductor layer, and a second p-side well layer second most proximal to the second semiconductor layer. A localization energy of excitons of the first p-side well layer is smaller than a localization energy of excitons of the second p-side well layer.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: April 14, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeya Kimura, Hajime Nago, Shinya Nunoue
  • Patent number: 8994054
    Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structural body, a first electrode, a second electrode, a third electrode, and a fourth electrode. The stacked structural body includes a first semiconductor layer, a second semiconductor layer, and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer. The first electrode is electrically connected to the first semiconductor layer. The second electrode forms an ohmic contact with the second semiconductor layer. The second electrode is translucent to light emitted from the light emitting layer. The third electrode penetrates through the second electrode and is electrically connected to the second electrode to form Shottky contact with the second semiconductor layer. The third electrode is disposed between the fourth electrode and the second semiconductor layer.
    Type: Grant
    Filed: August 2, 2011
    Date of Patent: March 31, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Eiji Muramoto, Shinya Nunoue, Toshiyuki Oka
  • Patent number: 8987026
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type layer, a light emitting layer, a p-type layer, and a transparent electrode. The n-type layer includes a nitride semiconductor and has a thickness not more than 500 nm. The light emitting layer is provided on the n-type layer. The p-type layer is provided on the light emitting layer and includes a nitride semiconductor. The transparent electrode contacts the n-type layer. The n-type layer is disposed between the transparent electrode and the light emitting layer.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: March 24, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoharu Sugiyama, Tomonari Shioda, Shigeya Kimura, Koichi Tachibana, Shinya Nunoue
  • Publication number: 20150076448
    Abstract: According to one embodiment, a semiconductor light emitting device includes first and second semiconductor layers, and a light emitting unit. The light emitting unit is provided between the first and second semiconductor layers and includes well layers and barrier layers. The barrier layers include p-side and n-side barrier layers, and a first intermediate barrier layer. The n-side barrier layer is provided between the p-side barrier layer and the first semiconductor layer. The first intermediate barrier layer is provided between the barrier layers. The well layers include p-side and n-side well layers, and a first intermediate well layer. The p-side well layer is provided between the p-side barrier layer and the second semiconductor layer. The n-side well layer is provided between the n-side barrier layer and the first intermediate barrier layer. The first intermediate well layer is provided between the first intermediate barrier layer and the p-side barrier layer.
    Type: Application
    Filed: July 31, 2014
    Publication date: March 19, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shigeya KIMURA, Shinya NUNOUE
  • Patent number: 8981398
    Abstract: Certain embodiments provide a semiconductor light emitting device including: a first metal layer; a stack film including a p-type nitride semiconductor layer, an active layer, and an n-type nitride semiconductor layer; an n-electrode; a second metal layer; and a protection film protecting an outer circumferential region of the upper face of the n-type nitride semiconductor layer, side faces of the stack film, a region of an upper face of the second metal layer other than a region in contact with the p-type nitride semiconductor layer, and a region of an upper face of the first metal layer other than a region in contact with the second metal layer. Concavities and convexities are formed in a region of the upper face of the n-type nitride semiconductor layer, the region being outside the region in which the n-electrode is provided and being outside the regions covered with the protection film.
    Type: Grant
    Filed: April 15, 2014
    Date of Patent: March 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kotaro Zaima, Toru Gotoda, Toshiyuki Oka, Shinya Nunoue
  • Publication number: 20150060763
    Abstract: According to one embodiment, a semiconductor device includes an n-type semiconductor layer and a first metal layer. The n-type semiconductor layer includes a nitride semiconductor. The n-type semiconductor layer includes a boron-containing region including boron bonded to oxygen. The first metal layer contacts the boron-containing region.
    Type: Application
    Filed: August 14, 2014
    Publication date: March 5, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshihide ITO, Jumpei TAJIMA, Hiroshi KATSUNO, Shinya NUNOUE
  • Patent number: 8969891
    Abstract: According to one embodiment, a nitride semiconductor device includes a foundation layer and a functional layer. The foundation layer is formed on an Al-containing nitride semiconductor layer formed on a silicon substrate. The foundation layer has a thickness not less than 1 micrometer and including GaN. The functional layer is provided on the foundation layer. The functional layer includes a first semiconductor layer. The first semiconductor layer has an impurity concentration higher than an impurity concentration in the foundation layer and includes GaN of a first conductivity type.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: March 3, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonari Shioda, Hung Hung, Jongil Hwang, Taisuke Sato, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 8963176
    Abstract: According to one embodiment, a semiconductor light-emitting device includes an n-type semiconductor layer including a nitride semiconductor, a p-type semiconductor layer including a nitride semiconductor, a light-emitting portion and a stacked body. The light-emitting portion is provided between the n-type and p-type semiconductor layers and includes a barrier layer and a well layer. The well layer is stacked with the barrier layer. The stacked body is provided between the light-emitting portion and the n-type semiconductor layer and includes a first layer and a second layer. The second layer is stacked with the first layer. Average In composition ratio of the stacked body is higher than 0.4 times average In composition ratio of the light-emitting portion. The layer thickness tb of the barrier layer is 10 nanometers or less.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: February 24, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeya Kimura, Hajime Nago, Toshiyuki Oka, Koichi Tachibana, Toshiki Hikosaka, Shinya Nunoue
  • Publication number: 20150048404
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a second semiconductor layer, a light emitting layer, a bonding pad, a narrow wire electrode and a first insulating layer. The light emitting layer is provided between the first semiconductor layer and the second semiconductor layer and is in contact with the first semiconductor layer. The narrow wire electrode includes a first portion and a second portion. The first portion is provided on a surface of the first semiconductor layer not in contact with the light emitting layer and is in ohmic contact with the first semiconductor layer. The second portion is provided on the surface and located between the first portion and the bonding pad. The narrow wire electrode is electrically connected to the bonding pad. The first insulating layer is provided between the second portion and the first semiconductor layer.
    Type: Application
    Filed: September 25, 2014
    Publication date: February 19, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroshi KATSUNO, Satoshi MITSUGI, Shinya NUNOUE