Patents by Inventor Shinya Nunoue

Shinya Nunoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160035938
    Abstract: According to an embodiment, a semiconductor light emitting device includes a foundation layer, a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The foundation layer has an unevenness having recesses, side portions, and protrusions. A first major surface of the foundation layer has an overlay-region. The foundation layer has a plurality of dislocations including first dislocations whose one ends reaching the recess and second dislocations whose one ends reaching the protrusion. A proportion of a number of the second dislocations reaching the first major surface to a number of all of the second dislocations is smaller than a proportion of a number of the first dislocations reaching the first major surface to a number of all of the first dislocations. A number of the dislocations reaching the overlay-region of the first major surface is smaller than a number of all of the first dislocations.
    Type: Application
    Filed: October 15, 2015
    Publication date: February 4, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki HIKOSAKA, Yoshiyuki HARADA, Maki SUGAI, Shinya NUNOUE
  • Publication number: 20160035939
    Abstract: A semiconductor light emitting element includes a stacked body, a first metal layer, and a second metal layer. The stacked body includes a first semiconductor layer, a second semiconductor layer, and a light emitting layer. The second semiconductor layer is separated from the first semiconductor layer in a first direction. The light emitting layer is provided between the first semiconductor layer and the second semiconductor layer. The first metal layer is stacked with the stacked body in the first direction to be electrically connected to one selected from the first semiconductor layer and the second semiconductor layer. The first metal layer has a side surface extending in the first direction. The second metal layer covers at least a portion of the side surface of the first metal layer. A reflectance of the second metal layer is higher than a reflectance of the first metal layer.
    Type: Application
    Filed: October 12, 2015
    Publication date: February 4, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shinji YAMADA, Hiroshi KATSUNO, Satoshi MITSUGI, Naoharu SUGIYAMA, Shinya NUNOUE
  • Patent number: 9246055
    Abstract: According to one embodiment, a crystal growth method is disclosed for growing a crystal of a nitride semiconductor on a major surface of a substrate. The major surface is provided with asperities. The method can include depositing a buffer layer on the major surface at a rate of not more than 0.1 micrometers per hour. The buffer layer includes GaxAl1-xN (0.1?x<0.5) and has a thickness of not smaller than 20 nanometers and not larger than 50 nanometers. In addition, the method can include growing the crystal including a nitride semiconductor on the buffer layer at a temperature higher than a temperature of the substrate in the depositing the buffer layer.
    Type: Grant
    Filed: January 3, 2014
    Date of Patent: January 26, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hajime Nago, Koichi Tachibana, Toshiki Hikosaka, Shinya Nunoue
  • Publication number: 20160020362
    Abstract: According to one embodiment, a semiconductor light emitting device includes an electrode layer, a first semiconductor layer, a first elongated electrode, a second semiconductor layer, and a light emitting layer. The first semiconductor layer includes a crystal having a cleavage plane. The first semiconductor layer includes a first thin film portion and a thick film portion. The first thin film portion extends in a first direction perpendicular to a stacking direction from the electrode layer toward the first semiconductor layer. The first thin film portion has a first thickness. The thick film portion is arranged with the first thin film portion in a plane perpendicular to the stacking direction. An angle between the first direction and the cleavage plane is not less than 3 degrees and not more than 27 degrees. The first elongated electrode extends in the first direction in contact with the first thin film portion.
    Type: Application
    Filed: September 29, 2015
    Publication date: January 21, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Jumpei Tajima, Kotaro Zaima, Toshiki Hikosaka, Hiroshi Ono, Naoharu Sugiyama, Shinya Nunoue
  • Publication number: 20160013359
    Abstract: According to one embodiment, a semiconductor device includes a first semiconductor layer of an n type including a nitride semiconductor, a first metal layer of an alloy containing Al and Au, and a second metal layer. The first metal layer is in contact with the first semiconductor layer. The second metal layer is in contact with the first metal layer. The second metal layer includes a metal different from Al. The first metal layer is disposed between the second metal layer and the first semiconductor layer.
    Type: Application
    Filed: September 24, 2015
    Publication date: January 14, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshihide ITO, Hiroshi KATSUNO, Shinya NUNOUE
  • Publication number: 20160005927
    Abstract: A semiconductor light emitting element includes a metal layer, a first semiconductor layer of a first conductivity type, a light emitting layer, a second semiconductor layer of a second conductivity type, a first electrode, a second electrode, and an insulating layer. The first semiconductor layer is separated from the metal layer in a first direction. The first semiconductor layer includes a first region, a second region, and a third region. The light emitting layer has a first side surface intersecting a second direction. The second semiconductor layer has a second side surface intersecting the second direction. The first electrode is electrically connected to the first region and the metal layer. The second electrode includes a first portion, and a second portion being continuous with the first portion. The insulating layer includes a first insulating portion and a second insulating portion.
    Type: Application
    Filed: April 23, 2015
    Publication date: January 7, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kenjiro UESUGI, Jumpei TAJIMA, Hiroshi ONO, Toshihide ITO, Shigeya KIMURA, Shinya NUNOUE
  • Patent number: 9231160
    Abstract: A semiconductor light emitting element includes a metal layer, a first semiconductor layer of a first conductivity type, a light emitting layer, a second semiconductor layer of a second conductivity type, a first electrode, a second electrode, and an insulating layer. The first semiconductor layer is separated from the metal layer in a first direction. The first semiconductor layer includes a first region, a second region, and a third region. The light emitting layer has a first side surface intersecting a second direction. The second semiconductor layer has a second side surface intersecting the second direction. The first electrode is electrically connected to the first region and the metal layer. The second electrode includes a first portion, and a second portion being continuous with the first portion. The insulating layer includes a first insulating portion and a second insulating portion.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: January 5, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenjiro Uesugi, Jumpei Tajima, Hiroshi Ono, Toshihide Ito, Shigeya Kimura, Shinya Nunoue
  • Publication number: 20150380495
    Abstract: According to one embodiment, a nitride semiconductor layer spreading along a first surface is provided. The nitride semiconductor layer includes a first region and a second region. A length of the first region in a first direction parallel to the first surface is longer than a length of the first region in a second direction parallel to the first surface and perpendicular to the first direction. The second region is arranged with the first region in the second direction. A length of the second region in the first direction is longer than a length of the second region in the second direction. A c-axis being is tilted with respect to the second direction for the first region and the second region. The c-axis intersects a third direction perpendicular to the first surface.
    Type: Application
    Filed: May 1, 2015
    Publication date: December 31, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshiki HIKOSAKA, Hiroshi ONO, Shinya NUNOUE
  • Patent number: 9214595
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a second semiconductor layer, a light emitting layer, a dielectric layer, a first electrode, a second electrode and a support substrate. The first layer has a first and second surface. The second layer is provided on a side of the second surface of the first layer. The emitting layer is provided between the first and the second layer. The dielectric layer contacts the second surface and has a refractive index lower than that of the first layer. The first electrode includes a first and second portion. The first portion contacts the second surface and provided adjacent to the dielectric layer. The second portion contacts with an opposite side of the dielectric layer from the first semiconductor layer. The second electrode contacts with an opposite side of the second layer from the emitting layer.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: December 15, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Katsuno, Satoshi Mitsugi, Toshihide Ito, Shinya Nunoue
  • Publication number: 20150357523
    Abstract: A semiconductor light emitting element includes a first substrate, a stacked body, an electrode, and a conductive layer. The first substrate has a first face and a first side face. The first side face intersects the first face. The first substrate includes a plurality of conductive portions and a plurality of insulating portions arranged alternately. The stacked body is aligned with the first substrate. The stacked body includes first and second semiconductor layers and a light emitting layer. The electrode is electrically connected to the first semiconductor layer. The conductive layer is electrically connected to at least one of the conductive portions and the second semiconductor layer. At least one of the insulating portions is disposed between the first side face and a portion of the conductive layer nearest to the first side face.
    Type: Application
    Filed: August 14, 2015
    Publication date: December 10, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Jumpei TAJIMA, Shigeya KIMURA, Hiroshi ONO, Naoharu SUGIYAMA, Shinya NUNOUE
  • Patent number: 9209362
    Abstract: A semiconductor light emitting device has a light emitting element, a first electrode layer, a second electrode layer, a seed electrode layer and a plated layer. The light emitting element has a nitride-based III-V compound semiconductor on a substrate. The light emitting element having a light extraction surface. The first electrode layer on the light extraction surface. The second electrode layer is provided on a surface opposite to the light extraction surface of the light emitting element. The seed electrode layer is configured to cover the entire surface of the second electrode layer. The plated layer is provided on the seed electrode layer. The light emitting element has a light emitting layer, a first conductive type semiconductor layer, and a second conductive type semiconductor layer.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: December 8, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toru Gotoda, Toshiyuki Oka, Shinya Nunoue, Kotaro Zaima
  • Publication number: 20150349199
    Abstract: According to one embodiment, a semiconductor light emitting device includes: a foundation layer, a first semiconductor layer, a light emitting part, and a second semiconductor layer. The foundation layer includes a nitride semiconductor. The foundation layer has a dislocation density not more than 5×108 cm?2. The first semiconductor layer of a first conductivity type is provided on the foundation layer and includes a nitride semiconductor. The light emitting part is provided on the first semiconductor layer. The light emitting part includes: a plurality of barrier layers; and a well layer provided between the barrier layers. The well layer has a bandgap energy smaller than a bandgap energy of the barrier layers and has a thickness larger than a thickness of the barrier layers. The second semiconductor layer of a second conductivity type different from the first conductivity type, is provided on the light emitting part and includes a nitride semiconductor.
    Type: Application
    Filed: August 12, 2015
    Publication date: December 3, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koichi TACHIBANA, Shigeya KIMURA, Hajime NAGO, Shinya NUNOUE
  • Patent number: 9202986
    Abstract: According to one embodiment, a semiconductor light emitting device includes first and second conductive layers, a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and a light emitting part. The second semiconductor layer is provided between the first conductive layer and the first semiconductor layer. The light emitting part is provided between the first and second semiconductor layers. The second conductive layer is in contact with the second semiconductor layer and the first conductive layer between the second semiconductor layer and the first conductive layer. The first and second conductive layers are transmittable to light emitted from the light emitting part. The first conductive layer includes a polycrystal having a first average grain diameter. The second conductive layer includes a polycrystal having a second average grain diameter of 150 nanometers or less and smaller than the first average grain diameter.
    Type: Grant
    Filed: November 25, 2013
    Date of Patent: December 1, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshihide Ito, Toshiyuki Oka, Shinya Nunoue
  • Patent number: 9202873
    Abstract: According to one embodiment, a semiconductor wafer includes a substrate, an AlN buffer layer, a foundation layer, a first high Ga composition layer, a high Al composition layer, a low Al composition layer, an intermediate unit and a second high Ga composition layer. The first layer is provided on the foundation layer. The high Al composition layer is provided on the first layer. The low Al composition layer is provided on the high Al composition layer. The intermediate unit is provided on the low Al composition layer. The second layer is provided on the intermediate unit. The first layer has a first tensile strain and the second layer has a second tensile strain larger than the first tensile strain. Alternatively, the first layer has a first compressive strain and the second layer has a second compressive strain smaller than the first compressive strain.
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: December 1, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Harada, Toshiki Hikosaka, Hisashi Yoshida, Hung Hung, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 9202994
    Abstract: According to one embodiment, a semiconductor light emitting element includes a light reflecting layer, first second, third and fourth semiconductor layers, first and second light emitting layers, and a first light transmitting layer. The second semiconductor layer is provided between the first semiconductor layer and the light reflecting layer. The first light emitting layer is provided between the first and second semiconductor layers. The first light transmitting layer is provided between the second semiconductor layer and the light reflecting layer. The third semiconductor layer is provided between the first light transmitting layer and the light reflecting layer. The fourth semiconductor layer is provided between the third semiconductor layer and the light reflecting layer. The second light emitting layer is provided between the third and fourth semiconductor layers. The light reflecting layer is electrically connected to one selected from the third and fourth semiconductor layers.
    Type: Grant
    Filed: February 10, 2014
    Date of Patent: December 1, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Rei Hashimoto, Shigeya Kimura, Jongil Hwang, Hiroshi Katsuno, Shinji Saito, Shinya Nunoue
  • Publication number: 20150340348
    Abstract: According to one embodiment, a semiconductor light emitting device includes: a conductive layer; a first stacked body; a second stacked body; a first light-transmissive electrode; and a first interconnect electrode. The first stacked body includes a first semiconductor layer and a second semiconductor layer. The second semiconductor layer is provided between the first semiconductor layer and the conductive layer. The first light emitting layer is provided between the first semiconductor layer and the second semiconductor layer. The second stacked body includes a third semiconductor layer, a fourth semiconductor layer, and a second light emitting layer. The fourth semiconductor layer is provided between the third semiconductor layer and the conductive layer. The second light emitting layer is provided between the third semiconductor layer and the fourth semiconductor layer. The first interconnect electrode is provided between the second semiconductor layer and the third semiconductor layer.
    Type: Application
    Filed: July 31, 2015
    Publication date: November 26, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi KATSUNO, Shinji SAITO, Rei HASHIMOTO, Jongil HWANG, Shinya NUNOUE
  • Patent number: 9196786
    Abstract: According to one embodiment, a semiconductor light emitting element includes an n-type semiconductor layer including a nitride semiconductor, a p-type semiconductor layer and a light emitting layer. The p-type semiconductor layer includes a first p-side layer of Alx1Ga1?x1N (0?x1<1) including Mg, a second p-side layer of Alx2Ga1?x2N (0<x2<1) including Mg and a third p-side layer of Alx3Ga1?x3N (x2<x3<1) including Mg. The light emitting layer is provided between the n-type semiconductor layer and the second p-side layer. The light emitting layer includes barrier layers and well layers. Each of the well layers is provided between the barrier layers. A p-side barrier layer of the barrier layers most proximal to the second p-side layer includes a first layer of Alz1Ga1?z1N (0?z1), and a second layer of Alz2Ga1?z2N (z1<z2<x2).
    Type: Grant
    Filed: December 12, 2013
    Date of Patent: November 24, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hajime Nago, Shigeya Kimura, Yoshiyuki Harada, Shinya Nunoue
  • Patent number: 9196784
    Abstract: According to one embodiment, a semiconductor device includes an n-type semiconductor layer and a first metal layer. The n-type semiconductor layer includes a nitride semiconductor. The n-type semiconductor layer includes a boron-containing region including boron bonded to oxygen. The first metal layer contacts the boron-containing region.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: November 24, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshihide Ito, Jumpei Tajima, Hiroshi Katsuno, Shinya Nunoue
  • Patent number: 9190559
    Abstract: According to an embodiment, a semiconductor light emitting device includes a foundation layer, a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The foundation layer has an unevenness having recesses, side portions, and protrusions. A first major surface of the foundation layer has an overlay-region. The foundation layer has a plurality of dislocations including first dislocations whose one ends reaching the recess and second dislocations whose one ends reaching the protrusion. A proportion of a number of the second dislocations reaching the first major surface to a number of all of the second dislocations is smaller than a proportion of a number of the first dislocations reaching the first major surface to a number of all of the first dislocations. A number of the dislocations reaching the overlay-region of the first major surface is smaller than a number of all of the first dislocations.
    Type: Grant
    Filed: June 10, 2014
    Date of Patent: November 17, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Hikosaka, Yoshiyuki Harada, Maki Sugai, Shinya Nunoue
  • Publication number: 20150325555
    Abstract: According to one embodiment, a semiconductor light emitting element includes a light reflecting layer, first second, third and fourth semiconductor layers, first and second light emitting layers, and a first light transmitting layer. The second semiconductor layer is provided between the first semiconductor layer and the light reflecting layer. The first light emitting layer is provided between the first and second semiconductor layers. The first light transmitting layer is provided between the second semiconductor layer and the light reflecting layer. The third semiconductor layer is provided between the first light transmitting layer and the light reflecting layer. The fourth semiconductor layer is provided between the third semiconductor layer and the light reflecting layer. The second light emitting layer is provided between the third and fourth semiconductor layers. The light reflecting layer is electrically connected to one selected from the third and fourth semiconductor layers.
    Type: Application
    Filed: June 9, 2015
    Publication date: November 12, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Rei Hashimoto, Shigeya Kimura, Jongil Hwang, Hiroshi Katsuno, Shinji Saito, Shinya Nunoue