Patents by Inventor Shinya Sasagawa

Shinya Sasagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9123751
    Abstract: An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks. In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by dry etching in which an etching gas is used, and a second etching step is performed by wet etching in which an etchant is used.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: September 1, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunichi Ito, Miyuki Hosoba, Hideomi Suzawa, Shinya Sasagawa, Taiga Muraoka
  • Publication number: 20150236166
    Abstract: Provided is a miniaturized transistor with stable and high electrical characteristics with high yield. In a semiconductor device including the transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer are stacked in this order, a first sidewall insulating layer is provided in contact with a side surface of the gate electrode layer, and a second sidewall insulating layer is provided to cover a side surface of the first sidewall insulating layer. The first sidewall insulating layer is an aluminum oxide film in which a crevice with an even shape is formed on its side surface. The second sidewall insulating layer is provided to cover the crevice. A source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film and the second sidewall insulating layer.
    Type: Application
    Filed: April 30, 2015
    Publication date: August 20, 2015
    Inventors: Motomu KURATA, Shinya SASAGAWA, Taiga MURAOKA, Tetsuhiro TANAKA, Junichi KOEZUKA
  • Publication number: 20150228802
    Abstract: An object is to provide a transistor including an oxide semiconductor having favorable electrical characteristics and a manufacturing method thereof. A semiconductor device includes an oxide semiconductor film and an insulating film over a substrate. An end portion of the oxide semiconductor film is in contact with the insulating film. The oxide semiconductor film includes a channel formation region and regions containing a dopant between which the channel formation region is sandwiched. The semiconductor device further includes a gate insulating film over and in contact with the oxide semiconductor film, a gate electrode with a sidewall insulating film over the gate insulating film, and a source electrode and a drain electrode in contact with the sidewall insulating film, the oxide semiconductor film, and the insulating film.
    Type: Application
    Filed: April 27, 2015
    Publication date: August 13, 2015
    Inventors: Hideomi SUZAWA, Shinya SASAGAWA
  • Patent number: 9105749
    Abstract: In a transistor including a wide band gap semiconductor layer as a semiconductor layer, a wide band gap semiconductor layer is separated into an island shape by an insulating layer with passivation properties for preventing atmospheric components from permeating. The edge portion of the island shape wide band gap semiconductor layer is in contact with the insulating film; thus, moisture or atmospheric components can be prevented from entering from the edge portion of the semiconductor layer to the wide band gap semiconductor layer.
    Type: Grant
    Filed: May 8, 2012
    Date of Patent: August 11, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinya Sasagawa, Akihiro Ishizuka, Takehisa Hatano
  • Publication number: 20150214041
    Abstract: In a processing method of a stacked-layer film in which a metal film is provided on an oxide insulating film, plasma containing an oxygen ion is generated by applying high-frequency power with power density greater than or equal to 0.59 W/cm2 and less than or equal to 1.18 W/cm2 to the stacked-layer film side under an atmosphere containing oxygen in which pressure is greater than or equal to 5 Pa and less than or equal to 15 Pa, the metal film is oxidized by the oxygen ion, and an oxide insulating film containing excess oxygen is formed by supplying oxygen to the oxide insulating film.
    Type: Application
    Filed: April 3, 2015
    Publication date: July 30, 2015
    Inventors: Kazuya HANAOKA, Shinya SASAGAWA
  • Publication number: 20150214381
    Abstract: To give favorable electrical characteristics to a semiconductor device. The semiconductor device includes an insulating layer, a semiconductor layer over the insulating layer, a pair of electrodes over the semiconductor layer and each electrically connected to the semiconductor layer, a gate electrode over the semiconductor layer, and a gate insulating layer between the semiconductor layer and the gate electrode. The insulating layer includes an island-shaped projecting portion. A top surface of the projecting portion of the insulating layer is in contact with a bottom surface of the semiconductor layer, and is positioned on an inner side of the semiconductor layer when seen from above. The pair of electrodes covers part of a top surface and part of side surfaces of the semiconductor layer. Furthermore, the gate electrode and the gate insulating layer cover side surfaces of the projecting portion of the insulating layer.
    Type: Application
    Filed: April 7, 2015
    Publication date: July 30, 2015
    Inventors: Shinya SASAGAWA, Motomu KURATA
  • Patent number: 9093539
    Abstract: To establish a processing technique in manufacture of a semiconductor device including an In—Sn—Zn—O-based semiconductor. An In—Sn—Zn—O-based semiconductor layer is selectively etched by dry etching with the use of a gas containing chlorine such as Cl2, BCl3, SiCl4, or the like. In formation of a source electrode layer and a drain electrode layer, a conductive layer on and in contact with the In—Sn—Zn—O-based semiconductor layer can be selectively etched with little removal of the In—Sn—Zn—O-based semiconductor layer with the use of a gas containing oxygen or fluorine in addition to a gas containing chlorine.
    Type: Grant
    Filed: May 8, 2012
    Date of Patent: July 28, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinya Sasagawa, Hitoshi Nakayama, Hiroshi Fujiki
  • Publication number: 20150187814
    Abstract: A semiconductor device that is suitable for miniaturization is provided. A semiconductor device including a first element, a first insulator over the first element, a first barrier film over the first insulator, a first conductor over the first barrier film, a second barrier film over the first conductor, a second insulator over the second barrier film, and a semiconductor over the second insulator is provided. The first conductor is surrounded by the first barrier film and the second barrier film.
    Type: Application
    Filed: December 22, 2014
    Publication date: July 2, 2015
    Inventors: Hidekazu Miyairi, Shinya Sasagawa
  • Publication number: 20150179776
    Abstract: An insulating layer is provided with a projecting structural body, and a channel formation region of an oxide semiconductor layer is provided in contact with the projecting structural body, whereby the channel formation region is extended in a three dimensional direction (a direction perpendicular to a substrate). Thus, it is possible to miniaturize a transistor and to extend an effective channel length of the transistor. Further, an upper end corner portion of the projecting structural body, where a top surface and a side surface of the projecting structural body intersect with each other, is curved, and the oxide semiconductor layer is formed to include a crystal having a c-axis perpendicular to the curved surface.
    Type: Application
    Filed: February 24, 2015
    Publication date: June 25, 2015
    Inventors: Atsuo ISOBE, Toshinari SASAKI, Shinya SASAGAWA, Akihiro ISHIZUKA
  • Publication number: 20150179775
    Abstract: An object is to provide a semiconductor device in which defects are reduced and miniaturization is achieved while favorable characteristics are maintained. A semiconductor layer is formed; a first conductive layer is formed over the semiconductor layer; the first conductive layer is etched with use of a first resist mask to form a second conductive layer having a recessed portion; the first resist mask is reduced in size to form a second resist mask; the second conductive layer is etched with use of the second resist mask to form source and drain electrodes each having a projecting portion with a tapered shape at the peripheries; a gate insulating layer is formed over the source and drain electrodes to be in contact with part of the semiconductor layer; and a gate electrode is formed in a portion over the gate insulating layer and overlapping with the semiconductor layer.
    Type: Application
    Filed: February 19, 2015
    Publication date: June 25, 2015
    Inventors: Shinya SASAGAWA, Motomu KURATA
  • Publication number: 20150171195
    Abstract: A semiconductor device having a transistor including an oxide semiconductor film is disclosed. In the semiconductor device, the oxide semiconductor film is provided along a trench formed in an insulating layer. The trench includes a lower end corner portion and an upper end corner portion having a curved shape with a curvature radius of longer than or equal to 20 nm and shorter than or equal to 60 nm, and the oxide semiconductor film is provided in contact with a bottom surface, the lower end corner portion, the upper end corner portion, and an inner wall surface of the trench. The oxide semiconductor film includes a crystal having a c-axis substantially perpendicular to a surface at least over the upper end corner portion.
    Type: Application
    Filed: December 19, 2014
    Publication date: June 18, 2015
    Inventors: Atsuo ISOBE, Toshinari SASAKI, Shinya SASAGAWA, Akihiro ISHIZUKA
  • Publication number: 20150171222
    Abstract: A semiconductor device with favorable electrical characteristics is provided. The semiconductor device includes an insulating layer, a semiconductor layer over the insulating layer, a source electrode layer and a drain electrode layer electrically connected to the semiconductor layer, a gate insulating film over the semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode layer overlapping with part of the semiconductor layer, part of the source electrode layer, and part of the drain electrode layer with the gate insulating film therebetween. A cross section of the semiconductor layer in the channel width direction is substantially triangular or substantially trapezoidal. The effective channel width is shorter than that for a rectangular cross section.
    Type: Application
    Filed: December 16, 2014
    Publication date: June 18, 2015
    Inventors: Shinya Sasagawa, Motomu Kurata, Kazuya Hanaoka, Yoshiyuki Kobayashi, Daisuke Matsubayashi
  • Patent number: 9059219
    Abstract: Provided is a method for manufacturing a transistor by which the defective shape of a semiconductor device is prevented in the case where a source electrode layer and a drain electrode layer are formed on an oxide semiconductor film. A source electrode layer and a drain electrode layer are formed each having a cross-sectional shape with which disconnection of a gate insulating film is unlikely to occur even when the gate insulating film over the source electrode layer and the drain electrode layer has a small thickness. An oxide semiconductor film having a crystal structure over an insulating surface is formed; an electrode layer on the oxide semiconductor film is formed; and a thickness of an exposed portion of the oxide semiconductor film is reduced by exposing the oxide semiconductor film to dilute hydrofluoric acid with a concentration higher than 0.0001% and lower than or equal to 0.25%.
    Type: Grant
    Filed: June 6, 2013
    Date of Patent: June 16, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinya Sasagawa, Hiroshi Fujiki
  • Patent number: 9048321
    Abstract: Provided is a miniaturized transistor with stable and high electrical characteristics with high yield. In a semiconductor device including the transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer are stacked in this order, a first sidewall insulating layer is provided in contact with a side surface of the gate electrode layer, and a second sidewall insulating layer is provided to cover a side surface of the first sidewall insulating layer. The first sidewall insulating layer is an aluminum oxide film in which a crevice with an even shape is formed on its side surface. The second sidewall insulating layer is provided to cover the crevice. A source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film and the second sidewall insulating layer.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: June 2, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Motomu Kurata, Shinya Sasagawa, Taiga Muraoka, Tetsuhiro Tanaka, Junichi Koezuka
  • Publication number: 20150137124
    Abstract: In a semiconductor device including a transistor in which an oxide semiconductor layer, a gate insulating layer, and a gate electrode layer on side surfaces of which sidewall insulating layers are provided are stacked in this order, a source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor layer and the sidewall insulating layers. In a process for manufacturing the semiconductor device, a conductive layer and an interlayer insulating layer are stacked to cover the oxide semiconductor layer, the sidewall insulating layers, and the gate electrode layer. Then, parts of the interlayer insulating layer and the conductive layer over the gate electrode layer are removed by a chemical mechanical polishing method, so that a source electrode layer and a drain electrode layer are formed. Before formation of the gate insulating layer, cleaning treatment is performed on the oxide semiconductor layer.
    Type: Application
    Filed: January 30, 2015
    Publication date: May 21, 2015
    Inventors: Yuji EGI, Hideomi SUZAWA, Shinya SASAGAWA
  • Patent number: 9023684
    Abstract: An object is to provide a transistor including an oxide semiconductor having favorable electrical characteristics and a manufacturing method thereof. A semiconductor device includes an oxide semiconductor film and an insulating film over a substrate. An end portion of the oxide semiconductor film is in contact with the insulating film. The oxide semiconductor film includes a channel formation region and regions containing a dopant between which the channel formation region is sandwiched. The semiconductor device further includes a gate insulating film over and in contact with the oxide semiconductor film, a gate electrode with a sidewall insulating film over the gate insulating film, and a source electrode and a drain electrode in contact with the sidewall insulating film, the oxide semiconductor film, and the insulating film.
    Type: Grant
    Filed: February 24, 2012
    Date of Patent: May 5, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideomi Suzawa, Shinya Sasagawa
  • Patent number: 9006803
    Abstract: An insulating layer is provided with a projecting structural body, and a channel formation region of an oxide semiconductor layer is provided in contact with the projecting structural body, whereby the channel formation region is extended in a three dimensional direction (a direction perpendicular to a substrate). Thus, it is possible to miniaturize a transistor and to extend an effective channel length of the transistor. Further, an upper end corner portion of the projecting structural body, where a top surface and a side surface of the projecting structural body intersect with each other, is curved, and the oxide semiconductor layer is formed to include a crystal having a c-axis perpendicular to the curved surface.
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: April 14, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Atsuo Isobe, Toshinari Sasaki, Shinya Sasagawa, Akihiro Ishizuka
  • Patent number: 9006732
    Abstract: In an embodiment, an insulating film is formed over a flat surface; a mask is formed over the insulating film; a slimming process is performed on the mask; an etching process is performed on the insulating film using the mask; a conductive film covering the insulating film is formed; a polishing process is performed on the conductive film and the insulating film, so that the conductive film and the insulating film have equal thicknesses; the conductive film is etched, so that a source electrode and a drain electrode which are thinner than the conductive film are formed; an oxide semiconductor film is formed in contact with the insulating film, the source electrode, and the drain electrode; a gate insulating film covering the oxide semiconductor film is formed; and a gate electrode is formed in a region which is over the gate insulating film and overlaps with the insulating film.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: April 14, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideomi Suzawa, Shinya Sasagawa
  • Patent number: 9006736
    Abstract: To give favorable electrical characteristics to a semiconductor device. The semiconductor device includes an insulating layer, a semiconductor layer over the insulating layer, a pair of electrodes over the semiconductor layer and each electrically connected to the semiconductor layer, a gate electrode over the semiconductor layer, and a gate insulating layer between the semiconductor layer and the gate electrode. The insulating layer includes an island-shaped projecting portion. A top surface of the projecting portion of the insulating layer is in contact with a bottom surface of the semiconductor layer, and is positioned on an inner side of the semiconductor layer when seen from above. The pair of electrodes covers part of a top surface and part of side surfaces of the semiconductor layer. Furthermore, the gate electrode and the gate insulating layer cover side surfaces of the projecting portion of the insulating layer.
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: April 14, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinya Sasagawa, Motomu Kurata
  • Patent number: 8999773
    Abstract: In a processing method of a stacked-layer film in which a metal film is provided on an oxide insulating film, plasma containing an oxygen ion is generated by applying high-frequency power with power density greater than or equal to 0.59 W/cm2 and less than or equal to 1.18 W/cm2 to the stacked-layer film side under an atmosphere containing oxygen in which pressure is greater than or equal to 5 Pa and less than or equal to 15 Pa, the metal film is oxidized by the oxygen ion, and an oxide insulating film containing excess oxygen is formed by supplying oxygen to the oxide insulating film.
    Type: Grant
    Filed: April 1, 2013
    Date of Patent: April 7, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kazuya Hanaoka, Shinya Sasagawa