Patents by Inventor Shiro Yamazaki

Shiro Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10415496
    Abstract: An engine-driven working machine includes a controller, which varies a control value of a solenoid valve so as to decrease or increase an opening degree of the solenoid valve when a rotating speed of an engine is within a predetermined high rotating speed range and the rotating speed of the engine is lower or higher than a predetermined rotating speed, respectively. When the control value of the solenoid valve is varied so as to decrease the opening degree of the solenoid valve and corresponds to a predetermined opening degree larger than a fully-closed state, the control value is set to a limitation value.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: September 17, 2019
    Assignees: YAMABIKO CORPORATION, IIDA DENKI KOGYO CO., LTD.
    Inventors: Shiro Yamaguchi, Takamasa Otsuji, Kosuke Matsumoto, Hiroyuki Miyaki, Akira Yamazaki
  • Patent number: 10394171
    Abstract: A method of manufacturing a heat-fixing rubber roller includes: forming a rubber layer of a silicone rubber composition on an outer periphery of a metal core shaft, the composition containing water-soluble sugar powder and methylene glycol; vulcanizing the rubber layer; and eluting the sugar powder and the triethylene glycol from the vulcanized rubber layer to form a foam rubber layer.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: August 27, 2019
    Assignee: SWCC SHOWA CABLE SYSTEMS CO., LTD.
    Inventors: Kazuhisa Ishikawa, Shiro Katsuki, Narutoshi Kusaka, Shinji Yamazaki, Yoshimi Matsuzawa
  • Patent number: 10329687
    Abstract: To reduce ungrown region or abnormal grain growth region in growing a Group III nitride semiconductor through a flux method. A seed substrate has a structure in which a Group III nitride semiconductor layer is formed on a ground substrate as a base, and a mask is formed on the Group III nitride semiconductor layer. The mask has a plurality of dotted windows in an equilateral triangular lattice pattern. A Group III nitride semiconductor is grown through flux method on the seed substrate. Carbon is placed on a lid of a crucible holing the seed substrate and a molten mixture so that carbon is not contact with the molten mixture at the start of crystal growth. Thereby, carbon is gradually added to the molten mixture as time passes. Thus, ungrown region or abnormal grain growth region is reduced in the Group III nitride semiconductor crystal grown on the seed substrate.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: June 25, 2019
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Miki Moriyama, Shiro Yamazaki, Yasuhide Yakushi
  • Publication number: 20180097142
    Abstract: The seed substrate comprises a base substrate and a base layer comprising a Group III nitride semiconductor formed on the base substrate, which has a high dislocation density region and a low dislocation density region. The planar pattern of the high dislocation density region is a honeycomb pattern. A hollow exists between the base substrate and the low dislocation density region. The object layer is grown through a flux method using the seed substrate. The high dislocation density region is melted back at an initial stage of crystal growth, and thereafter, the object layer is grown on the top surface of the low dislocation density region. A cavity remains between the high dislocation density region and the object layer. The presence of the cavity and the hollow makes easy to peel the object layer from the seed substrate.
    Type: Application
    Filed: September 25, 2017
    Publication date: April 5, 2018
    Inventors: Miki MORIYAMA, Shiro Yamazaki, Shohei Kumegawa
  • Publication number: 20180066378
    Abstract: To reduce ungrown region or abnormal grain growth region in growing a Group III nitride semiconductor through a flux method. A seed substrate has a structure in which a Group III nitride semiconductor layer is formed on a ground substrate as a base, and a mask is formed on the Group III nitride semiconductor layer. The mask has a plurality of dotted windows in an equilateral triangular lattice pattern. A Group III nitride semiconductor is grown through flux method on the seed substrate. Carbon is placed on a lid of a crucible holing the seed substrate and a molten mixture so that carbon is not contact with the molten mixture at the start of crystal growth. Thereby, carbon is gradually added to the molten mixture as time passes. Thus, ungrown region or abnormal grain growth region is reduced in the Group III nitride semiconductor crystal grown on the seed substrate.
    Type: Application
    Filed: September 6, 2017
    Publication date: March 8, 2018
    Inventors: Miki MORIYAMA, Shiro YAMAZAKI, Yasuhide YAKUSHI
  • Publication number: 20170081780
    Abstract: A method for producing a Group III nitride semiconductor single crystal, includes forming a mask layer on an underlayer, to thereby form a seed crystal in which a portion of the underlayer is covered with the mask layer and in which the remaining portion of the underlayer is not covered with the mask layer, etching the remaining portion, and growing a Group III nitride semiconductor single crystal on the seed crystal.
    Type: Application
    Filed: November 30, 2016
    Publication date: March 23, 2017
    Inventors: Seiji NAGAI, Miki MORIYAMA, Shohei KUMEGAWA, Shiro YAMAZAKI
  • Patent number: 9567693
    Abstract: The present invention provides a method for producing a Group III nitride semiconductor single crystal having excellent crystallinity, and a method for producing a GaN substrate having excellent crystallinity, the method including controlling melting back. Specifically, a mask layer is formed on a GaN substrate serving as a growth substrate. Then, a plurality of trenches which penetrate the mask layer and reach the GaN substrate are formed through photolithography. The obtained seed crystal and raw materials of a single crystal are fed to a crucible and subjected to treatment under pressurized and high temperature conditions. Portions of the GaN substrate exposed to the trenches undergo melting back with a flux. Through dissolution of the GaN substrate, the dimensions of the trenches increase, to provide large trenches. The GaN layer is grown from the surface of the mask layer as a starting point.
    Type: Grant
    Filed: February 7, 2013
    Date of Patent: February 14, 2017
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Seiji Nagai, Miki Moriyama, Shohei Kumegawa, Shiro Yamazaki
  • Patent number: 9388506
    Abstract: The present invention provides a semiconductor crystal removal apparatus which realizes effective removal of a semiconductor crystal from a crucible through rapid melting of a solidified flux, and a method for producing a semiconductor crystal. The semiconductor crystal removal apparatus includes a crucible support for supporting a crucible so that the opening of the crucible is directed downward; a heater for heating the crucible supported on the crucible support; and a semiconductor crystal receiving net for receiving a semiconductor crystal falling from the opening of the crucible. The semiconductor crystal removal apparatus further includes a determination portion for determining removal of the semiconductor crystal on the basis of a change in weight through falling of the semiconductor crystal.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: July 12, 2016
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Shiro Yamazaki, Seiji Nagai, Miki Moriyama
  • Patent number: 9263258
    Abstract: Provided is a method for producing a Group III nitride-based compound semiconductor having an M-plane main surface. The method employs a sapphire substrate having a main surface which is inclined by 30° with respect to R-plane about a line of intersection Lsapph-AM formed by R-plane and A-plane perpendicular thereto. R-plane surfaces of the sapphire substrate are exposed, and a silicon dioxide mask is formed on the main surface of the substrate. AlN buffer layers are formed on the exposed R-plane surfaces. A GaN layer is formed on the AlN buffer layers. At an initial stage of GaN growth, the top surface of the sapphire substrate is entirely covered with the GaN layer through lateral growth.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: February 16, 2016
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Seiji Nagai, Shiro Yamazaki, Takayuki Sato, Yasuhide Yakushi, Koji Okuno, Koichi Goshonoo
  • Patent number: 9028611
    Abstract: A method for producing a Group III nitride semiconductor includes reacting a molten mixture containing at least a Group III element and an alkali metal with a gas containing at least nitrogen, to thereby grow a Group III nitride semiconductor crystal on the seed crystal. The method includes forming a template substrate including a sapphire substrate and a first Group III nitride semiconductor layer as the seed crystal which is formed by vapor phase growth and which includes a c-plane as a main plane is employed, and the template substrate is placed and maintained in the molten mixture under conditions where crystal growth of the Group III nitride semiconductor is inhibited, to thereby partially melt back a plurality of separated parts of the first Group III nitride semiconductor layer to such a depth that the sapphire substrate is partially exposed.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: May 12, 2015
    Assignee: Toyoda Gosei Co., Ltd.
    Inventor: Shiro Yamazaki
  • Patent number: 8962456
    Abstract: Objects of the present invention are to provide a method for producing a Group III nitride semiconductor single crystal, which method enables production of a Group III nitride semiconductor single crystal having a flat surface by means of a crucible having any inside diameter; to provide a self-standing substrate obtained from the Group III nitride semiconductor single crystal; and to provide a semiconductor device employing the self-standing substrate. The production method includes adding the template, a flux, and semiconductor raw materials to a crucible and growing a Group III nitride semiconductor single crystal while the crucible is rotated. In the growth of the semiconductor single crystal, the crucible having an inside diameter R (mm) is rotated at a maximum rotation speed ? (rpm) satisfying the following conditions: ?1?4????1+4; ?1=10z; and z=?0.78×log10(R)+3.1.
    Type: Grant
    Filed: July 26, 2013
    Date of Patent: February 24, 2015
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Shiro Yamazaki, Miki Moriyama
  • Publication number: 20140239313
    Abstract: A method of producing a light-emitting semiconductor device of a group III nitride compound includes forming a buffer layer on a sapphire substrate, forming a Si-doped N+-layer with supplying silane, the N+-layer satisfying formula (Alx3Ga1-x3)y3In1-y3N, wherein 0?x3?1, 0?y3?1 and 0?x3+y3?1, forming an emission layer of a group III nitride compound semiconductor satisfying formula Alx1Gay1In1-x1-y1N, where 0?x1?1, 0?y1?1, and 0?x1+y1?1, on the N+-layer, and forming a P-layer of a P-type conduction on the emission layer, the P-layer including aluminum gallium nitride satisfying formula Alx2Ga1-x2N, wherein 0?x2?1.
    Type: Application
    Filed: May 2, 2014
    Publication date: August 28, 2014
    Applicant: TOYODA GOSEI Co., LTD.
    Inventors: Katsuhide Manabe, Hisaki Kato, Michinari Sassa, Shiro Yamazaki, Makoto Asai, Naoki Shibata, Masayoshi Koike
  • Publication number: 20140070370
    Abstract: Objects of the present invention are to provide a method for producing a Group III nitride semiconductor single crystal, which method enables production of a Group III nitride semiconductor single crystal having a flat surface by means of a crucible having any inside diameter; to provide a self-standing substrate obtained from the Group III nitride semiconductor single crystal; and to provide a semiconductor device employing the self-standing substrate. The production method includes adding the template, a flux, and semiconductor raw materials to a crucible and growing a Group III nitride semiconductor single crystal while the crucible is rotated. In the growth of the semiconductor single crystal, the crucible having an inside diameter R (mm) is rotated at a maximum rotation speed ? (rpm) satisfying the following conditions: ?1?4????1+4; ?1=10z; and z=?0.78×log10(R)+3.1.
    Type: Application
    Filed: July 26, 2013
    Publication date: March 13, 2014
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Shiro Yamazaki, Miki Moriyama
  • Publication number: 20140000509
    Abstract: The present invention provides a semiconductor crystal removal apparatus which realizes effective removal of a semiconductor crystal from a crucible through rapid melting of a solidified flux, and a method for producing a semiconductor crystal. The semiconductor crystal removal apparatus includes a crucible support for supporting a crucible so that the opening of the crucible is directed downward; a heater for heating the crucible supported on the crucible support; and a semiconductor crystal receiving net for receiving a semiconductor crystal falling from the opening of the crucible. The semiconductor crystal removal apparatus further includes a determination portion for determining removal of the semiconductor crystal on the basis of a change in weight through falling of the semiconductor crystal.
    Type: Application
    Filed: June 14, 2013
    Publication date: January 2, 2014
    Inventors: Shiro YAMAZAKI, Seiji NAGAI, Miki MORIYAMA
  • Patent number: 8507364
    Abstract: An object of the present invention is to realize, by the flux process, the production of a high-quality n-type semiconductor crystal having high concentration of electrons. The method of the invention for producing an n-type Group III nitride-based compound semiconductor by the flux process, the method including preparing a melt by melting at least a Group III element by use of a flux; supplying a nitrogen-containing gas to the melt; and growing an n-type Group III nitride-based compound semiconductor crystal on a seed crystal from the melt. In the method, carbon and germanium are dissolved in the melt, and germanium is incorporated as a donor into the semiconductor crystal, to thereby produce an n-type semiconductor crystal. The mole percentage of germanium to gallium in the melt is 0.05 mol % to 0.5 mol %, and the mole percentage of carbon to sodium is 0.1 mol % to 3.0 mol %.
    Type: Grant
    Filed: May 20, 2009
    Date of Patent: August 13, 2013
    Assignees: Toyoda Gosei Co., Ltd., NGK Insulators, Ltd., Osaka University
    Inventors: Seiji Nagai, Shiro Yamazaki, Yasuhide Yakushi, Takayuki Sato, Makoto Iwai, Katsuhiro Imai, Yusuke Mori, Yasuo Kitaoka
  • Patent number: 8361222
    Abstract: In the production of GaN through the flux method, deposition of miscellaneous crystals on the nitrogen-face of a GaN self-standing substrate and waste of raw materials are prevented. Four arrangements of crucibles and a GaN self-standing substrate are exemplified. In FIG. 1A, a nitrogen-face of a self-standing substrate comes into close contact with a sloped flat inner wall of a crucible. In FIG. 1B, a nitrogen-face of a self-standing substrate comes into close contact with a horizontally facing flat inner wall of a crucible, and the substrate is fixed by means of a jig. In FIG. 1C, a jig is provided on a flat bottom of a crucible, and two GaN self-standing substrates are fixed by means of the jig so that the nitrogen-faces of the substrates come into close contact with each other. In FIG. 1D, a jig is provided on a flat bottom of a crucible, and a GaN self-standing substrate is fixed on the jig so that the nitrogen-face of the substrate is covered with the jig.
    Type: Grant
    Filed: April 23, 2008
    Date of Patent: January 29, 2013
    Assignees: Toyoda Gosei Co., Ltd., NGK Insulators, Ltd.
    Inventors: Shiro Yamazaki, Seiji Nagai, Takayuki Sato, Katsuhiro Imai, Makoto Iwai, Takatomo Sasaki, Yusuke Mori, Fumio Kawamura
  • Patent number: 8349079
    Abstract: An apparatus for manufacturing a Group III nitride semiconductor is composed of a pressure vessel, a reaction vessel disposed within the pressure vessel, a heating device disposed within the pressure vessel so as to heat the reaction vessel, and a glove box filled with argon gas. The pressure vessel and the glove box are connected to each other via a gate valve. By virtue of this configuration, a large-sized reusable reaction vessel can be disposed within the pressure vessel without causing oxidation of Na.
    Type: Grant
    Filed: May 28, 2008
    Date of Patent: January 8, 2013
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Shiro Yamazaki, Koji Hirata
  • Patent number: 8343239
    Abstract: The invention provides a group III nitride semiconductor manufacturing system which is free from interruption to rotation of a rotational shaft.
    Type: Grant
    Filed: October 23, 2008
    Date of Patent: January 1, 2013
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Shiro Yamazaki, Koji Hirata
  • Publication number: 20120217510
    Abstract: A method of producing a light-emitting semiconductor device of a group III nitride compound includes forming a high carrier concentration N+-layer satisfying the formula (Alx3Ga1-x3)y3In1-y3N, wherein 0?x3?1, 0?y3?1 and 0?x3+y3?1, forming an emission layer of a group III nitride compound semiconductor satisfying the formula, Alx1Gay1In1-x1-y1N, where 0?x1?1, 0?y1?1 and 0?x1+y1?1 on the high carrier concentration layer N+-layer, and forming a P-layer of a P-type conduction, on the emission layer, the P-layer including aluminum gallium nitride satisfying the formula Alx2Ga1-x2N, wherein 0?x2?1.
    Type: Application
    Filed: May 10, 2012
    Publication date: August 30, 2012
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Katsuhide Manabe, Hisaki Kato, Michinari Sassa, Shiro Yamazaki, Makoto Asai, Naoki Shibata, Masayoshi Koike
  • Patent number: 8227324
    Abstract: A GaN single crystal 20 is grown on a crystal growth surface of a seed crystal (GaN layer 13) through the flux method in a nitrogen (N2) atmosphere at 3.7 MPa and 870° C. employing a flux mixture including Ga, Na, and Li at about 870° C. Since the back surface of the template 10 is R-plane of the sapphire substrate 11, the template 10 is readily corroded or dissolved in the flux mixture from the back surface thereof. Therefore, the template 10 is gradually dissolved or corroded from the back surface thereof, resulting in separation from the semiconductor or dissolution in the flux. When the GaN single crystal 20 is grown to a sufficient thickness, for example, about 500 ?m or more, the temperature of the crucible is maintained at 850° C. to 880° C., whereby the entirety of the sapphire substrate 11 is dissolved in the flux mixture.
    Type: Grant
    Filed: December 10, 2007
    Date of Patent: July 24, 2012
    Assignees: Toyoda Gosei Co., Ltd., NGK Insulators, Ltd., Osaka University
    Inventors: Shiro Yamazaki, Makoto Iwai, Takanao Shimodaira, Takatomo Sasaki, Yusuke Mori, Fumio Kawamura