Abstract: A high-frequency circuit board includes: a first insulating layer having a first dielectric constant; a first metal layer provided to stack over the first insulating layer; a second insulating layer provided to stack over the first metal layer, and having a second dielectric constant lower than the first dielectric constant; a second metal layer provided to stack over the second insulating layer, on which a compound semiconductor device is mounted; and first vias penetrating the second insulating layer and connecting the first metal layer with the second metal layer.

Abstract: A semiconductor device includes a protection film having an opening and covering a semiconductor layer, which is formed on a side of a surface of a substrate, on an opposite side of the substrate. An insulating film containing silicon is used for the protection film. A gate electrode is formed in the opening and on a side of a side surface of the semiconductor layer which faces a direction. An insulating film containing metal element is formed between the side surface of the semiconductor layer and the gate electrode. The exposure of the side surface of the semiconductor layer to a gas for dry etching for forming of the opening is suppressed by the insulating film. Furthermore, contact and a short circuit between the gate electrode and the side surface of the semiconductor layer are suppressed. As a result, deterioration in the performance of the semiconductor device is suppressed.

Abstract: A semiconductor device includes a source electrode and a drain electrode located over a surface of a semiconductor layer including an electron transit layer and an electron supply layer. A gate electrode is located between the source electrode and the drain electrode. A first diamond layer is located between the source electrode and the drain electrode over the surface with an insulating film therebetween. A second diamond layer is located directly on the surface between the gate electrode and the drain electrode. Of heat generated by the semiconductor layer of the semiconductor device in operation, heat on the side of the electrode on which a relatively strong electric field is applied is efficiently transferred to the second diamond layer. The semiconductor device achieves an excellent heat dissipation property from the semiconductor layer and effectively suppresses overheating and a failure and degradation of the characteristics due to the overheating.

Abstract: A semiconductor device includes a source electrode and a drain electrode located over a surface of a semiconductor layer including an electron transit layer and an electron supply layer. A gate electrode is located between the source electrode and the drain electrode. A first diamond layer is located between the source electrode and the drain electrode over the surface with an insulating film therebetween. A second diamond layer is located directly on the surface between the gate electrode and the drain electrode. Of heat generated by the semiconductor layer of the semiconductor device in operation, heat on the side of the electrode on which a relatively strong electric field is applied is efficiently transferred to the second diamond layer. The semiconductor device achieves an excellent heat dissipation property from the semiconductor layer and effectively suppresses overheating and a failure and degradation of the characteristics due to the overheating.

Abstract: A disclosed semiconductor device includes an electron transit layer; an electron supply layer disposed above the electron transit layer; a source electrode, a drain electrode, and a gate electrode, the source electrode, the drain electrode, and the gate electrode being disposed on the electron supply layer; a first capping layer disposed on the electron supply layer between the gate electrode and the drain electrode; and a negative charge generation layer disposed on the first capping layer, the negative charge generation layer being configured to generate a negative charge.

Abstract: A compound semiconductor device includes a carrier supply layer, a channel layer disposed over the carrier supply layer and configured to include InGaAs, and an etching stopper layer disposed over the channel layer, and configured to include a first layer disposed over the channel layer and configured to include Inx1Ga1-x1P, and a second layer disposed over the first layer and configured to include Inx2Ga1-x2P, wherein x1 is greater than 0 and less than or equal to 1, x2 is greater than or equal to 0 and less than 1, and x1 is greater than x2.

Abstract: A compound semiconductor device includes: a semiconductor laminate structure including an electron transit layer and an electron supply layer that are formed from a compound semiconductor; a gate electrode, a source electrode, and a drain electrode that are provided above the electron supply layer; and an insulating layer that is provided between the source electrode and the drain electrode, over the semiconductor laminate structure, and with a gate recess formed therein, wherein the gate electrode includes: a first portion in the gate recess; and a second portion that is coupled to the first portion and is provided over the insulating layer at a position further on the drain electrode side than the gate recess, wherein the insulating layer includes an aluminum oxide film in direct contact with the semiconductor laminate structure.

Abstract: A semiconductor device is provided. In particular, a semiconductor device is disclosed as including an electron transit layer; an electron supply layer disposed on or above the electron transit layer, the electron supply layer inducing a two-dimensional electron gas in the electron transit layer; a source electrode disposed on or above the electron supply layer; a drain electrode disposed on or above the electron supply layer; a gate electrode between the source electrode and the drain electrode; and an insulating film that is disposed in a region between the gate electrode and the drain electrode, and the region being closer to the gate electrode than to the drain electrode. The insulating film includes a nitrosyl group.

Abstract: A semiconductor device includes an AlN substrate, a semiconductor laminated structure, disposed above the substrate, and including an electron transit layer and an electron supply layer made of a nitride semiconductor, respectively, and a gate electrode, a source electrode, and a drain electrode disposed above the electron supply layer. The electron transit layer is located at a lowermost position of the semiconductor laminated structure. The gate electrode has a gate length of 0.3 ?m or less, and a ratio of a thickness of the semiconductor laminated structure with respect to the gate length of the gate electrode is 4.0 or less.

Abstract: A disclosed semiconductor device includes a semiconductor stack structure having an electron transit layer and an electron supply layer, the electron transit layer and the electron supply layer being compound semiconductors; a gate electrode, a source electrode, and a drain electrode, the gate electrode, the source electrode, and the drain electrode being deposed above the electron supply layer; a first insulating film disposed on the semiconductor stack structure between the gate electrode and the source electrode, the first insulating film being positively charged and in direct contact with the semiconductor stack structure; and a second insulating film disposed on the semiconductor stack structure between the gate electrode and the drain electrode, the second insulating film being covalent and in direct contact with the semiconductor stack structure.

Abstract: A compound semiconductor device includes a compound semiconductor stack structure, a protective film provided on the compound semiconductor stack structure and containing titanium oxide, and a polycrystalline diamond film provided on the protective film.

Abstract: A disclosed semiconductor device includes an electron transit layer; an electron supply layer disposed above the electron transit layer; a source electrode, a drain electrode, and a gate electrode, the source electrode, the drain electrode, and the gate electrode being disposed on the electron supply layer; a first capping layer disposed on the electron supply layer between the gate electrode and the drain electrode; and a negative charge generation layer disposed on the first capping layer, the negative charge generation layer being configured to generate a negative charge.

Abstract: A semiconductor device includes a source electrode and a drain electrode located over a surface of a semiconductor layer including an electron transit layer and an electron supply layer. A gate electrode is located between the source electrode and the drain electrode. A first diamond layer is located between the source electrode and the drain electrode over the surface with an insulating film therebetween. A second diamond layer is located directly on the surface between the gate electrode and the drain electrode. Of heat generated by the semiconductor layer of the semiconductor device in operation, heat on the side of the electrode on which a relatively strong electric field is applied is efficiently transferred to the second diamond layer. The semiconductor device achieves an excellent heat dissipation property from the semiconductor layer and effectively suppresses overheating and a failure and degradation of the characteristics due to the overheating.

Abstract: A compound semiconductor device includes a compound semiconductor laminate structure including an electron transit layer and an electron supply layer, a gate electrode, a source electrode, and a drain electrode that are formed over the electron supply layer, a first insulating layer of diamond formed between the gate electrode and the drain electrode over the compound semiconductor laminate structure, and a second insulating layer formed between the gate electrode and the source electrode over the compound semiconductor laminate structure, wherein a positive compressive stress is applied from the first insulating layer to the electron supply layer, and a compressive stress from the second insulating layer to the electron supply layer is smaller than the compressive stress from the first insulating layer to the electron supply layer.

Abstract: A compound semiconductor device includes: a semiconductor laminate structure including an electron transit layer and an electron supply layer that are formed from a compound semiconductor; a gate electrode, a source electrode, and a drain electrode that are provided above the electron supply layer; and an insulating layer that is provided between the source electrode and the drain electrode, over the semiconductor laminate structure, and with a gate recess formed therein, wherein the gate electrode includes: a first portion in the gate recess; and a second portion that is coupled to the first portion and is provided over the insulating layer at a position further on the drain electrode side than the gate recess, wherein the insulating layer includes an aluminum oxide film in direct contact with the semiconductor laminate structure.

Abstract: A semiconductor device includes: a first semiconductor layer formed, on a substrate, of a nitride semiconductor; a second semiconductor layer formed, on the first semiconductor layer, of a nitride semiconductor; a source electrode formed on the second semiconductor layer; a drain electrode formed on the second semiconductor layer; a metal oxide film formed, between the source electrode and the drain electrode, on the second semiconductor layer; and a gate electrode formed on the metal oxide film. The metal oxide film includes AlOx and InOx. AlOx/InOx in the metal oxide film is greater than or equal to 3.

Abstract: A semiconductor apparatus includes: a substrate; a first semiconductor layer of a nitride semiconductor disposed over the substrate; a second semiconductor layer of a nitride semiconductor disposed over the first semiconductor layer; an insulating film disposed over the second semiconductor layer; a source electrode and a drain electrode that are disposed over the second semiconductor layer; and a gate electrode. The gate electrode includes: a Schottky region disposed over the second semiconductor layer, and a gate field-plate region disposed over the insulating film in the vicinity of the Schottky region, wherein the gate electrode includes a first gate electrode section disposed in the gate field-plate region so as to face the drain electrode, and a second gate electrode section disposed in the Schottky region, and wherein a material constituting the first gate electrode section has a lower work function than a material constituting the second gate electrode section.

Abstract: A compound semiconductor device includes a compound semiconductor stack structure, a protective film provided on the compound semiconductor stack structure and containing titanium oxide, and a polycrystalline diamond film provided on the protective film.

Abstract: A semiconductor device includes: a semiconductor layer; a first insulating film which covers a surface of the semiconductor layer; a first adhering film which is formed on a surface of the first insulating film and contains a carbonyl group; and a second insulating film which covers a surface of the first adhering film and has a lower dielectric constant than the first insulating film.

Abstract: A compound semiconductor device includes a compound semiconductor laminate structure including an electron transit layer and an electron supply layer, a gate electrode, a source electrode, and a drain electrode that are formed over the electron supply layer, a first insulating layer of diamond formed between the gate electrode and the drain electrode over the compound semiconductor laminate structure, and a second insulating layer formed between the gate electrode and the source electrode over the compound semiconductor laminate structure, wherein a positive compressive stress is applied from the first insulating layer to the electron supply layer, and a compressive stress from the second insulating layer to the electron supply layer is smaller than the compressive stress from the first insulating layer to the electron supply layer.