Patents by Inventor Shirou Ozaki

Shirou Ozaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • COMPOUND SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
    Publication number: 20140295666
    Abstract: A compound semiconductor device includes a compound semiconductor laminated structure, a passivation film formed on the compound semiconductor laminated structure and having a through-hole, and a gate electrode formed on the passivation film so as to plug the through-hole. A grain boundary between different crystalline orientations is formed in the gate electrode, and a starting point of the grain boundary is located apart from the through-hole on a flat surface of the passivation film.
    Type: Application
    Filed: June 11, 2014
    Publication date: October 2, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Naoya Okamoto, Kozo Makiyama, Toshihiro Ohki, Yuichi Minoura, Shirou Ozaki, Toyoo Miyajima
  • SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME, POWER SUPPLY DEVICE, AND HIGH-FREQUENCY AMPLIFIER
    Publication number: 20140264451
    Abstract: A semiconductor device includes: a nitride semiconductor multilayer; an insulating film disposed on the nitride semiconductor multilayer; and a gate electrode disposed on the insulating film, wherein the nitride semiconductor multilayer has a first oxidized region near an interface with a region of the insulating film below the gate electrode, the first oxidized region having an oxygen concentration higher than an oxygen concentration of a region near an interface with a region of the insulating film other than below the gate electrode.
    Type: Application
    Filed: January 29, 2014
    Publication date: September 18, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, NAOYA OKAMOTO
  • Method of manufacturing semiconductor device and method of cleaning semiconductor substrate
    Patent number: 8815017
    Abstract: A method of manufacturing a semiconductor device includes: holding a semiconductor substrate with a surface inclined with respect to the vertical direction and the horizontal direction; and immersing the semiconductor substrate in a cleaning solution including an acid.
    Type: Grant
    Filed: July 26, 2013
    Date of Patent: August 26, 2014
    Assignee: Fujitsu Limited
    Inventors: Shirou Ozaki, Masayuki Takeda, Norikazu Nakamura, Junichi Kon
  • Compound semiconductor device and manufacturing therefor
    Patent number: 8791465
    Abstract: A compound semiconductor device includes a compound semiconductor laminated structure, a passivation film formed on the compound semiconductor laminated structure and having a through-hole, and a gate electrode formed on the passivation film so as to plug the through-hole. A grain boundary between different crystalline orientations is formed in the gate electrode, and a starting point of the grain boundary is located apart from the through-hole on a flat surface of the passivation film.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: July 29, 2014
    Assignee: Fujitsu Limited
    Inventors: Naoya Okamoto, Kozo Makiyama, Toshihiro Ohki, Yuichi Minoura, Shirou Ozaki, Toyoo Miyajima
  • COMPOUND SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
    Publication number: 20140185347
    Abstract: An HEMT includes, on an SiC substrate, a compound semiconductor layer, a silicon nitride (SiN) protective film having an opening and covering the compound semiconductor layer, and a gate electrode formed on the compound semiconductor layer so as to plug the opening. In the protective film, a projecting portion projecting from a side surface of the opening is formed at a lower layer portion 6a.
    Type: Application
    Filed: March 10, 2014
    Publication date: July 3, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Kozo Makiyama, Naoya Okamoto, Toshihiro Ohki, Yuichi Minoura, Shirou Ozaki, Toyoo Miyajima
  • Agent for post-etch treatment of silicon dielectric film, method of manufacturing semiconductor device, and semiconductor device
    Patent number: 8716209
    Abstract: The invention provides an agent for post-etch treating a silicon dielectric film, including: at least one nitrogen-containing substance selected from the group consisting of ammonium bases and amine compounds; an acid; and at least one silicon-containing compound containing silicon, carbon and hydrogen. According to the present invention, it becomes possible to suppress an increase in the dielectric constant of a silicon dielectric film caused by etching.
    Type: Grant
    Filed: September 15, 2009
    Date of Patent: May 6, 2014
    Assignee: Fujitsu Limited
    Inventors: Yasushi Kobayashi, Kouta Yoshikawa, Yoshihiro Nakata, Tadahiro Imada, Shirou Ozaki
  • Compound semiconductor device and manufacturing method therefor
    Patent number: 8709886
    Abstract: An HEMT includes, on an SiC substrate, a compound semiconductor layer, a silicon nitride (SiN) protective film having an opening and covering the compound semiconductor layer, and a gate electrode formed on the compound semiconductor layer so as to plug the opening. In the protective film, a projecting portion projecting from a side surface of the opening is formed at a lower layer portion 6a.
    Type: Grant
    Filed: July 23, 2012
    Date of Patent: April 29, 2014
    Assignee: Fujitsu Limited
    Inventors: Kozo Makiyama, Naoya Okamoto, Toshihiro Ohki, Yuichi Minoura, Shirou Ozaki, Toyoo Miyajima
  • ETCHING METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    Publication number: 20140090782
    Abstract: An etching method includes: applying a radiation to an etching aqueous solution; and etching a material to be etched by using the etching aqueous solution irradiated with the radiation.
    Type: Application
    Filed: December 5, 2013
    Publication date: April 3, 2014
    Applicant: FUJITSU LIMITED
    Inventor: Shirou OZAKI
  • Etching method, method for manufacturing semiconductor device, and etching device
    Patent number: 8637409
    Abstract: An etching method includes: applying a radiation to an etching aqueous solution; and etching a material to be etched by using the etching aqueous solution irradiated with the radiation.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: January 28, 2014
    Assignee: Fujitsu Limited
    Inventors: Shirou Ozaki, Masayuki Takeda
  • METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND METHOD OF CLEANING SEMICONDUCTOR SUBSTRATE
    Publication number: 20130306102
    Abstract: A method of manufacturing a semiconductor device includes: holding a semiconductor substrate with a surface inclined with respect to the vertical direction and the horizontal direction; and immersing the semiconductor substrate in a cleaning solution including an acid.
    Type: Application
    Filed: July 26, 2013
    Publication date: November 21, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, Masayuki TAKEDA, Norikazu NAKAMURA, Junichi KON
  • Insulating film material, multilayer wiring board and production method thereof, and semiconductor device and production method thereof
    Patent number: 8580907
    Abstract: An insulating film material, which contains a polycarbosilane compound expressed by the following structural formula 1: where R1 may be the same or different to each other in the unit repeated “n” times, and each represents C1-4 hydrocarbon or aromatic hydrocarbon; R2 may be the same or different to each other in the unit repeated “n” times, and each represents C1-4 hydrocarbon or aromatic hydrocarbon; n is an integer of 5 to 5,000.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: November 12, 2013
    Assignee: Fujitsu Limited
    Inventors: Yasushi Kobayashi, Yoshihiro Nakata, Shirou Ozaki
  • SEMICONDUCTOR DEVICE, POWER-SUPPLY UNIT, AMPLIFIER AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    Publication number: 20130256693
    Abstract: A semiconductor device, includes a semiconductor layer formed above a substrate; an insulating film formed on the semiconductor layer; and an electrode formed on the insulating film. The insulating film has a membrane stress at a side of the semiconductor layer lower than a membrane stress at a side of the electrode.
    Type: Application
    Filed: May 25, 2013
    Publication date: October 3, 2013
    Applicant: Fujitsu Limited
    Inventors: Norikazu NAKAMURA, Shirou OZAKI, Masayuki TAKEDA, Keiji WATANABE
  • SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SEMICONDUCTOR DEVICE
    Publication number: 20130256690
    Abstract: A semiconductor device may include a first semiconductor layer formed on a substrate, a second semiconductor layer formed on the first semiconductor layer, a source electrode and a drain electrode in contact with the first semiconductor layer or the second semiconductor layer, an opening formed in the second semiconductor layer, an insulating film formed on an inner surface of the opening formed in the second semiconductor layer and above the second semiconductor layer, a gate electrode formed in the opening via the insulating film, and a protective film formed on the insulating film and including an amorphous film containing carbon as a major component.
    Type: Application
    Filed: May 23, 2013
    Publication date: October 3, 2013
    Inventors: NORIKAZU NAKAMURA, SHIROU OZAKI, MASAYUKI TAKEDA, TOYOO MIYAJIMA, TOSHIHIRO OHKI, MASAHITO KANAMURA, KENJI IMANISHI, TOSHIHIDE KIKKAWA, KEIJI WATANABE
  • SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE
    Publication number: 20130240896
    Abstract: A method of fabricating a semiconductor device may form a nitride semiconductor layer on a substrate, form a first insulator layer on the nitride semiconductor layer by steam oxidation of ALD, form a second insulator layer on the first insulator layer by oxygen plasma oxidation of ALD, form a gate electrode on the second insulator layer, and form a source and drain electrodes on the nitride semiconductor layer. The nitride semiconductor layer may include a first semiconductor layer on the substrate, and a second semiconductor layer on the first semiconductor layer.
    Type: Application
    Filed: December 20, 2012
    Publication date: September 19, 2013
    Inventor: Shirou OZAKI
  • Semiconductor device, power-supply unit, amplifier and method of manufacturing semiconductor device
    Patent number: 8487384
    Abstract: A semiconductor device, includes a semiconductor layer formed above a substrate; an insulating film formed on the semiconductor layer; and an electrode formed on the insulating film. The insulating film has a membrane stress at a side of the semiconductor layer lower than a membrane stress at a side of the electrode.
    Type: Grant
    Filed: February 9, 2012
    Date of Patent: July 16, 2013
    Assignee: Fujitsu Limited
    Inventors: Norikazu Nakamura, Shirou Ozaki, Masayuki Takeda, Keiji Watanabe
  • Semiconductor device and method of manufacturing semiconductor device
    Patent number: 8461041
    Abstract: The method of manufacturing a semiconductor device includes forming an insulating film of a silicon compound-group insulation film; forming an opening in the insulation film, applying an active energy beam in an atmosphere containing hydrocarbon gas to form a barrier layer of a crystalline SiC, and forming an interconnection structure of copper in the opening with the barrier layer formed in.
    Type: Grant
    Filed: November 29, 2010
    Date of Patent: June 11, 2013
    Assignee: Fujitsu Limited
    Inventors: Shirou Ozaki, Yoshihiro Nakata, Yasushi Kobayashi, Yuichi Minoura
  • Process for producing silicic coating, silicic coating and semiconductor device
    Patent number: 8431464
    Abstract: A silicic coating of 2.4 g/cm3 or higher density, obtained by forming a silicic coating precursor with the use of at least one type of silane compound having a photosensitive functional group and thereafter irradiating the silicic coating precursor with at least one type of light. This silicic coating can be used as a novel barrier film or stopper film for semiconductor device.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: April 30, 2013
    Assignee: Fujitsu Limited
    Inventors: Yasushi Kobayashi, Kouta Yoshikawa, Yoshihiro Nakata, Tadahiro Imada, Shirou Ozaki
  • COMPOUND SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
    Publication number: 20130083568
    Abstract: An HEMT includes, on an SiC substrate, a compound semiconductor layer, a silicon nitride (SiN) protective film having an opening and covering the compound semiconductor layer, and a gate electrode formed on the compound semiconductor layer so as to plug the opening. In the protective film, a projecting portion projecting from a side surface of the opening is formed at a lower layer portion 6a.
    Type: Application
    Filed: July 23, 2012
    Publication date: April 4, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Kozo MAKIYAMA, Naoya Okamoto, Toshihiro Ohki, Yuichi Minoura, Shirou Ozaki, Toyoo Miyajima
  • COMPOUND SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20130082400
    Abstract: A HEMT has a compound semiconductor layer, a protection film which has an opening and covers an upper side of the compound semiconductor layer, and a gate electrode which fills the opening and has a shape riding on the compound semiconductor layer, wherein the protection film has a stacked structure of a lower insulating film not containing oxygen and an upper insulating film containing oxygen, and the opening includes a first opening formed in the lower insulating film and a second opening formed in the upper insulating film and wider than the first opening, the first opening and the second opening communicating with each other.
    Type: Application
    Filed: August 6, 2012
    Publication date: April 4, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Toshihiro Ohki, Naoya Okamoto, Yuichi Minoura, Kozo Makiyama, Shirou Ozaki
  • COMPOUND SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
    Publication number: 20130082307
    Abstract: A compound semiconductor device includes a compound semiconductor laminated structure, a passivation film formed on the compound semiconductor laminated structure and having a through-hole, and a gate electrode formed on the passivation film so as to plug the through-hole. A grain boundary between different crystalline orientations is formed in the gate electrode, and a starting point of the grain boundary is located apart from the through-hole on a flat surface of the passivation film.
    Type: Application
    Filed: July 16, 2012
    Publication date: April 4, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Naoya OKAMOTO, Kozo Makiyama, Toshihiro Ohki, Yuichi Minoura, Shirou Ozaki, Toyoo Miyajima