Patents by Inventor Shoichi Masui

Shoichi Masui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10839550
    Abstract: An apparatus includes a memory; a processor coupled to the memory, wherein the processor acquires three-dimensional information of observation points on an object from a sensor, specifies a first area and second areas adjacent to the first area from areas of the object based on the three-dimensional information, and specifies positions of feature points included in the second areas; sets links based on the feature points included in the second areas to estimate positions of skeletons included in the second areas; and uses end points of the skeletons and lengths from the end points of the skeletons to a position of a part included in the first area among parameters used to specify the position of the part, specifies the position of the part included in the first area, and estimates a position of a skeleton included in the first area based on the specified position of the part.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: November 17, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Hiroaki Fujimoto, Shoichi Masui, Kazuo Sasaki, Daisuke Abe
  • Publication number: 20200218889
    Abstract: A recognition method executed by a processor, includes: acquiring positional relation between a plurality of sensors each of which senses a distance to an object; provisionally classifying an orientation of the object relative to each individual sensor included in the sensors into one of a plurality of classifications based on sensing data acquired by the individual sensor; calculating likelihood of each combination corresponding to the positional relation between the sensors based on a result of provisional classification of the orientation of the object relative to the individual sensor; and classifying the orientation of the object corresponding to each individual sensor in accordance with the calculated likelihood of each combination.
    Type: Application
    Filed: March 20, 2020
    Publication date: July 9, 2020
    Applicant: FUJITSU LIMITED
    Inventors: SHOICHI MASUI, HIROAKI FUJIMOTO
  • Publication number: 20200210692
    Abstract: A posture recognition system includes a sensor and a recognition apparatus, wherein the sensor captures a distance image including information on a distance to a subject, at an angular field controlled based on the distance to the subject, and the recognition apparatus includes a memory, and a processor coupled to the memory and configured to acquire the distance image and the angular field used when the sensor captures the distance image, from the sensor, and correct the acquired distance image based on a ratio between a first resolution corresponding to another angular field used when a training distance image is captured, and a second resolution corresponding to the acquired angular field, the training distance image being used for generating a learning model which recognizes a posture of the subject.
    Type: Application
    Filed: March 6, 2020
    Publication date: July 2, 2020
    Inventors: Yoshihisa Asayama, Shoichi Masui
  • Patent number: 10583937
    Abstract: A passenger boarding bridge comprises a first walkway of an inner tunnel of adjacent tunnels of an extendable and retractable tunnel section; and a second walkway of an outer tunnel of the adjacent tunnels, the second walkway including a plurality of floor members which are arranged in the front-rear direction and are coupled to each other. The plurality of floor members are supported by an endless string-shaped member that is rotatable. A respective walkway surface of each walkway is at a predetermined equal height position. When the tunnel section is retracted, the string-shaped member of the second walkway is guided so that the floor members are moved down to an underside of the inner tunnel, and when the tunnel section is extended, the string-shaped member of the second walkway is guided so that the floor members are moved up from the underside of the inner tunnel.
    Type: Grant
    Filed: November 24, 2016
    Date of Patent: March 10, 2020
    Assignee: SHINMAYWA INDUSTRIES, LTD.
    Inventors: Takahiro Yoshimoto, Shoichi Kawabata, Makoto Masui
  • Publication number: 20200074679
    Abstract: A depth-image processing device includes: a memory; and a processor coupled to the memory and configured to: generate, cased on a synthetic model in which a three-dimensional model of a human body and a three-dimensional model of an object are combined, a plurality of learning images in which a depth image that indicates a distance from a reference position to respective positions on the human body or to respective positions on the object, and a part image to identify any one of respective parts of the human body and a cart of the object are associated with each other, and learn an identifier in which a feature of the depth image and any one of a part of the human body and a part of the object are associated with each other, based on the learning images.
    Type: Application
    Filed: November 6, 2019
    Publication date: March 5, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Shoichi Masui, HIROAKI FUJIMOTO, Kazuhiro YOSHIMURA, Takuya Sato, KAZUO SASAKI
  • Publication number: 20200042782
    Abstract: A learning device generates a plurality of leaning images in which a distance image representing a distance from a reference position to each position of a human body or each position of an object and a part image for identifying each part of the human body or a part of the object are associated with each other. The learning device corrects, based on a distance image and a part image of the learning image, a value of a region corresponding to a part of the object among regions of the distance image. The learning device learns, based on a plurality of learning images including a corrected distance image, an identifier in which characteristics of the distance image and a part of the human body or a part of the object are associated with each other.
    Type: Application
    Filed: October 15, 2019
    Publication date: February 6, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Shoichi Masui, HIROAKI FUJIMOTO, Kazuhiro YOSHIMURA, Takuya Sato, KAZUO SASAKI
  • Patent number: 10452966
    Abstract: A sensor device includes: a first portion that is formed of an inorganic semiconductor material, includes a control module, and is reusable; a second portion that is formed of an organic material and separably coupled to the first portion; and a sensor that is disposed in at least one of the first and second portions.
    Type: Grant
    Filed: October 11, 2017
    Date of Patent: October 22, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Kouichi Kanda, Shoichi Masui
  • Publication number: 20190241283
    Abstract: A passenger boarding bridge comprises a first walkway of an inner tunnel of adjacent tunnels of an extendable and retractable tunnel section; and a second walkway of an outer tunnel of the adjacent tunnels, the second walkway of including a plurality of floor members which are arranged in the front-rear direction and are coupled to each other. The plurality of floor members are supported by an endless string-shaped member that is rotatable. A respective walkway surface of each walkway is at a predetermined equal height position. When the tunnel section is retracted, the string-shaped member of the second walkway is guided so that the floor members are moved down to an underside of the inner tunnel, and when the tunnel section is extended, the string-shaped member of the second walkway is guided so that the floor members are moved up from the underside of the inner tunnel.
    Type: Application
    Filed: November 24, 2016
    Publication date: August 8, 2019
    Inventors: Takahiro Yoshimoto, Shoichi Kawabata, Makoto Masui
  • Publication number: 20190066327
    Abstract: An apparatus includes a memory; a processor coupled to the memory, wherein the processor acquires three-dimensional information of observation points on an object from a sensor, specifies a first area and second areas adjacent to the first area from areas of the object based on the three-dimensional information, and specifies positions of feature points included in the second areas; sets links based on the feature points included in the second areas to estimate positions of skeletons included in the second areas; and uses end points of the skeletons and lengths from the end points of the skeletons to a position of a part included in the first area among parameters used to specify the position of the part, specifies the position of the part included in the first area, and estimates a position of a skeleton included in the first area based on the specified position of the part.
    Type: Application
    Filed: October 25, 2018
    Publication date: February 28, 2019
    Applicant: FUJITSU LIMITED
    Inventors: HIROAKI FUJIMOTO, SHOICHI MASUI, KAZUO SASAKI, DAISUKE ABE
  • Publication number: 20180121779
    Abstract: A sensor device includes: a first portion that is formed of an inorganic semiconductor material, includes a control module, and is reusable; a second portion that is formed of an organic material and separably coupled to the first portion; and a sensor that is disposed in at least one of the first and second portions.
    Type: Application
    Filed: October 11, 2017
    Publication date: May 3, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Kouichi Kanda, Shoichi Masui
  • Patent number: 9853606
    Abstract: A semiconductor integrated circuit includes a first transmission power mode configured to transmit by a first power, and a second transmission power mode configured to transmit by a second power smaller than the first power, the semiconductor integrated circuit. The semiconductor integrated circuit includes a first transistor configured to receive and amplify a transmission signal in the second transmission power mode, and an attenuator including a resistor element and a switching element, provided between an output of the first transistor and an output terminal, configured to control attenuation of an output signal of the first transistor.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: December 26, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Kouichi Kanda, Shoichi Masui
  • Publication number: 20160337152
    Abstract: A transmitter includes a phase control circuit configured to receive a first and a second modulation signals, and a power amplifier configured to receive a third modulation signal. The phase control circuit includes a variable frequency divider, a frequency division ratio being controlled by the first modulation signal; a frequency modulation D/A converter configured to modulate the frequency by the second modulation signal; and a voltage controlled oscillator, including a varactor, configured to receive a first control voltage based on the first modulation signal and a second control voltage based on the second modulation signal. At least one of a capacitance value of the varactor of the voltage controlled oscillator, a control bit number of the frequency modulation D/A converter, and a bias current value of the frequency modulation D/A converter is changed based on a data transfer rate.
    Type: Application
    Filed: July 29, 2016
    Publication date: November 17, 2016
    Inventors: Shoichi MASUI, Makoto HAMAMINATO, Kouichi KANDA, Nauman KIYANI, Maja VIDOJKOVIC, Guido DOLMANS
  • Publication number: 20160211806
    Abstract: A semiconductor integrated circuit includes a first transmission power mode configured to transmit by a first power, and a second transmission power mode configured to transmit by a second power smaller than the first power, the semiconductor integrated circuit. The semiconductor integrated circuit includes a first transistor configured to receive and amplify a transmission signal in the second transmission power mode, and an attenuator including a resistor element and a switching element, provided between an output of the first transistor and an output terminal, configured to control attenuation of an output signal of the first transistor.
    Type: Application
    Filed: March 29, 2016
    Publication date: July 21, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Kouichi Kanda, Shoichi Masui
  • Patent number: 8648652
    Abstract: A band pass filter has a high pass filter into which an input signal is input; an amplifier having an inverting input terminal into which an output of the high pass filter is input, wherein the amplifier amplifies an input voltage between the inverting input terminal and a non-inverting input terminal and outputs an output signal to an output terminal; a first resistor connected between a non-inverting output terminal and the inverting input terminal of the amplifier; a first capacitor having a first terminal that is connected to the inverting input terminal; and an inverting amplifier that inverts a polarity of an output signal from the non-inverting output terminal of the amplifier and outputs the inverted signal to a second terminal of the capacitor.
    Type: Grant
    Filed: July 26, 2011
    Date of Patent: February 11, 2014
    Assignee: Fujitsu Microelectronics Solutions Limited
    Inventors: Shoichi Masui, Jingbo Shi
  • Publication number: 20120212288
    Abstract: A band pass filter has a high pass filter into which an input signal is input; an amplifier having an inverting input terminal into which an output of the high pass filter is input, wherein the amplifier amplifies an input voltage between the inverting input terminal and a non-inverting input terminal and outputs an output signal to an output terminal; a first resistor connected between a non-inverting output terminal and the inverting input terminal of the amplifier; a first capacitor having a first terminal that is connected to the inverting input terminal; and an inverting amplifier that inverts a polarity of an output signal from the non-inverting output terminal of the amplifier and outputs the inverted signal to a second terminal of the capacitor.
    Type: Application
    Filed: July 26, 2011
    Publication date: August 23, 2012
    Applicant: FUJITSU MICROELECTRONICS SOLUTIONS LIMITED
    Inventors: Shoichi MASUI, Jingbo Shi
  • Patent number: 8078661
    Abstract: A multiple-word multiplication-accumulation circuit suitable for use with a single-port memory. The circuit is composed of a multiplication-accumulation (MAC) operator and surrounding registers. The MAC operator has multiplicand and multiplier input ports with different bit widths to calculate a sum of products of multiple-word data read out of a memory. The registers serve as buffer storage of multiple-word data to be supplied to individual input ports of the MAC operator. The amount of data supplied to the MAC operator in each clock cycle is adjusted such that total amount of data consumed and produced by the MAC operator in one clock cycle will be equal to or smaller than the maximum amount of data that the memory can transfer in one clock cycle. This feature enables the use of a bandwidth-limited single-port memory, without causing adverse effect on the efficiency of MAC operator usage.
    Type: Grant
    Filed: July 26, 2004
    Date of Patent: December 13, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Kenji Mukaida, Masahiko Takenaka, Naoya Torii, Shoichi Masui
  • Patent number: 7627329
    Abstract: To provide a method of measuring a position of a node by using a radio communication system which comprises the node to send a position measuring signal, and a plurality of base stations to receive radio signals from the node, the method including: the base stations watching signals from the node through a predetermined channel; at least one of the base stations sending a reference signal after receiving of the position measuring signal; at least two of the base stations measuring the reception timing of the position measuring signal and the reception timing of the reference signal; and calculating the position of the node by using the reception timing of the position measuring signal and the reference signal measured by the base stations which have received the reference signal, and position information of the base station which has received the position measuring signal.
    Type: Grant
    Filed: October 27, 2004
    Date of Patent: December 1, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Kenichi Mizugaki, Toshiyuki Odaka, Shoichi Masui
  • Publication number: 20080211638
    Abstract: An electronic tag comprises a unit for storing transmission-use data and a unit for both comparing between the stored data and comparison data sent from an R/W and for determining whether or not the identifier of the tag per se is to be transmitted to the R/W in order to participate in an anti-collision process carried out between the electronic tag and the R/W as a necessary process prior to transmitting data to the R/W for the purpose of speeding up the recognition of electronic tags retaining data satisfying a condition by making the electronic tags retaining data satisfying the condition, from among a large number of electronic tags, participate in the anti-collision process.
    Type: Application
    Filed: May 9, 2008
    Publication date: September 4, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Shoichi MASUI, Kenji Mukaida
  • Patent number: 7403965
    Abstract: An arithmetic device for Montgomery modular multiplication which quickly calculates a parameter ND, the parameter ND satisfying R×R?1?N×ND=1 for an integer N and a radix R that is coprime to and greater than N, with a large number of effective lower bits. The device comprises an ND generator, a multiplication-accumulation (MAC) operator, and a sum data store. The ND generator produces effective lower bits of ND at a rate of k bits per clock cycle, with reference to lower k bits of a variable S, as well as to lower k bits of an odd positive integer N. The MAC operator multiplies the produced k-bit ND value by N and adds the resulting product to S. The sum data store stores the variable S, which is updated with the output of the MAC operator, with its bits shifted right by k bits, for use by the ND generator in the subsequent clock cycle.
    Type: Grant
    Filed: July 13, 2004
    Date of Patent: July 22, 2008
    Assignee: Fujitsu Limited
    Inventors: Kenji Mukaida, Masahiko Takenaka, Naoya Torii, Shoichi Masui
  • Patent number: 7266009
    Abstract: For a predetermined period from the start of a read operation, an electric current is fed to bit lines connected with memory cells so that ferroelectric capacitors of the memory cells are charged. The voltage change of the bit lines are different according to the logic values of data stored in the ferroelectric capacitors. Therefore, the logic value stored in the memory cells can be detected as a time difference. Even if the voltage change of the bit lines is small, the time difference can be reliably generated. Even in case the residual dielectric polarization value of the ferroelectric capacitor is low, therefore, the data can be reliably read from the memory cells. In short, the read margin of data can be better improved than in the case where the logic value of data is detected with a voltage difference.
    Type: Grant
    Filed: July 25, 2005
    Date of Patent: September 4, 2007
    Assignee: Fujitsu Limited
    Inventors: Trevis Chandler, Ali Sheikholeslami, Shoichi Masui