Patents by Inventor Shoji Kawahito
Shoji Kawahito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10636822Abstract: In a photoelectric-conversion element having a large light receiving region for a high-speed transfer, and a solid-state image sensor including the photoelectric-conversion element, the photoelectric-conversion element includes first to eighth charge read-out regions, which are provided at positions symmetric with respect to a center position of a light receiving region and first to eighth field-control electrodes, which are arranged on both sides of charge-transport paths extending from the center position of the light receiving region to the first to eighth charge read-out regions, respectively, and change depletion potentials of the charge-transport paths and the octuple charge-transfer channels.Type: GrantFiled: August 24, 2017Date of Patent: April 28, 2020Assignee: National University Corporation Shizuoka UniversityInventors: Shoji Kawahito, Min-Woong Seo, Keita Yasutomi, Yuya Shirakawa
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Patent number: 10453880Abstract: A semiconductor element includes a semiconductor region (11) of a first conductivity type, a buried charge-generation region (16) of a second conductivity type, buried in an upper portion of the semiconductor region (11) to implement a photodiode (D1) together with the semiconductor region (11) to generate charges, a charge-readout region (15) of the second conductivity type, provided in the semiconductor region (11) to accumulate the charges transferred from the buried charge-generation region (16), and a reset-performing region (12) of the second conductivity type, provided in the semiconductor region (11), a variable voltage is applied to the reset-performing region (12) to change the height of a potential barrier generated in the semiconductor region (11) sandwiched between the charge-readout region (15) and the reset-performing region (12) to exhaust the charges accumulated in the charge-readout region (15).Type: GrantFiled: September 16, 2016Date of Patent: October 22, 2019Assignee: National University Corporation Shizuoka UniversityInventors: Shoji Kawahito, Min-Woong Seo
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Publication number: 20190268557Abstract: An A/D converter 1 includes a front stage A/D conversion unit (3) including a first A/D conversion unit (6) that receives an analog signal from a CMOS image sensor (100) and generates a first digital value (D1) and a first residual analog signal (VOPF) through a folding integration A/D conversion operation, and a second A/D conversion unit (7) that receives a first residual analog signal (VOPF) from the first A/D conversion unit (6) and generates a second digital value (D2) and a second residual analog signal (VOPC) through a cyclic A/D conversion operation, and a rear stage A/D conversion unit (4) that receives the second residual analog signal (VOPC) from the front stage A/D conversion unit (3) and generates a third digital value (D3) through an acyclic A/D conversion operation.Type: ApplicationFiled: November 9, 2017Publication date: August 29, 2019Inventor: Shoji KAWAHITO
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Publication number: 20190206922Abstract: The present invention provides a photoelectric conversion element and a solid-state image sensor, having a simple structure, a wide dynamic range, a high speed and a high sensibility, which includes a principal layer of a first conductivity type, a surface-buried region of a second conductivity type, selectively buried in an upper portion of the principal layer so as to implements a photodiode with the principal layer, a first charge-accumulation region of the second conductivity type, buried in the upper portion of the principal layer configured to accumulate first signal charges transferred from the surface-buried region, generated by the photodiode, and a second charge-accumulation region of the second conductivity type, buried in the principal layer configured to accumulate second signal charges transferred from the surface-buried region, generated by the photodiode, wherein a process including a first period, in which the first signal charges are transferred from the surface-buried region to the first chType: ApplicationFiled: September 15, 2017Publication date: July 4, 2019Applicant: National University Corporation Shizuoka UniversityInventor: Shoji KAWAHITO
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Publication number: 20190206915Abstract: In a photoelectric-conversion element having a large light receiving region for a high-speed transfer, and a solid-state image sensor including the photoelectric-conversion element, the photoelectric-conversion element includes first to eighth charge read-out regions, which are provided at positions symmetric with respect to a center position of a light receiving region and first to eighth field-control electrodes, which are arranged on both sides of charge-transport paths extending from the center position of the light receiving region to the first to eighth charge read-out regions, respectively, and change depletion potentials of the charge-transport paths and the octuple charge-transfer channels.Type: ApplicationFiled: August 24, 2017Publication date: July 4, 2019Applicant: National University Corporation Shizuoka UniversityInventors: Shoji KAWAHITO, Min-Woong SEO, Keita YASUTOMI, Yuya SHIRAKAWA
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Patent number: 10325953Abstract: A range sensor includes: an n-type surface-buried region selectively buried in an upper portion of a pixel layer to implement a photodiode and extending from a light-receiving area toward plural portions shielded by a shielding plate along the upper portion of the pixel layer so as to provide a plurality of branches; n-type charge-accumulation regions having a higher impurity concentration than the surface-buried region; a plurality of transfer gate electrodes provided adjacent to the charge-accumulation regions; and an n-type guide region having a higher impurity concentration than the surface-buried region and a lower impurity concentration than the charge-accumulation regions, and provided with one end below an aperture of the shielding plate and other ends extending to a part of the respective transfer gate electrodes.Type: GrantFiled: March 31, 2016Date of Patent: June 18, 2019Assignee: National University Corporation Shizuoka UniversityInventor: Shoji Kawahito
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Patent number: 10230914Abstract: A charge-modulation element includes a first charge-accumulation region, a second charge-accumulation region, a third charge-accumulation region, and a fourth charge-accumulation region, provided symmetric with respect to a center position of a light-receiving area, and a first field-control electrode pair, a second field-control electrode pair, a third field-control electrode pair, and a fourth field-control electrode pair, arranged on both sides of respective charge transport paths, for changing depletion potentials of the charge transport paths, which extend from the center position of the light-receiving area to the first charge-accumulation region, the second charge-accumulation region, the third charge-accumulation region, and the fourth charge-accumulation region.Type: GrantFiled: February 6, 2015Date of Patent: March 12, 2019Assignee: National University Corporation Shizuoka UniversityInventors: Shoji Kawahito, Keita Yasutomi, Sangman Han
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Patent number: 10132927Abstract: A distance measurement device according to one aspect of the present invention includes a photoelectric conversion device which includes a light receiving unit, a charge storage unit, a charge discharge unit, and a gate electrode, a controller which controls an irradiation timing of pulse light having a pulse width which is sufficiently shorter than response time of the light receiving unit to an object and performs control to generate control pulse voltages having at least two kinds of phases based on the irradiation timing and to apply it to the gate electrode, a charge reading unit which reads a first and second charges stored in the charge storage unit according to the applications of the respective control pulse voltages having two kinds of phases as a first and second electrical signals, and a calculation unit which calculates a distance to the object based on the first and second electrical signals.Type: GrantFiled: April 4, 2014Date of Patent: November 20, 2018Assignee: NATIONAL UNIVERSITY CORPORATION SHIZUOKA UNIVERSITYInventors: Shoji Kawahito, Keita Yasutomi
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Publication number: 20180269242Abstract: A semiconductor element includes a semiconductor region (11) of a first conductivity type, a buried charge-generation region (16) of a second conductivity type, buried in an upper portion of the semiconductor region (11) to implement a photodiode (D1) together with the semiconductor region (11) to generate charges, a charge-readout region (15) of the second conductivity type, provided in the semiconductor region (11) to accumulate the charges transferred from the buried charge-generation region (16), and a reset-performing region (12) of the second conductivity type, provided in the semiconductor region (11), a variable voltage is applied to the reset-performing region (12) to change the height of a potential barrier generated in the semiconductor region (11) sandwiched between the charge-readout region (15) and the reset-performing region (12) to exhaust the charges accumulated in the charge-readout region (15).Type: ApplicationFiled: September 16, 2016Publication date: September 20, 2018Applicant: National University Corporation Shizuoka UniversityInventors: Shoji KAWAHITO, Min-Woong SEO
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Publication number: 20180114809Abstract: A range sensor includes: an n-type surface-buried region selectively buried in an upper portion of a pixel layer to implement a photodiode and extending from a light-receiving area toward plural portions shielded by a shielding plate along the upper portion of the pixel layer so as to provide a plurality of branches; n-type charge-accumulation regions having a higher impurity concentration than the surface-buried region; a plurality of transfer gate electrodes provided adjacent to the charge-accumulation regions; and an n-type guide region having a higher impurity concentration than the surface-buried region and a lower impurity concentration than the charge-accumulation regions, and provided with one end below an aperture of the shielding plate and other ends extending to a part of the respective transfer gate electrodes.Type: ApplicationFiled: March 31, 2016Publication date: April 26, 2018Applicant: National University Corporation Shizuoka UniversityInventor: Shoji KAWAHITO
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Patent number: 9832409Abstract: A high-accurate imaging increased in time resolution can be made. The camera device is provided with a plurality of pixels that include a light-receiving surface embedded region to convert incident light into charges, a charge accumulation region to accumulate the charges, and a gate electrode to control the charges to be transferred from the light-receiving surface embedded region to the charge accumulation region, and are one-dimensionally arranged in each of a plurality of columns, a timing generation circuit which generates a control pulse voltage to be applied to the gate electrode, and a correction circuit unit which is provided in accordance with each of a plurality of columns of the pixels, delays the control pulse voltage in a variable time, and applies the control pulse voltage to the gate electrodes of the plurality of pixels belonging to a column corresponding to the control pulse voltage.Type: GrantFiled: February 6, 2015Date of Patent: November 28, 2017Assignee: NATIONAL UNIVERSITY CORPORATION SHIZUOKA UNIVERSITYInventors: Shoji Kawahito, Keita Yasutomi
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Publication number: 20170208278Abstract: An image sensor controls the gain of a pixel signal on a pixel-by-pixel basis and extends a dynamic range while maintaining a S/N ratio at a favorable level. A column unit in an image sensor is independently detects a level of each pixel signal and independently sets a gain for level of the signal. A photoelectric converting region unit has pixels arranged two-dimensionally with a vertical signal line for each pixel column to output each pixel signal. The column unit is on an output side of the vertical signal line. The column unit for each pixel column has a pixel signal level detecting circuit, a programmable gain control, a sample and hold (S/H) circuit. Gain correction is performed according to a result of a detected level of the pixel signal.Type: ApplicationFiled: April 3, 2017Publication date: July 20, 2017Inventors: Nobuo Nakamura, Shoji Kawahito, Hiroki Sato, Mizuho Higashi
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Publication number: 20170171485Abstract: A charge-modulation element includes a first charge-accumulation region, a second charge-accumulation region, a third charge-accumulation region, and a fourth charge-accumulation region, provided symmetric with respect to a center position of a light-receiving area, and a first field-control electrode pair, a second field-control electrode pair, a third field-control electrode pair, and a fourth field-control electrode pair, arranged on both sides of respective charge transport paths, for changing depletion potentials of the charge transport paths, which extend from the center position of the light-receiving area to the first charge-accumulation region, the second charge-accumulation region, the third charge-accumulation region, and the fourth charge-accumulation region.Type: ApplicationFiled: February 6, 2015Publication date: June 15, 2017Applicant: National University Corporation Shizuoka Universit yInventors: Shoji KAWAHITO, Keita YASUTOMI, Sangman HAN
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Patent number: 9681072Abstract: A solid-state image pickup device 1A includes an image pickup section 2 having a pixel array P in which a pixel C is two-dimensionally arranged, a lens section 3 having a plurality of lenses 3a arranged on the pixel array P, and an image generating section 4A for generating an image by using an electrical signal SE. The image pickup section 2 has a plurality of the pixel arrays P including one image pickup region T. The image generating section 4A generates the image by averaging the electrical signals SE for each pixel C corresponding to one another among the image pickup regions T, in order to reduce noise present in the electrical signal SE.Type: GrantFiled: August 7, 2013Date of Patent: June 13, 2017Assignee: NATIONAL UNIVERSITY CORPORATION SHIZUOKA UNIVERISTYInventors: Keiichiro Kagawa, Shoji Kawahito
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Patent number: 9648258Abstract: An image sensor controls the gain of a pixel signal on a pixel-by-pixel basis and extends a dynamic range while maintaining a S/N ratio at a favorable level. A column unit in an image sensor is independently detects a level of each pixel signal and independently sets a gain for level of the signal. A photoelectric converting region unit has pixels arranged two-dimensionally with a vertical signal line for each pixel column to output each pixel signal. The column unit is on an output side of the vertical signal line. The column unit for each pixel column has a pixel signal level detecting circuit, a programmable gain control, a sample and hold (S/H) circuit. Gain correction is performed according to a result of a detected level of the pixel signal.Type: GrantFiled: April 11, 2014Date of Patent: May 9, 2017Assignee: Sony CorporationInventors: Nobuo Nakamura, Shoji Kawahito, Hiroki Sato, Mizuho Higashi
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Publication number: 20160353045Abstract: A high-accurate imaging increased in time resolution can be made. The camera device is provided with a plurality of pixels that include a light-receiving surface embedded region to convert incident light into charges, a charge accumulation region to accumulate the charges, and a gate electrode to control the charges to be transferred from the light-receiving surface embedded region to the charge accumulation region, and are one-dimensionally arranged in each of a plurality of columns, a timing generation circuit which generates a control pulse voltage to be applied to the gate electrode, and a correction circuit unit which is provided in accordance with each of a plurality of columns of the pixels, delays the control pulse voltage in a variable time, and applies the control pulse voltage to the gate electrodes of the plurality of pixels belonging to a column corresponding to the control pulse voltage.Type: ApplicationFiled: February 6, 2015Publication date: December 1, 2016Inventors: Shoji KAWAHITO, Keita YASUTOMI
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Publication number: 20160124091Abstract: A distance measurement device according to one aspect of the present invention includes a photoelectric conversion device which includes a light receiving unit, a charge storage unit, a charge discharge unit, and a gate electrode, a controller which controls an irradiation timing of pulse light having a pulse width which is sufficiently shorter than response time of the light receiving unit to an object and performs control to generate control pulse voltages having at least two kinds of phases based on the irradiation timing and to apply it to the gate electrode, a charge reading unit which reads a first and second charges stored in the charge storage unit according to the applications of the respective control pulse voltages having two kinds of phases as a first and second electrical signals, and a calculation unit which calculates a distance to the object based on the first and second electrical signals.Type: ApplicationFiled: April 4, 2014Publication date: May 5, 2016Inventors: Shoji KAWAHITO, Keita YASUTOMI
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Patent number: 9307171Abstract: A pixel 10 includes a photodiode PD which is provided between a first barrier region 21 forming a first potential barrier B1 and a second barrier region 27 forming a second potential barrier B2, a first floating diffusion region F1 which is provided adjacent to the first barrier region 21, and to which a first electric charge generated in the photodiode PD is transferred, and a second floating diffusion region F2 which is provided adjacent to the second barrier region 27, and into which a second electric charge generated in the photoelectric conversion region PD flows, and in which a part of the flowing-in second electric charge is accumulated. The second potential barrier B2 is lower than the first potential barrier B1.Type: GrantFiled: July 25, 2012Date of Patent: April 5, 2016Assignee: NATIONAL UNIVERSITY CORPORATION SHIZUOKA UNIVERSITYInventors: Shoji Kawahito, Isamu Takai
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Patent number: 9270258Abstract: A ramp signal generation circuit 21 comprises a plurality of unit circuits 221 to 22N, each including a capacitor 26 having one end 26a held at a fixed potential and a current source 27 connected to the other end 26b of the capacitor 26, while the other ends 26b of the capacitors 26 in the plurality of unit circuits 221 to 22N are connected to each other with a wiring member W.Type: GrantFiled: November 14, 2012Date of Patent: February 23, 2016Assignee: NATIONAL UNIVERSITY CORPORATION SHIZUOKA UNIVERSITYInventors: Shoji Kawahito, Kaita Imai
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Patent number: 9236879Abstract: According to this A/D converter, a first A/D conversion operation for performing integral A/D conversion and a second A/D conversion operation for performing cyclic A/D conversion are realized based on control of operational procedures in a same circuit configuration. Moreover, in the first A/D conversion operation, since a capacity of a capacitor used in the integration of an output signal is greater than a capacity of a capacitor used for storing an input analog signal and a standard reference voltage, the analog signal that is input in the integral A/D conversion is attenuated according to the capacity ratio and subject to sampling and integration. Consequently, the voltage range of the analog signal that is output in the integral A/D conversion also decreases according to the capacity ratio of the capacitors, and the A/D converter can be therefore constructed with a single-ended configuration.Type: GrantFiled: February 17, 2012Date of Patent: January 12, 2016Assignee: NATIONAL UNIVERSITY CORPORATION SHIZUOKA UNIVERSITYInventor: Shoji Kawahito