Patents by Inventor Shou To

Shou To has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11923205
    Abstract: A method for manufacturing a semiconductor device includes: providing a wafer-bonding stack structure having a sidewall layer and an exposed first component layer; forming a photoresist layer on the first component layer; performing an edge trimming process to at least remove the sidewall layer; and removing the photoresist layer. In this way, contaminant particles generated from the blade during the edge trimming process may fall on the photoresist layer but not fall on the first component layer, so as to protect the first component layer from being contaminated.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: March 5, 2024
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Kun-Ju Li, Ang Chan, Hsin-Jung Liu, Wei-Xin Gao, Jhih-Yuan Chen, Chun-Han Chen, Zong-Sian Wu, Chau-Chung Hou, I-Ming Lai, Fu-Shou Tsai
  • Publication number: 20240066664
    Abstract: The present disclosure relates to a pad surface cleaning system to be used with a conditioning module to condition a polishing surface of a polishing pad. The pad surface cleaning system may be used to spray the polishing surface with a high-pressure fluid spray to loosen debris from the polishing surface. The pad surface cleaning system may also be used to remove the loosened debris. Further, the pad surface cleaning system may isolate a conditioning disk from a polishing fluid to protect the conditioning disk from reacting with the polishing fluid.
    Type: Application
    Filed: August 1, 2023
    Publication date: February 29, 2024
    Inventors: Shou-Sung CHANG, Hui CHEN, Haosheng WU, Jianshe TANG, Sidney P. HUEY, Jeonghoon OH, Chad POLLARD, Chih Chung CHOU, Sameer A. DESHPANDE
  • Publication number: 20240066660
    Abstract: A chemical mechanical polishing system includes a platen to support a polishing pad having a polishing surface, a source of coolant, a dispenser having one or more apertures suspended over the platen to direct coolant from the source of coolant onto the polishing surface of the polishing pad; and a controller coupled to the source of coolant and configured to cause the source of coolant to deliver the coolant through the nozzles onto the polishing surface during a selected step of a polishing operation.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Inventors: Haosheng Wu, Hari Soundararajan, Jianshe Tang, Shou-Sung Chang, Brian J. Brown, Yen-Chu Yang, You Wang, Rajeev Bajaj
  • Publication number: 20240067246
    Abstract: A collapsible utility wagon includes a push-back function device assembly, and a collapsible utility wagon body assembly, wherein the push-back function device assembly is provided behind the collapsible utility wagon body assembly. The push-back function device assembly includes a rear wheel frame assembly, a front handlebar strut assembly, two rear handlebar strut assemblies, a lock device assembly, a handlebar assembly, a lock hook, a lock column, a mesh bag and rear wheels. The push-back function device assembly is provided behind the collapsible utility wagon body assembly, so that a sheet-like collapsible wagon is enabled to implement a push-back function instead of being able to be pulled only forward as that of the prior art. The collapsible utility wagon has a good link ability, and can be unfolded or collapsed with a simple process and a minimal effort with ease of use.
    Type: Application
    Filed: June 19, 2023
    Publication date: February 29, 2024
    Inventor: Shou Qiang ZHU
  • Patent number: 11917772
    Abstract: A power supply with a separable communication module includes a casing with a port; a main board placed in the casing and having a power conversion circuit; a sub-board electrically connected to the power conversion circuit and provided with at least one first connector; and a communication module. The power conversion circuit has at least one electrical connection terminal. A first interface of the first connector faces the port. The communication module includes a first circuit board and a communication circuit disposed on the first circuit board, the first circuit board has an electrical connection part electrically connected to the communication circuit, the electrical connection part has a first state of connecting with the first interface, and a second state of detaching from the first interface.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: February 27, 2024
    Assignee: COTEK ELECTRONIC IND. CO., LTD.
    Inventors: Chun-Wei Wu, Ta-Chang Wei, Chung-Liang Tsai, Shou-Cheng Yeh
  • Patent number: 11916041
    Abstract: A method for repairing a light-emitting device, which comprises a plurality of light-emitting units disposed on a circuit substrate with at least one of the plurality of light-emitting units being damaged. The method for repairing a light-emitting device including the following steps is provided: removing the at least one damaged light-emitting unit from the circuit substrate to form an unoccupied position on the circuit substrate; providing a good light-emitting unit on a bottom of which a volatile adhesive material has been applied; using a pick and place module to place the good light-emitting unit at the unoccupied position on the circuit substrate; and melting and solidifying the volatile adhesive material so that the good light-emitting unit is affixed at the unoccupied position.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: February 27, 2024
    Assignee: ASTI GLOBAL INC., TAIWAN
    Inventor: Chien-Shou Liao
  • Patent number: 11914917
    Abstract: A tiled display apparatus includes a main display driving board and display modules. Each display module includes a system board. The main display driving board is coupled to a first stage system board. The main display driving board is configured to receive a display signal, acquire a main screen region display signal, and transmit the main screen region display signal to the first stage system board. The system board is configured to receive the main screen region display signal, and extract a group of main screen region display data corresponding thereto from the main screen region display signal to control a display module to which the system board belongs to display an image according to the main screen region display data. Except for a last stage system board, remaining system boards are each further configured to transmit the received main screen region display signal to a next stage system board.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: February 27, 2024
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Shou Li, Enliang Zhang, Jiakun Qi, Zhankun Meng, Hengyu Yan, Junning Su, Hanzhang Niu
  • Patent number: 11914667
    Abstract: Some embodiments provide a program. The program receives a visualization collection definition specifying a plurality of visualization definitions for a plurality of visualization definitions. Each visualization definition in the plurality of visualization definitions specifies a multi-dimensional array of data definition. The program further identifies a set of multi-dimensional array of data definitions specified in the plurality of visualization definitions of the visualization collection definition. The program also sends a request for the set of multi-dimensional array of data definitions to a computing system. The program further receives the set of multi-dimensional array of data definitions from the computing system. The program also stores the set of multi-dimensional array of data definitions in a cache storage of the mobile device for later use.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: February 27, 2024
    Assignee: BUSINESS OBJECTS SOFTWARE LTD
    Inventors: Shou-Chieh Chao, Sanam Narula, Nathan Wang, Walter Mak, Tsz Hong Sung
  • Patent number: 11917804
    Abstract: A manufacturing method of a SRAM memory device includes forming two transistors on a substrate, forming an inner dielectric layer covering the two transistors, forming contacts in the inner dielectric layer for coupling to source nodes of the two transistors, forming a metal interconnect structure on the inner dielectric layer, wherein a portion of an n-th metal layer of the metal interconnect structure is utilized as a lower metal layer, wherein n?1. An opening is formed in the metal interconnect structure to expose the lower metal layer, and then a capacitor is formed in the opening. The capacitor includes the lower metal layer, a first electrode layer, a dielectric layer, a second electrode layer, and an upper metal layer from bottom to top. The upper metal layer is a portion of an m-th metal layer of the metal interconnect structure, wherein m?n+1.
    Type: Grant
    Filed: September 15, 2022
    Date of Patent: February 27, 2024
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shou-Zen Chang, Yi-Hsung Wei, Pei-Hsiu Tseng, Jia-You Lin
  • Patent number: 11912134
    Abstract: A hybrid vehicle includes: an oil passage including a common oil passage through which lubricating oil discharged from an oil pump flows, an engine lubricating oil passage extending from the common oil passage toward an engine internal space, and a transmission lubricating oil passage extending from the common oil passage toward a transmission internal space; and a variable throttle valve that can change a flow rate in the transmission lubricating oil passage. The variable throttle valve increases an opening degree of the variable throttle valve in a mode transition in which a first traveling mode in which the hybrid vehicle travels by driving power of an engine transitions to a second traveling mode in which the hybrid vehicle stops the engine and travels by the driving power of the electric motor.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: February 27, 2024
    Assignee: KAWASAKI MOTORS, LTD.
    Inventors: Shou Andou, Koshi Fusazaki, Motoki Miyakoshi
  • Publication number: 20240063296
    Abstract: The present application provides a logic gate device. The logic gate device includes a gate electrode, a gate insulating layer, a bottom electrode, a two-dimensional semiconductor layer, a first top electrode and a second electrode. The gate insulating layer is located on the gate electrode. The bottom electrode is located on the gate insulating layer. The two-dimensional semiconductor layer is located on the bottom electrode and simultaneously covers the gate insulating layer. The first top electrode and the second electrode are located on the two-dimensional semiconductor layer. The bottom electrode, the two-dimensional semiconductor layer and the gate insulating layer form an air gap, and the air gap is distributed at both sides of the bottom electrode. The gate electrode is configured to connect a gate voltage, and the first top electrode and the second top electrode are configured to connect a signal input terminal.
    Type: Application
    Filed: July 12, 2023
    Publication date: February 22, 2024
    Inventors: GUANG-QI ZHANG, YANG WEI, SHOU-SHAN FAN
  • Publication number: 20240059605
    Abstract: A low dielectric sealing glass powder for a miniature radio-frequency glass insulator is made of the following raw materials expressed in molar percentages: SiO2: 70.5-74.0%, B2O3: 20.5-23.5%, Ga2O3: 0.5-2.0%, P2O5: 0.25-2.0%, Li2O: 0.4-6.0%, K2O: 0.1-1.5%, LaB6: 0.05-1.0%, and NaCl: 0.03-0.3%. The raw material components are simple, and the preparation method is easy to implement. The dielectric constant and dielectric loss of the prepared glass powder are low, and the melting and molding temperature is low, which are convenient for large-scale industrial production. The melting and molding temperature of the low dielectric sealing glass powder ranges from 1320° C. to 1360° C., and the obtained glass has a dielectric constant ranging from 3.8 to 4.1 and a dielectric loss ranging from 4×10?4 to 10×10?4 at a frequency of 1 MHz, and a sealing temperature ranging from 900° C. to 950° C.
    Type: Application
    Filed: April 24, 2022
    Publication date: February 22, 2024
    Applicant: CNBM RESEARCH INSTITUTE FOR ADVANCED GLASS MATERIALS GROUP CO., LTD
    Inventors: Shou PENG, Chong ZHANG, Weiwei WANG, Changqing LI, Jinwei LI, Xiaofei YANG, Gang ZHOU, Zhenkun KE, Xin CAO, Chuanli SHAN, Jia NI, Jiedong CUI, Fengyang ZHAO, Zhaojin ZHONG, Pingping WANG, Qiang GAO, Na HAN, Lifen SHI, Yong YANG
  • Publication number: 20240061703
    Abstract: A transaction merging method for a first electronic device and a second electronic device. The transaction merging method comprises: (a) receiving a plurality of input transactions from the first electronic device; (b) setting a merge condition of the input transactions according to a transmission condition between the first electronic device and the second electronic device; (c) merging the input transactions according to the merge condition to generate at least one transaction group; and (d) transmitting the transaction group to the second electronic device.
    Type: Application
    Filed: August 9, 2023
    Publication date: February 22, 2024
    Applicant: MEDIATEK INC.
    Inventors: En-Shou Tang, Yuan-Chun Lin, Ming-Lun Hsieh, Chia-Yuan Chang
  • Publication number: 20240063914
    Abstract: A network switch system includes a switch box and an optical communication device. The optical communication device is at least partially disposed in the switch box. The optical communication device includes a housing, a first light emitter and a ROSA. The first light emitter is disposed in the housing without any ROSA therein. The ROSA is disposed in the switch box and located outside the housing, and the first light emitter is optically coupled to the ROSA.
    Type: Application
    Filed: November 1, 2023
    Publication date: February 22, 2024
    Inventors: Hsiang-Jen LU, Ming-You LAI, Che-Shou YEH
  • Publication number: 20240063299
    Abstract: The present application provides an inverter. The inverter includes a gate electrode, a gate insulating layer, a bottom electrode, a two-dimensional semiconductor layer, a first top electrode and a second electrode. The gate insulating layer is located on the gate electrode. The bottom electrode is located on the gate insulating layer. The two-dimensional semiconductor layer is located on the bottom electrode and simultaneously covers the gate insulating layer. The first top electrode and the second electrode are located on the two-dimensional semiconductor layer. The bottom electrode, the two-dimensional semiconductor layer and the gate insulating layer form air gaps, and the air gaps are distributed at both sides of the bottom electrode. The gate electrode is configured to connect with a signal input terminal, the bottom electrode is configured to connect with a signal output terminal.
    Type: Application
    Filed: July 12, 2023
    Publication date: February 22, 2024
    Inventors: GUANG-QI ZHANG, YANG WEI, SHOU-SHAN FAN
  • Patent number: 11904586
    Abstract: A hydrophobic film is provided. The hydrophobic film includes a flexible substrate; a hydrophobic layer located on the flexible substrate, a heating layer, a first electrode and a second electrode spaced apart from the first electrode. The hydrophobic layer comprises a base and a patterned bulge layer on a surface of the base away from the flexible substrate. The heating layer is on a surface of the flexible substrate away from the hydrophobic layer. The first electrode and the second electrode are electrically connected to and in direct contact with the heating layer.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: February 20, 2024
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yuan-Hao Jin, Qun-Qing Li, Shou-Shan Fan
  • Patent number: 11907632
    Abstract: A system includes one or more data processors and a non-transitory computer-readable storage medium containing instructions which, when executed on the one or more data processors, cause the one or more data processors to perform operations. The operations include receiving a design schematic, extracting keywords from the design schematic, and sorting the design schematic by the extracted keywords. The operations further include extracting a part number of a component from the sorted design schematic, comparing the component associated with the part number with a reference component associated with the part number, and displaying a result of the comparison indicating whether the component and the reference component match.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: February 20, 2024
    Assignee: QUANTA COMPUTER INC.
    Inventors: Kuo-Chan Hsu, Yun-Teng Shih, Shou-Fu Li
  • Publication number: 20240053898
    Abstract: The present disclosure discloses a high-bandwidth double data rate (DDR) dual-in-line memory module (DIMM), a memory system, and an operation method of the memory system.
    Type: Application
    Filed: December 14, 2022
    Publication date: February 15, 2024
    Applicant: INNOSILICON MICROELECTRONICS (ZHUHAI) CO., LTD.
    Inventors: LIANG ZHANG, JIAYUN ZHANG, JIECHEN SHOU, CHUANHAO XU, MING HUANG
  • Publication number: 20240055351
    Abstract: An interconnect structure including a dielectric structure, plugs, and conductive lines is provided. The dielectric structure is disposed on a substrate. The plugs are disposed in the dielectric structure. The conductive lines are disposed in the dielectric structure and are electrically connected to the plugs. The sidewall of at least one of the conductive lines is in direct contact with the dielectric structure.
    Type: Application
    Filed: September 13, 2022
    Publication date: February 15, 2024
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shou-Zen Chang, Mei Ling Ho, Tien-Lu Lin, Ming-Han Liao, Chia-Ming Wu, Jui-Neng Tu
  • Publication number: 20240053260
    Abstract: The present invention relates to a Fourier transform spectrometer applicable in an array of coherent light sources, comprising: a light source, a light transmission device, a control circuit, a detector, an amplifying circuit, and a computer. The control circuit is electrically connected to the light transmission device for control the on-off of light in the light transmission device. The amplifying circuit is connected with the detector for recording and amplifying the photoelectric signal obtained by the detector. The computer is connected with the amplifying circuit. The computer is equipped with a spectral analysis software is used to perform Fourier transform. The Fourier transform spectrometer based on the coherent light source array further includes a coherent light source array. The light transmission device is used to transmit the light emitted by the light source to the coherent light source array.
    Type: Application
    Filed: August 9, 2023
    Publication date: February 15, 2024
    Inventors: LI-WEN LAI, PENG LIU, DUAN-LIANG ZHOU, QUN-QING LI, SHOU-SHAN FAN