Patents by Inventor Shuang Meng

Shuang Meng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11935756
    Abstract: A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: March 19, 2024
    Inventors: Baosuo Zhou, Mirzafer K. Abatchev, Ardavan Niroomand, Paul A. Morgan, Shuang Meng, Joseph Neil Greeley, Brian J. Coppa
  • Publication number: 20230128330
    Abstract: Described are vapor deposition methods for depositing molybdenum materials onto a substrate by the use of bis(alkyl-arene) molybdenum, also referred to herein as (alkyl-arene)2Mo, for example bis(ethyl-benzene) molybdenum ((EtBz)2Mo), as a precursor for such deposition, as well as structures that contain the deposited material.
    Type: Application
    Filed: December 14, 2022
    Publication date: April 27, 2023
    Inventors: Robert WRIGHT, JR., Shuang MENG, Bryan C. HENDRIX, Thomas H. BAUM, Philip S.H. CHEN
  • Patent number: 11560625
    Abstract: Described are vapor deposition methods for depositing molybdenum materials onto a substrate by the use of bis(alkyl-arene) molybdenum, also referred to herein as (alkyl-arene)2Mo, for example bis(ethyl-benzene) molybdenum ((EtBz)2Mo), as a precursor for such deposition, as well as structures that contain the deposited material.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: January 24, 2023
    Assignee: ENTEGRIS, INC.
    Inventors: Robert Wright, Jr., Shuang Meng, Bryan C. Hendrix, Thomas H. Baum, Philip S. H. Chen
  • Publication number: 20220254644
    Abstract: A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.
    Type: Application
    Filed: April 27, 2022
    Publication date: August 11, 2022
    Applicant: Micron Technology, Inc.
    Inventors: Baosuo Zhou, Mirzafer K. Abatchev, Ardavan Niroomand, Paul A. Morgan, Shuang Meng, Joseph Neil Greeley, Brian J. Coppa
  • Publication number: 20220223405
    Abstract: Processes and apparatuses for the treatment of semiconductor workpieces are provided. In some embodiments, a method can include placing the workpiece into a process chamber; vaporizing a solvent to create a vaporized solvent; introducing the vaporized solvent into the process chamber; and exposing the workpiece to the vaporized solvent.
    Type: Application
    Filed: March 28, 2022
    Publication date: July 14, 2022
    Inventors: Shuang Meng, Shawming Ma, Michael X. Yang
  • Patent number: 11335563
    Abstract: A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: May 17, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Baosuo Zhou, Mirzafer K. Abatchev, Ardavan Niroomand, Paul A. Morgan, Shuang Meng, Joseph Neil Greeley, Brian J. Coppa
  • Patent number: 11289323
    Abstract: Processes and apparatuses for the treatment of semiconductor workpieces are provided. In some embodiments, a method can include placing the workpiece into a process chamber; vaporizing a solvent to create a vaporized solvent; introducing the vaporized solvent into the process chamber; and exposing the workpiece to the vaporized solvent.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: March 29, 2022
    Assignees: Beijing E-Town Semiconductor Co, , Ltd., Mattson Technology, Inc.
    Inventors: Shuang Meng, Shawming Ma, Michael X. Yang
  • Publication number: 20210343506
    Abstract: Apparatus and methods for processing a workpiece using a plasma are provided. In one example implementation, an apparatus can include a processing chamber. The apparatus can include a plasma chamber comprising a dielectric tube defining a sidewall. The apparatus can include an inductively coupled plasma source. The inductively coupled plasma source can include an RF generator configured to energize an induction coil disposed about the dielectric tube. The apparatus can include a separation grid separating the processing chamber from the plasma chamber. The apparatus can include a controller configured to operate the inductively coupled plasma source in a pulsed mode. During the pulsed mode the RF generator is configured to apply a plurality of pulses of RF power to the induction coil. A frequency of pulses can be in a range of about 1 kHz to about 100 kHz.
    Type: Application
    Filed: April 30, 2021
    Publication date: November 4, 2021
    Inventors: Ting Xie, Haochen Li, Shuang Meng, Qiqun Zhang, Dave Kohl, Shawming Ma, Haichun Yang, Hua Chung, Ryan M. Pakulski, Michael X. Yang
  • Publication number: 20210307151
    Abstract: Plasma processing apparatus and associated methods for detecting air leak are provided. In one example implementation, the plasma processing apparatus can include a processing chamber to process a workpiece, a plasma chamber separated from the processing chamber by a separation grid, and an inductive coupling element to induce an oxygen plasma using a process gas in the plasma chamber. The plasma processing apparatus can detect afterglow emission strength from reaction between nitric oxide (NO) and oxygen radical(s) in a process space downstream to an oxygen plasma to measure nitrogen concentrations due to presence of air leak.
    Type: Application
    Filed: June 14, 2021
    Publication date: September 30, 2021
    Inventors: Shuang Meng, Xinliang Lu, Shawming Ma, Hua Chung
  • Patent number: 11107675
    Abstract: A method of forming a molybdenum-containing material on a substrate is described, in which the substrate is contacted with molybdenum oxytetrachloride (MoOCl4) vapor under vapor deposition conditions, to deposit the molybdenum-containing material on the substrate. In various implementations, a diborane contact of the substrate may be employed to establish favorable nucleation conditions for the subsequent bulk deposition of molybdenum, e.g., by chemical vapor deposition (CVD) techniques such as pulsed CVD.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: August 31, 2021
    Assignee: ENTEGRIS, INC.
    Inventors: Thomas H. Baum, Philip S. H. Chen, Robert L. Wright, Bryan Hendrix, Shuang Meng, Richard Assion
  • Patent number: 11039527
    Abstract: Plasma processing apparatus and associated methods for detecting air leak are provided. In one example implementation, the plasma processing apparatus can include a processing chamber to process a workpiece, a plasma chamber separated from the processing chamber by a separation grid, and an inductive coupling element to induce an oxygen plasma using a process gas in the plasma chamber. The plasma processing apparatus can detect afterglow emission strength from reaction between nitric oxide (NO) and oxygen radical(s) in a process space downstream to an oxygen plasma to measure nitrogen concentrations due to presence of air leak.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: June 15, 2021
    Assignees: MATTSON TECHNOLOGY, INC., BEIJING E-TOWN SEMICONDUCTOR TECHNOLOGY CO., LTD.
    Inventors: Shuang Meng, Xinliang Lu, Shawming Ma, Hua Chung
  • Publication number: 20200245444
    Abstract: Plasma processing apparatus and associated methods for detecting air leak are provided. In one example implementation, the plasma processing apparatus can include a processing chamber to process a workpiece, a plasma chamber separated from the processing chamber by a separation grid, and an inductive coupling element to induce an oxygen plasma using a process gas in the plasma chamber. The plasma processing apparatus can detect afterglow emission strength from reaction between nitric oxide (NO) and oxygen radical(s) in a process space downstream to an oxygen plasma to measure nitrogen concentrations due to presence of air leak.
    Type: Application
    Filed: January 28, 2019
    Publication date: July 30, 2020
    Inventors: Shuang Meng, Xinliang Lu, Shawming Ma, Hua Chung
  • Publication number: 20200203171
    Abstract: A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.
    Type: Application
    Filed: March 2, 2020
    Publication date: June 25, 2020
    Applicant: Micron Technology, Inc.
    Inventors: Baosuo Zhou, Mirzafer K. Abatchev, Ardavan Niroomand, Paul A. Morgan, Shuang Meng, Joseph Neil Greeley, Brian J. Coppa
  • Publication number: 20200135554
    Abstract: Apparatus, systems, and methods for conducting a hardmask (e.g., boron doped amorphous carbon hardmask) removal process on a workpiece are provided. In one example implementation, a method includes supporting a workpiece on a workpiece support in a processing chamber. The method can include generating a plasma from a process gas in a plasma chamber using a plasma source. The plasma chamber can be separated from the processing chamber by a separation grid. The method can include exposing the workpiece to one or more radicals generated in the plasma to perform a plasma strip process on the workpiece to at least partially remove the hardmask layer from the workpiece. The method can include exposing the workpiece to water vapor as a passivation agent during the plasma strip process.
    Type: Application
    Filed: October 10, 2019
    Publication date: April 30, 2020
    Inventors: Li Hou, Vijay M. Vaniapura, Jeyta Anand Sahay, Hua Chung, Shuang Meng, Shawming Ma
  • Patent number: 10607844
    Abstract: A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: March 31, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Baosuo Zhou, Mirzafer K. Abatchev, Ardavan Niroomand, Paul A. Morgan, Shuang Meng, Joseph Neil Greeley, Brian J. Coppa
  • Patent number: 10453744
    Abstract: The disclosure relates to a method of making molybdenum films utilizing boron and molybdenum nucleation layers. The resulting molybdenum films have low electrical resistivity, are substantially free of boron, and can be made at reduced temperatures compared to conventional chemical vapor deposition processes that do not use the boron or molybdenum nucleation layers. The molybdenum nucleation layer formed by this process can protect the substrate from the etching effect of MoCl5 or MoOCl4, facilitates nucleation of subsequent CVD Mo growth on top of the molybdenum nucleation layer, and enables Mo CVD deposition at lower temperatures. The nucleation layer can also be used to control the grain sizes of the subsequent CVD Mo growth, and therefore controls the electrical resistivity of the Mo film.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: October 22, 2019
    Assignee: ENTEGRIS, INC.
    Inventors: Shuang Meng, Richard Ulrich Assion, Thomas H. Baum, Bryan Clark Hendrix
  • Publication number: 20190226086
    Abstract: Described are vapor deposition methods for depositing molybdenum materials onto a substrate by the use of bis(alkyl-arene) molybdenum, also referred to herein as (alkyl-arene)2Mo, for example bis(ethyl-benzene) molybdenum ((EtBz)2Mo), as a precursor for such deposition, as well as structures that contain the deposited material.
    Type: Application
    Filed: January 11, 2019
    Publication date: July 25, 2019
    Inventors: Robert Wright, JR., Shuang MENG, Bryan C. HENDRIX, Thomas H. BAUM, Philip S.H. CHEN
  • Publication number: 20190189479
    Abstract: Processes and apparatuses for the treatment of semiconductor workpieces are provided. In some embodiments, a method can include placing the workpiece into a process chamber; vaporizing a solvent to create a vaporized solvent; introducing the vaporized solvent into the process chamber; and exposing the workpiece to the vaporized solvent.
    Type: Application
    Filed: December 3, 2018
    Publication date: June 20, 2019
    Inventors: Shuang Meng, Shawming Ma, Michael X. Yang
  • Patent number: 10096483
    Abstract: A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: October 9, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Baosuo Zhou, Mirzafer K. Abatchev, Ardavan Niroomand, Paul A. Morgan, Shuang Meng, Joseph Neil Greeley, Brian J. Coppa
  • Publication number: 20180286668
    Abstract: A method of forming a molybdenum-containing material on a substrate is described, in which the substrate is contacted with molybdenum oxytetrachloride (MoOCl4) vapor under vapor deposition conditions, to deposit the molybdenum-containing material on the substrate. In various implementations, a diborane contact of the substrate may be employed to establish favorable nucleation conditions for the subsequent bulk deposition of molybdenum, e.g., by chemical vapor deposition (CVD) techniques such as pulsed CVD.
    Type: Application
    Filed: April 26, 2018
    Publication date: October 4, 2018
    Inventors: Thomas H. Baum, Philip S.H. Chen, Robert L. Wright, Bryan Hendrix, Shuang Meng, Richard Assion