Patents by Inventor Shuang Meng

Shuang Meng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200280006
    Abstract: Disclosed is a flexible display device including: a housing comprising an accommodating chamber, a first opening is formed at one end of accommodating chamber; a flexible display screen accommodated in the accommodating chamber, the flexible display screen includes a substrate, a first infrared receiving circuit formed on one side of the substrate, and an anode formed on a side of the first infrared receiving circuit away from the substrate; a hole through are formed on the anode, orthographic projections of the hole, onto the substrate cover an orthographic projection of the first infrared receiving circuit onto the substrate; an infrared transmitting circuit arranged in the first opening; a reel is arranged in the accommodating chamber; a control circuit signal-connected with the first infrared receiving circuit.
    Type: Application
    Filed: November 4, 2019
    Publication date: September 3, 2020
    Applicants: Chongqing BOE Display Technology Co.,Ltd., BOE Technology Group Co., Ltd.
    Inventors: Shicheng SUN, Jonguk KWAK, Dawei SHI, Weixin MENG, Kai ZHANG, Wei ZHANG, Shuang HU
  • Publication number: 20200245444
    Abstract: Plasma processing apparatus and associated methods for detecting air leak are provided. In one example implementation, the plasma processing apparatus can include a processing chamber to process a workpiece, a plasma chamber separated from the processing chamber by a separation grid, and an inductive coupling element to induce an oxygen plasma using a process gas in the plasma chamber. The plasma processing apparatus can detect afterglow emission strength from reaction between nitric oxide (NO) and oxygen radical(s) in a process space downstream to an oxygen plasma to measure nitrogen concentrations due to presence of air leak.
    Type: Application
    Filed: January 28, 2019
    Publication date: July 30, 2020
    Inventors: Shuang Meng, Xinliang Lu, Shawming Ma, Hua Chung
  • Publication number: 20200203171
    Abstract: A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.
    Type: Application
    Filed: March 2, 2020
    Publication date: June 25, 2020
    Applicant: Micron Technology, Inc.
    Inventors: Baosuo Zhou, Mirzafer K. Abatchev, Ardavan Niroomand, Paul A. Morgan, Shuang Meng, Joseph Neil Greeley, Brian J. Coppa
  • Publication number: 20200135554
    Abstract: Apparatus, systems, and methods for conducting a hardmask (e.g., boron doped amorphous carbon hardmask) removal process on a workpiece are provided. In one example implementation, a method includes supporting a workpiece on a workpiece support in a processing chamber. The method can include generating a plasma from a process gas in a plasma chamber using a plasma source. The plasma chamber can be separated from the processing chamber by a separation grid. The method can include exposing the workpiece to one or more radicals generated in the plasma to perform a plasma strip process on the workpiece to at least partially remove the hardmask layer from the workpiece. The method can include exposing the workpiece to water vapor as a passivation agent during the plasma strip process.
    Type: Application
    Filed: October 10, 2019
    Publication date: April 30, 2020
    Inventors: Li Hou, Vijay M. Vaniapura, Jeyta Anand Sahay, Hua Chung, Shuang Meng, Shawming Ma
  • Patent number: 10607844
    Abstract: A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: March 31, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Baosuo Zhou, Mirzafer K. Abatchev, Ardavan Niroomand, Paul A. Morgan, Shuang Meng, Joseph Neil Greeley, Brian J. Coppa
  • Patent number: 10453744
    Abstract: The disclosure relates to a method of making molybdenum films utilizing boron and molybdenum nucleation layers. The resulting molybdenum films have low electrical resistivity, are substantially free of boron, and can be made at reduced temperatures compared to conventional chemical vapor deposition processes that do not use the boron or molybdenum nucleation layers. The molybdenum nucleation layer formed by this process can protect the substrate from the etching effect of MoCl5 or MoOCl4, facilitates nucleation of subsequent CVD Mo growth on top of the molybdenum nucleation layer, and enables Mo CVD deposition at lower temperatures. The nucleation layer can also be used to control the grain sizes of the subsequent CVD Mo growth, and therefore controls the electrical resistivity of the Mo film.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: October 22, 2019
    Assignee: ENTEGRIS, INC.
    Inventors: Shuang Meng, Richard Ulrich Assion, Thomas H. Baum, Bryan Clark Hendrix
  • Publication number: 20190226086
    Abstract: Described are vapor deposition methods for depositing molybdenum materials onto a substrate by the use of bis(alkyl-arene) molybdenum, also referred to herein as (alkyl-arene)2Mo, for example bis(ethyl-benzene) molybdenum ((EtBz)2Mo), as a precursor for such deposition, as well as structures that contain the deposited material.
    Type: Application
    Filed: January 11, 2019
    Publication date: July 25, 2019
    Inventors: Robert Wright, JR., Shuang MENG, Bryan C. HENDRIX, Thomas H. BAUM, Philip S.H. CHEN
  • Publication number: 20190189479
    Abstract: Processes and apparatuses for the treatment of semiconductor workpieces are provided. In some embodiments, a method can include placing the workpiece into a process chamber; vaporizing a solvent to create a vaporized solvent; introducing the vaporized solvent into the process chamber; and exposing the workpiece to the vaporized solvent.
    Type: Application
    Filed: December 3, 2018
    Publication date: June 20, 2019
    Inventors: Shuang Meng, Shawming Ma, Michael X. Yang
  • Patent number: 10295083
    Abstract: A real-time analysis system for operation of working ship based on ship attitude measurement includes: a central processing unit (10); a position monitoring unit (20) for detecting and providing position-attitude information and heading information of the working ship at a predetermined time, and the position-attitude information and heading information of the working ship at a predetermined time is provided to the central processing unit (10); a manual data input unit (30) connected to the central processing unit (10) and capable of providing the pipeline model data to the central processing unit (10) in a manual input method; and a display unit (40) connected to the central processing unit (10) which displays the dynamic response data of the pipeline according to the processed data provided by the central processing unit (10).
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: May 21, 2019
    Assignees: CHINA NATIONAL OFFSHORE OIL CORPORATION, OFFSHORE OIL ENGINEERING CO., LTD., COTEC, INC
    Inventors: Facheng Wang, Shuang Gao, Ke Tang, Zhigang Li, Yigong Zhang, Yong Luo, Jin Wang, Jun Wang, Weiwei Liu, Xiaohuan Zhu, Yang Li, Jiannan Li, Xiangwei Meng
  • Patent number: 10096483
    Abstract: A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: October 9, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Baosuo Zhou, Mirzafer K. Abatchev, Ardavan Niroomand, Paul A. Morgan, Shuang Meng, Joseph Neil Greeley, Brian J. Coppa
  • Publication number: 20180286693
    Abstract: A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.
    Type: Application
    Filed: May 30, 2018
    Publication date: October 4, 2018
    Applicant: Micron Technology, Inc.
    Inventors: Baosuo Zhou, Mirzafer K. Abatchev, Ardavan Niroomand, Paul A. Morgan, Shuang Meng, Joseph Neil Greeley, Brian J. Coppa
  • Publication number: 20180286668
    Abstract: A method of forming a molybdenum-containing material on a substrate is described, in which the substrate is contacted with molybdenum oxytetrachloride (MoOCl4) vapor under vapor deposition conditions, to deposit the molybdenum-containing material on the substrate. In various implementations, a diborane contact of the substrate may be employed to establish favorable nucleation conditions for the subsequent bulk deposition of molybdenum, e.g., by chemical vapor deposition (CVD) techniques such as pulsed CVD.
    Type: Application
    Filed: April 26, 2018
    Publication date: October 4, 2018
    Inventors: Thomas H. Baum, Philip S.H. Chen, Robert L. Wright, Bryan Hendrix, Shuang Meng, Richard Assion
  • Publication number: 20180261503
    Abstract: The disclosure relates to a method of making molybdenum films utilizing boron and molybdenum nucleation layers. The resulting molybdenum films have low electrical resistivity, are substantially free of boron, and can be made at reduced temperatures compared to conventional chemical vapor deposition processes that do not use the boron or molybdenum nucleation layers. The molybdenum nucleation layer formed by this process can protect the substrate from the etching effect of MoCl5 or MoOCl4, facilitates nucleation of subsequent CVD Mo growth on top of the molybdenum nucleation layer, and enables Mo CVD deposition at lower temperatures. The nucleation layer can also be used to control the grain sizes of the subsequent CVD Mo growth, and therefore controls the electrical resistivity of the Mo film.
    Type: Application
    Filed: April 20, 2018
    Publication date: September 13, 2018
    Inventors: Shuang Meng, Richard Ulrich Assion, Thomas H. Baum, Bryan Clark Hendrix
  • Publication number: 20180142345
    Abstract: The disclosure relates to a method of making molybdenum films utilizing boron and molybdenum nucleation layers. The resulting molybdenum films have low electrical resistivity, are substantially free of boron, and can be made at reduced temperatures compared to conventional chemical vapor deposition processes that do not use the boron or molybdenum nucleation layers. The molybdenum nucleation layer formed by this process can protect the substrate from the etching effect of MoCl5 or MoOCl4, facilitates nucleation of subsequent CVD Mo growth on top of the molybdenum nucleation layer, and enables Mo CVD deposition at lower temperatures. The nucleation layer can also be used to control the grain sizes of the subsequent CVD Mo growth, and therefore controls the electrical resistivity of the Mo film.
    Type: Application
    Filed: November 22, 2017
    Publication date: May 24, 2018
    Inventors: Shuang Meng, Richard Ulrich Assion, Thomas H. Baum, Bryan Clark Hendrix
  • Publication number: 20180019165
    Abstract: A method of forming a molybdenum-containing material on a substrate is described, in which the substrate is contacted with molybdenum oxytetrachloride (MoOCl4) vapor under vapor deposition conditions, to deposit the molybdenum-containing material on the substrate. In various implementations, a diborane contact of the substrate may be employed to establish favorable nucleation conditions for the subsequent bulk deposition of molybdenum, e.g., by chemical vapor deposition (CVD) techniques such as pulsed CVD.
    Type: Application
    Filed: July 13, 2017
    Publication date: January 18, 2018
    Inventors: Thomas H. Baum, Philip S.H. Chen, Robert Wright, Bryan Hendrix, Shuang Meng, Richard Assion
  • Publication number: 20170372913
    Abstract: A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.
    Type: Application
    Filed: August 18, 2017
    Publication date: December 28, 2017
    Applicant: Micron Technology, Inc.
    Inventors: Baosuo Zhou, Mirzafer K. Abatchev, Ardavan Niroomand, Paul A. Morgan, Shuang Meng, Joseph Neil Greeley, Brian J. Coppa
  • Patent number: 9761457
    Abstract: A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: September 12, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Baosuo Zhou, Mirzafer K. Abatchev, Ardavan Niroomand, Paul A. Morgan, Shuang Meng, Joseph Neil Greeley, Brian J. Coppa
  • Publication number: 20160203993
    Abstract: A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.
    Type: Application
    Filed: March 21, 2016
    Publication date: July 14, 2016
    Inventors: Baosuo Zhou, Mirzafer K. Abatchev, Ardavan Niroomand, Paul A. Morgan, Shuang Meng, Joseph Neil Greeley, Brian J. Coppa
  • Patent number: 9305782
    Abstract: A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.
    Type: Grant
    Filed: October 6, 2014
    Date of Patent: April 5, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Baosuo Zhou, Mirzafer K. Abatchev, Ardavan Niroomand, Paul A. Morgan, Shuang Meng, Joseph Neil Greely, Brian J. Coppa
  • Publication number: 20150021744
    Abstract: A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.
    Type: Application
    Filed: October 6, 2014
    Publication date: January 22, 2015
    Inventors: Baosuo Zhou, Mirzafer K. Abatchev, Ardavan Niroomand, Paul A. Morgan, Shuang Meng, Joseph Neil Greely, Brian J. Coppa