Patents by Inventor Shuichi Oka

Shuichi Oka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170287823
    Abstract: A method of manufacturing a mounting substrate according to an embodiment of the present technology includes the following three steps: (1) a step of forming a plurality of electrodes on a semiconductor layer, and thereafter forming one of solder bumps at a position facing each of the electrodes; (2) a step of covering the solder bumps with a coating layer, and thereafter selectively etching the semiconductor layer with use of the coating layer as a mask to separate the semiconductor layer into a plurality of elements; and (3) a step of removing the coating layer, and thereafter mounting the elements on a wiring substrate to direct the solder bumps toward the wiring substrate, thereby forming the mounting substrate.
    Type: Application
    Filed: September 8, 2015
    Publication date: October 5, 2017
    Applicant: Sony Corporation
    Inventors: Kiwamu Adachi, Katsuji Matsumoto, Takeshi Kodama, Shuichi Oka, Hiizu Ootorii, Kazunari Saitou, Kei Satou
  • Patent number: 9723724
    Abstract: A method of manufacturing a wiring substrate that has a wiring including a through glass via and is formed of a glass substrate includes forming an alteration layer that penetrates the wiring substrate and is patterned, forming the wiring on a front surface of the wiring substrate in which the alteration layer has been formed, and filling an electrode material in a hole formed by removing the alteration layer, thereby forming the through glass via that connects the wiring on the front surface of the wiring substrate and the wiring on a back surface side thereof.
    Type: Grant
    Filed: July 9, 2014
    Date of Patent: August 1, 2017
    Assignee: Sony Corporation
    Inventors: Shun Mitarai, Shusaku Yanagawa, Shinji Rokuhara, Shuichi Oka
  • Publication number: 20170205596
    Abstract: An optical communication device, reception apparatus, transmission apparatus and transmission and reception system are disclosed. The optical communication device includes a drive circuit substrate. A first through via extends through the drive circuit substrate and is configured to electrically connect an optical element disposed on a first surface side of the drive circuit substrate to a drive circuit disposed on a second surface side of the drive circuit substrate. A positioning element is attached to an interposer substrate and is configured to align optical axes of a first lens that is attached to a lens substrate and that faces a second lens that is disposed on the first surface side of the drive circuit substrate. A second through via extends through the interposer substrate and electrically connects the drive circuit to a signal processing circuit disposed on a signal processing substrate positioned above the interposer substrate.
    Type: Application
    Filed: April 3, 2017
    Publication date: July 20, 2017
    Inventors: Shinji Rokuhara, Shusaku Yanagawa, Eiji Otani, Shuichi Oka, Kazunao Oniki, Hiizu Ootorii
  • Publication number: 20170170339
    Abstract: A photoelectric module of the present disclosure includes an optical device including an optical function element array made of a first base material, and a plurality of light emitting/receiving elements made of a second base material, wherein the optical function element array includes an optical substrate and a plurality of optical function elements, the optical substrate having a first surface and a second surface, and the optical function elements being integrated with the optical substrate and being arranged one-dimensionally or two-dimensionally, and the light emitting/receiving elements and their respective optical function elements face each other with the optical substrate in between to be located on a same axis in a direction perpendicular to the optical substrate, and the light emitting/receiving elements are disposed on the second surface with a space in between while being separated in units of a smaller number than array number in the optical function element array.
    Type: Application
    Filed: April 23, 2015
    Publication date: June 15, 2017
    Inventors: Hiizu OOTORII, Kazunao ONIKI, Koki UCHINO, Hideyuki SUZUKI, Hiroshi OZAKI, Kazuki SANO, Eiji OTANI, Shinji ROKUHARA, Kiwamu ADACHI, Shuichi OKA, Shusaku YANAGAWA, Hiroshi MORITA, Takeshi OGURA
  • Patent number: 9672983
    Abstract: A multilayer wiring board includes: a functional area which includes a thin film capacitor having a dielectric layer between an upper electrode and a lower electrode; and a peripheral area other than the functional area, wherein a mooring portion in which the dielectric layer and a conductive layer are laminated is provided in at least a portion of the peripheral area, and a roughness of a surface of the conductive layer which contacts the dielectric layer is greater than a roughness of a surface of the upper electrode or the lower electrode which contacts the dielectric layer.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: June 6, 2017
    Assignee: SONY CORPORATION
    Inventors: Shuichi Oka, Shusaku Yanagawa, Kiwamu Adachi
  • Publication number: 20170103944
    Abstract: A wiring substrate includes a laminated sheet including a first conductor pattern, an inorganic dielectric layer, and a second conductor pattern. The first conductor pattern, the inorganic dielectric layer, and the second conductor pattern are laminated in this order. Also, the first conductor pattern is divided into a plurality of regions.
    Type: Application
    Filed: September 28, 2016
    Publication date: April 13, 2017
    Applicants: FUJITSU LIMITED, SONY CORPORATION
    Inventors: Kei FUKUI, Kazuya Arai, Koji Komemura, Kazuhiko Iijima, Kenichiro Abe, Shinji Rokuhara, Shuichi Oka
  • Patent number: 9614347
    Abstract: An optical communication device, reception apparatus, transmission apparatus and transmission and reception system are disclosed. The optical communication device includes a drive circuit substrate. A first through via extends through the drive circuit substrate and is configured to electrically connect an optical element disposed on a first surface side of the drive circuit substrate to a drive circuit disposed on a second surface side of the drive circuit substrate. A positioning element is attached to an interposer substrate and is configured to align optical axes of a first lens that is attached to a lens substrate and that faces a second lens that is disposed on the first surface side of the drive circuit substrate. A second through via extends through the interposer substrate and electrically connects the drive circuit to a signal processing circuit disposed on a signal processing substrate positioned above the interposer substrate.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: April 4, 2017
    Assignee: Sony Corporation
    Inventors: Shinji Rokuhara, Shusaku Yanagawa, Eiji Otani, Shuichi Oka, Kazunao Oniki, Hiizu Ootorii
  • Publication number: 20160163754
    Abstract: There is provided a radiation detector including: a plurality of photoelectric conversion devices, each photoelectric conversion device formed at least partially within an embedding layer and having a light receiving surface situated at least partially outside of the embedding layer, and a plurality of scintillator crystals, at least a first scintillator crystal of the plurality of scintillator crystals in contact with at least one light receiving surface at a proximal end, wherein a cross-section of the first scintillator crystal at the proximal end is smaller than a cross-section of the first scintillator crystal at a distal end.
    Type: Application
    Filed: August 21, 2014
    Publication date: June 9, 2016
    Inventors: Takahiro Igarashi, Izuho Hatada, Takeshi Kodama, Kiwamu Adachi, Shuichi Oka, Shun Mitarai, Hiizu Ootoril, Shusaku Yanagawa, Katsuji Matsumoto
  • Patent number: 9257395
    Abstract: A semiconductor device includes a base substrate on which a substrate electrode is arranged, and a semiconductor element which includes a chip electrode electrically connected via solder to the substrate electrode and in which a light absorbing layer is formed on a lower surface side.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: February 9, 2016
    Assignee: SONY CORPORATION
    Inventors: Izuho Hatada, Hiizu Ootorii, Shuichi Oka, Shusaku Yanagawa
  • Publication number: 20150145086
    Abstract: An optical communication device, reception apparatus, transmission apparatus and transmission and reception system are disclosed. The optical communication device includes a drive circuit substrate. A first through via extends through the drive circuit substrate and is configured to electrically connect an optical element disposed on a first surface side of the drive circuit substrate to a drive circuit disposed on a second surface side of the drive circuit substrate. A positioning element is attached to an interposer substrate and is configured to align optical axes of a first lens that is attached to a lens substrate and that faces a second lens that is disposed on the first surface side of the drive circuit substrate. A second through via extends through the interposer substrate and electrically connects the drive circuit to a signal processing circuit disposed on a signal processing substrate positioned above the interposer substrate.
    Type: Application
    Filed: November 12, 2014
    Publication date: May 28, 2015
    Inventors: Shinji Rokuhara, Shusaku Yanagawa, Eiji Otani, Shuichi Oka, Kazunao Oniki, Hiizu Ootorii
  • Publication number: 20150021081
    Abstract: A method of manufacturing a wiring substrate that has a wiring including a through glass via and is formed of a glass substrate includes forming an alteration layer that penetrates the wiring substrate and is patterned, forming the wiring on a front surface of the wiring substrate in which the alteration layer has been formed, and filling an electrode material in a hole formed by removing the alteration layer, thereby forming the through glass via that connects the wiring on the front surface of the wiring substrate and the wiring on a back surface side thereof.
    Type: Application
    Filed: July 9, 2014
    Publication date: January 22, 2015
    Inventors: Shun Mitarai, Shusaku Yanagawa, Shinji Rokuhara, Shuichi Oka
  • Publication number: 20150001718
    Abstract: A semiconductor device includes a base substrate on which a substrate electrode is arranged, and a semiconductor element which includes a chip electrode electrically connected via solder to the substrate electrode and in which a light absorbing layer is formed on a lower surface side.
    Type: Application
    Filed: June 17, 2014
    Publication date: January 1, 2015
    Inventors: Izuho Hatada, Hiizu Ootorii, Shuichi Oka, Shusaku Yanagawa
  • Patent number: 8482107
    Abstract: A device that comprises a plurality of circuit elements on a substrate; a shielding element between at least two of the plurality of circuit elements; and a bonding element that electrically connects the shielding element to a grounding circuit of a semiconductor chip that is on the substrate.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: July 9, 2013
    Assignee: Sony Corporation
    Inventors: Shinji Rokuhara, Shuichi Oka, Katsuji Matsumoto, Shusaku Yanagawa
  • Patent number: 8338912
    Abstract: Disclosed herein is an inductor module including a substrate functioning as a printed wiring board or an interposer; an IC mounting part formed on a surface of the substrate; an inductor which is formed in the substrate at such a position as to overlap with the IC mounting part on a plan-view basis and which is connected to an IC mounted on the IC mounting part; and a magnetic body including a magnetic material selected from among a NiZn ferrite, a NiZnCu ferrite and a Ba ferrite, the magnetic body being disposed intermediately between the IC mounting part and the inductor.
    Type: Grant
    Filed: June 10, 2009
    Date of Patent: December 25, 2012
    Assignee: Sony Corporation
    Inventors: Shuichi Oka, Katsuji Matsumoto, Shusaku Yanagawa
  • Patent number: 8331103
    Abstract: Disclosed herein is a wiring board including: a shield layer; and n layers (n is an integer of two or more) of inductor wiring formed above the shield layer and forming an inductor; wherein of the n layers of inductor wiring, the inductor wiring closest to the shield layer has a smallest wiring area.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: December 11, 2012
    Assignee: Sony Corporation
    Inventor: Shuichi Oka
  • Publication number: 20120307469
    Abstract: A multilayer wiring board includes: a functional area which includes a thin film capacitor having a dielectric layer between an upper electrode and a lower electrode; and a peripheral area other than the functional area, wherein a mooring portion in which the dielectric layer and a conductive layer are laminated is provided in at least a portion of the peripheral area, and a roughness of a surface of the conductive layer which contacts the dielectric layer is greater than a roughness of a surface of the upper electrode or the lower electrode which contacts the dielectric layer.
    Type: Application
    Filed: May 25, 2012
    Publication date: December 6, 2012
    Applicant: SONY CORPORATION
    Inventors: Shuichi Oka, Shusaku Yanagawa, Kiwamu Adachi
  • Publication number: 20120241204
    Abstract: A thin film capacitor includes: two electrode layers; a dielectric film interposed between the two electrode layers; an opening that pierces through, together with the dielectric film, in the thickness direction, any one of the two electrode layers or a conductive layer in the same level adjacent to one of the two electrode layers; and a reinforcing member that couples, in the opening, a side surface of the dielectric film to a side surface of the one electrode layer or the conductive layer.
    Type: Application
    Filed: March 22, 2012
    Publication date: September 27, 2012
    Applicant: SONY CORPORATION
    Inventors: Katsuji Matsumoto, Shusaku Yanagawa, Satoshi Horiuchi, Shuichi Oka
  • Patent number: 8254144
    Abstract: A circuit board laminated module includes: a first circuit board having a multi-layer structure in which ground layers are provided in a plurality of layers; a second circuit board mounted on the first circuit board; and a semiconductor chip mounted on the second circuit board, wherein in the first circuit board, a noise guiding through via which guides an electromagnetic noise generated in the semiconductor chip to a lower layer side is provided on a side different from a circuit portion or a circuit element desired to be protected against influence of the electromagnetic noise in a surrounding direction of an occurrence place of the electromagnetic noise.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: August 28, 2012
    Assignee: Sony Corporation
    Inventors: Katsuji Matsumoto, Shusaku Yanagawa, Shuichi Oka, Shinji Rokuhara
  • Publication number: 20110156224
    Abstract: A device that comprises a plurality of circuit elements on a substrate; a shielding element between at least two of the plurality of circuit elements; and a bonding element that electrically connects the shielding element to a grounding circuit of a semiconductor chip that is on the substrate.
    Type: Application
    Filed: November 8, 2010
    Publication date: June 30, 2011
    Applicant: Sony Corporation
    Inventors: Shinji Rokuhara, Shuichi Oka, Katsuji Matsumoto, Shusaku Yanagawa
  • Publication number: 20110157857
    Abstract: A circuit board laminated module includes: a first circuit board having a multi-layer structure in which ground layers are provided in a plurality of layers; a second circuit board mounted on the first circuit board; and a semiconductor chip mounted on the second circuit board, wherein in the first circuit board, a noise guiding through via which guides an electromagnetic noise generated in the semiconductor chip to a lower layer side is provided on a side different from a circuit portion or a circuit element desired to be protected against influence of the electromagnetic noise in a surrounding direction of an occurrence place of the electromagnetic noise.
    Type: Application
    Filed: December 16, 2010
    Publication date: June 30, 2011
    Applicant: Sony Corporation
    Inventors: Katsuji Matsumoto, Shusaku Yanagawa, Shuichi Oka, Shinji Rokuhara