Abstract: An operator definition file 102 and the like included in a source program 101 and a compiler 100 that translates the source program 101 into a machine language program 105 are provided. The operator definition file 102 includes definitions of various fixed point type operators by class definitions. The compiler 100 can generate effectively advanced and specific instructions that a processor executes and make improvements through expanding functions and the like without repeating frequently upgrading of the version of the compiler itself. The compiler 100 is made up of an intermediate code generation unit 121 that generates intermediate codes, a machine language instruction substitution unit 122 that substitutes the intermediate codes referring to classes defined by the operator definition file 102 with machine language instructions and an optimization unit 130 that performs optimization targeting the intermediate codes including the substituted machine language instructions.

Abstract: A digital signal reproduction device includes an audio decoder configured to decode an audio bit stream to output a resulting audio signal, an audio bit stream analyzer configured to analyze whether or not the audio bit stream contains human voice, a playback speed determiner configured to determine a playback speed based on a result of the analysis by the audio bit stream analyzer, and a variable speed reproducer configured to receive the audio signal and reproduce an audio signal corresponding to the playback speed determined by the playback speed determiner.

Abstract: In an encoded stream decoding device, a storage amount checking circuit confirms that a sufficient amount of stream has been stored in a buffer circuit. Thereafter, a control circuit starts repeatedly outputting a control signal to a decoding circuit to instruct the decoding circuit to perform a variable-length decoding process. If, by iterating the decoding process, the total amount of a consumed stream in the buffer circuit 11 is caused to be higher than or equal to a threshold set in a threshold setting circuit, a disabling circuit generates a decoding disable signal having a value of “1,” and outputs the decoding disable signal to the control circuit. When receiving the decoding disable signal, the control circuit outputs, to the decoding circuit, a control signal for instructing to stop the decoding process, so that the decoding circuit stops the decoding process.

Abstract: An AV system includes a camera-equipped loudspeaker provided with a camera. The camera is united with a loudspeaker body, and captures an image in a direction in which the loudspeaker body outputs a sound. The recognition unit recognizes a location of a listener from an image of the camera, and detects an orientation of the loudspeaker body relative to the listener. The sound control unit performs signal processing on a given sound signal for generating an output signal, and outputs the output signal as an acoustic signal to the loudspeaker body.

Abstract: Provided is an audio decoder which can reduce an amount of arithmetic operations while suppressing occurrence of aliasing noise. The audio decoder includes: a decoder (102) and an analysis filter bank (110) which generate, from a coded down-mixed signal, the first frequency band signal (x) corresponding to a down-mixed signal (M); a channel expansion unit (130) which converts the first frequency band signal (x) generated by the analysis filter bank (110) into output signals (y) corresponding to respective audio signals of N channels, using BC information; an synthesis filter bank (140) which performs band synthesis for the output signals (y) generate by the channel expansion unit (130) and thereby converts the output signals (y) into the respective audio signals of the N channels on a time axis; and an aliasing noise detection unit (120) which detects occurrence of aliasing noise in the first frequency band signal (x).

Abstract: To provide an acoustic signal processing apparatus which can reduce the amount of calculation in matrix arithmetic. An acoustic signal processing apparatus converts down-mixed acoustic signals of NI channels to acoustic signals of NO channels, where NO>NI.

Abstract: An audio decoder which reproduces original signals from a bit stream including (i) a downmix signal of the original signals, and (ii) supplementary information indicating a gain ratio D and phase difference ? between the original signals. The audio decoder includes: a decoding unit extracting the downmix signal; a transformation unit transforming the extracted downmix signal into a frequency domain signal; a phase rotator determination unit determining two phase rotators having, as the phase rotation angles, angles ? and ? respectively obtained by dividing a contained angle by a diagonal of a parallelogram; a separation unit separating the frequency domain signal into two separation signals respectively indicating angles ? and ? as phase differences between the signals and the decoded downmix signal; and an inverse transformation unit inversely transforming the respective two separation signals into time domain signals so as to reproduce the two audio signals.

Abstract: A temporal processing apparatus includes: a splitter splitting an audio signal, included in the sub-band domain, into diffuse signals indicating reverberating components and direct signals indicating non-reverberating components; a downmix unit generating a downmix signal by downmixing the direct signals; BPFs respectively generating a bandpass downmix signal and bandpass diffuse signals; normalization processing units respectively generating a normalized downmix signal and normalized diffuse signals; a scale computation processing unit computing, on a predetermined time slot basis, a scale factor indicating the magnitude of energy of the normalized downmix signal with respect to energy of the normalized diffuse signals; a calculating unit generating scale diffuse signals; a HPF generating high-pass diffuse signals; an adding unit generating addition signals; and a synthesis filter bank performing synthesis filter processing on the addition signals and transforming the addition signals into the time domains.

Abstract: A cache memory and method for controlling the cache memory. The cache memory selects, from an access address, a unique set from among a plurality of sets, each access set including a plurality of cache entries. Each cache entry holds unit data for caching. The cache memory holds, for each of the cache entries, order data that indicates an access order of the cache entries in each set, and replaces a cache entry that is oldest in the access order. The cache memory modifies the order data regardless of an actual access order, and selects, based on the modified order data, a cache entry to be replaced.

Abstract: A cache memory according to the present invention includes a W flag setting unit that modifies order data indicating an access order per cache entry that holds a data unit of a cache so as to reflect an actual access order and a replace unit that selects a cache entry for replacement based on the modified order data and replaces the cache entry.

Abstract: Provided are an audio encoding device and an audio decoding device, by which optimal trade-off between code rates and sound quality can be flexibly adjusted. A variable frequency segmentation encoding unit includes: difference degree calculation units for calculating a difference degree between first and second input signals depending on a segmentation method for segmenting a frequency band into sub-bands; a selection unit for selecting one of the segmentation methods; and a difference degree and segmentation information encoding unit for encoding the selected method and the difference degree for each sub-band. A variable frequency segment decoding unit includes: a segmentation information decoding unit for decoding the segmentation information to learn the segmentation method; a switching unit for outputting a difference degree code corresponding to the segmentation method; and difference degree decoding units for decoding the difference degree code to the difference degree for each sub-band.

Abstract: An audio encoder, which is capable of encoding multiple-channel signals so that only a downmixed signal is decoded and of further generating specific auxiliary information necessary for dividing the downmixed signal, is provided. An audio encoder (10), which compresses and encodes audio signals of N-channels (N>1), includes a downmixed signal encoding unit (11) which encodes the downmixed signal obtained by downmixing the audio signals, and an auxiliary information generation unit (12a) which generates auxiliary information necessary for decoding the downmixed signal encoded by the downmixed signal encoding unit (11) into N-channel audio signals.

Abstract: Provided is an audio decoder which can reduce an amount of arithmetic operations while suppressing occurrence of aliasing noise. The audio decoder includes: a decoder (102) and an analysis filter bank (110) which generate, from a coded down-mixed signal, the first frequency band signal (x) corresponding to a down-mixed signal (M); a channel expansion unit (130) which converts the first frequency band signal (x) generated by the analysis filter bank (110) into output signals (y) corresponding to respective audio signals of N channels, using BC information; an synthesis filter bank (140) which performs band synthesis for the output signals (y) generate by the channel expansion unit (130) and thereby converts the output signals (y) into the respective audio signals of the N channels on a time axis; and an aliasing noise detection unit (120) which detects occurrence of aliasing noise in the first frequency band signal (x).

Abstract: An audio encoder, generating a stereo signal based on a multi-channel signal, includes a downmix unit for downmixing a multi-channel signal exceeding two channels to a two-channel stereo signal, a first coding unit for generating a first coded signal by coding the downmixed stereo signal, a second coding unit for generating a second coded signal by coding information to restore the downmixed stereo signal to a multi-channel signal, a code size calculating unit for calculating a code size of the second coded signal, and a first multiplexing unit for multiplexing the calculated code size in either the first coded signal or the second coded signal. Accordingly a decoder is able to easily extract a coded signal of the multi-channel signal based on the code size, and the decoder reproducing only the downmixed signal can be configured inexpensively.

Abstract: Provided is a multi-channel acoustic signal processing device by which loads of arithmetic operations are reduced. The multi-channel acoustic signal processing device (100) includes: a decorrelated signal generation unit (181), and a matrix operation unit (187) and a third arithmetic unit (186). The decorrelated signal generation unit (181) generates a decorrelated signal w? indicating a sound which includes a sound indicated by an input signal x and reverberation, by performing reverberation processing on the input signal x. The matrix operation unit (187) and the third arithmetic unit (186) generate audio signals of m channels, by performing arithmetic operation on the input signal x and the decorrelated signal w? generated by the decorrelated signal generation unit (181), using a matrix R3 which indicates distribution of a signal intensity level and distribution of reverberation.

Abstract: To provide an acoustic signal processing apparatus which can reduce the amount of calculation in matrix arithmetic. An acoustic signal processing apparatus (24) converts down-mixed acoustic signals of NI channels to acoustic signals of NO channels, where NO>NI.

Abstract: A temporal processing apparatus (energy shaping apparatus) (600a) includes: a splitter (601) splitting an audio signal, included in the sub-band domain, which are obtained through a hybrid time and frequency transformation into diffuse signals indicating reverberating components and direct signals indicating non-reverberating components; a downmix unit (604) generating a downmix signal by downmixing the direct signals; BPFs (605 and 606) respectively generating a bandpass downmix signal and bandpass diffuse signals, by performing bandpass processing on the downmix signal and the diffuse signals on a sub-band-to-sub-band basis, which are split on the sub-band basis; normalization processing units (607 and 608) respectively generating a normalized downmix signal and normalized diffuse signals by normalizing the bandpass downmix signal and the bandpass diffuse signals with regard to respective energy; a scale computation processing unit (609) computing, on a predetermined time slot basis, a scale factor indicati

Abstract: When a coded signal having a layer structure is generated, insertion of header information in a sub-layer in each frame increases the bit rate. In contrast, when the header information is only inserted at regular intervals, a reproducer sometimes cannot obtain information necessary in a reproduction start point.

Abstract: A signal processing device (1) includes: a generation unit (32) which generates a second signal from a first signal that is obtained by downmixing two signals; a mixing coefficient determination unit (40) which determines, based on a value L and a value ?, a mixing degree for mixing the first signal and the second signal, the value L indicating a level ratio between the two signals, and the value ? indicating a phase difference between the two signals; and a mixing unit (50) which mixes the first signal and the second signal based on the mixing degree determined by the mixing coefficient determination unit (40). The generation unit (32) includes: a first filter (302) which generates a low frequency band signal in the second signal, from a low frequency band signal in the first signal; and a second filter (a processing unit 307) which generates a high frequency band signal in the second signal, from a high frequency band signal in the first signal.

Abstract: The cache memory in the present invention is a cache entry having, in a correspondence with a cache entry which holds a data unit of caching, a valid flag indicating whether or not the cache entry is valid, and a dirty flag indicating whether or not the cache entry has been written into. The cache memory in the present invention includes an altering unit which, based on an instruction from a processor, sets, in the cache entry, an address serving as a tag and sets the valid flag, without loading data from a memory, or resets the dirty flag in a state in which the cache entry holds rewritten data that has not been written back.