Patents by Inventor Shuji Miyasaka

Shuji Miyasaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6898615
    Abstract: An exponent part extraction section extracts a bit series from the exponent part of an inputted floating point data. A mantissa part extraction section extracts the uppermost K bits from the mantissa part of the floating point data. A first conversion section inputs the output e from the exponent part extraction section and outputs the value of a function X(e) thereof. A second conversion section inputs the output f from the mantissa part extraction section and outputs the value of a function Y(f) thereof. A multiplier section multiplies together these values. By setting suitable tables in advance in the first and the second conversion sections, the calculation of the v^p for an item v of floating point data can be performed.
    Type: Grant
    Filed: July 23, 2001
    Date of Patent: May 24, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shuji Miyasaka, Takeshi Norimatsu, Mineo Tsushima, Tomokazu Ishikawa, Yoshiaki Sawada
  • Publication number: 20050060147
    Abstract: With respect to audio signal coding and decoding apparatuses, there is provided a coding apparatus that enables a decoding apparatus to reproduce an audio signal even through it does not use all of data from the coding apparatus, and a decoding apparatus corresponding to the coding apparatus. A quantization unit constituting a coding apparatus includes a first sub-quantization unit comprising sub-quantization units for low-band, intermediate-band, and high-band; a second sub-quantization unit for quantizing quantization errors from the first sub-quantization unit; and a third sub-quantization unit for quantizing quantization errors which have been processed by the first sub-quantization unit and the second sub-quantization unit.
    Type: Application
    Filed: October 1, 2004
    Publication date: March 17, 2005
    Inventors: Takeshi Norimatsu, Shuji Miyasaka, Yoshihisa Nakatoh, Mineo Tsushima, Tomokazu Ishikawa
  • Patent number: 6826526
    Abstract: A coding unit codes an audio signal by using a vector quantization method to reduce the quantity of data. An audio code having a minimum distance among auditive distances between sub-vectors produced by dividing an input vector and audio codes in a transmission-side code book is selected. A portion corresponding to an element of a sub-vector having a high auditive importance is handled in an audio code selecting unit while neglecting the codes indicating phase information and subjected to comparative retrieval with respect to audio codes in a transmission-side code book. Extracted phase information corresponding to an element portion of the sub-vector is added to the result obtained and output as a code index. Thereby, the calculation amount in the code retrieval of vector quantization and the number of codes in the code book are decreased without lowering the quality of an audio signal.
    Type: Grant
    Filed: July 23, 1999
    Date of Patent: November 30, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takeshi Norimatsu, Shuji Miyasaka, Yoshihisa Nakato, Mineo Tsushima, Tomokazu Ishikawa
  • Patent number: 6823310
    Abstract: An audio decoding apparatus is provided for receiving a bit stream on a block-by-block basis, decoding one block of the bit stream to form decoded audio data for a plurality of channels, and storing the decoded audio data for each of the plurality of channels in a memory device, thereby down-mixing the decoded audio data for each of the plurality of channels. The audio decoding apparatus includes an operation section for down-mixing the decoded audio data for each of the plurality of channels corresponding to a first block of the bit stream in the memory section while a second block of the bit stream is decoded.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: November 23, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tsukuru Ishito, Masaharu Matsumoto, Shuji Miyasaka, Takeshi Fujita, Takashi Katayama, Masahiro Sueyoshi, Kazutaka Abe, Tsuyoshi Nakamura, Eiji Otomura, Akihisa Kawamura
  • Publication number: 20040078549
    Abstract: A processor according to the present invention includes a decoding unit 20, an operation unit 40 and others. When the decoding unit 20 decodes an instruction “vxaddh Rc, Ra, Rb”, an arithmetic and logic/comparison operation unit 41 and others (i) adds the higher 16 bits of a register Ra to the lower 16 bits of the register Rb, stores the result in the higher 16 bits of a register Rc, and in parallel with this, (ii) adds the lower 16 bits of the register Ra to the higher 16 bits of the register Rb, and stores the result in the lower 16 bits of the register Rc.
    Type: Application
    Filed: June 2, 2003
    Publication date: April 22, 2004
    Inventors: Tetsuya Tanaka, Hazuki Okabayashi, Taketo Heishi, Hajime Ogawa, Yoshihiro Koga, Manabu Kuroda, Masato Suzuki, Tokuzo Kiyohara, Takeshi Tanaka, Hideshi Nishida, Shuji Miyasaka
  • Publication number: 20040025150
    Abstract: An operator definition file 102 and the like included in a source program 101 and a compiler 100 that translates the source program 101 into a machine language program 105 are provided. The operator definition file 102 includes definitions of various fixed point type operators by class definitions. The compiler 100 can generate effectively advanced and specific instructions that a processor executes and make improvements through expanding functions and the like without repeating frequently upgrading of the version of the compiler itself. The compiler 100 is made up of an intermediate code generation unit 121 that generates intermediate codes, a machine language instruction substitution unit 122 that substitutes the intermediate codes referring to classes defined by the operator definition file 102 with machine language instructions and an optimization unit 130 that performs optimization targeting the intermediate codes including the substituted machine language instructions.
    Type: Application
    Filed: July 31, 2003
    Publication date: February 5, 2004
    Inventors: Taketo Heishi, Toshiyuki Sakata, Hajime Ogawa, Ryoko Miyachi, Shuji Miyasaka, Tomokazu Ishikawa
  • Patent number: 6678653
    Abstract: An audio signal is converted from time domain into frequency conversion signal, and is coded at high speed. In order that the frequency information decoded by using the quantizing data may not be zero when the frequency conversion signal is quantized, the guarantee value K(B) of the quantizing precision is calculated. The relative quantizing precision SF(B) in each band and the quantizing precision information Com common to all bands are determined, and final quantizing precision information ASF(B) are calculated by these values, and the frequency conversion signal is quantized in the quantizing unit. Thus, it is possible to quantize by a single quantizing loop, only on the restricting condition of assuring the minimum quantizing information.
    Type: Grant
    Filed: September 7, 2000
    Date of Patent: January 13, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mineo Tsushima, Takeshi Norimatsu, Shuji Miyasaka
  • Publication number: 20030236651
    Abstract: In order to provide a method or the like for storing floating point numbers to make it easier to manage the floating point numbers using a fixed point processor, when a real number x is represented by a*(2{circumflex over ( )}n) where a mantissa is a and an exponent is n, the mantissa is stored as a fixed point number in the upper U bits of N-bit field (N≧(U+L)) and the exponent is stored as an integer in the lower L bits. For the multiplication of two real numbers represented in such a format, these two real numbers are multiplied as fixed point numbers so as to make only the upper significant bits of the multiplication result a mantissa, while these two real numbers are added as integers so as to make only the lower significant bits of the addition result an exponent. As a result, the multiplication result can be obtained in a floating point format.
    Type: Application
    Filed: April 3, 2003
    Publication date: December 25, 2003
    Inventors: Shuji Miyasaka, Tomokazu Ishikawa
  • Publication number: 20030236814
    Abstract: A multitask control device for causing a processor (10) to execute concurrently a plurality of tasks including a first task (101b) having a plurality of operation modes A˜C, the multitask control device including a task management device (20b) that judges whether the first task (101b) should be started up or not; and a mode setting unit (30b) that causes the processor (10) to execute the first task (101b) in the operation mode in which the first task (101b) has the highest function realized within the limit of the processor capacity of the processor (10), when the task management unit (20b) judges that the first task (101b) should be started up.
    Type: Application
    Filed: April 3, 2003
    Publication date: December 25, 2003
    Inventors: Shuji Miyasaka, Tomokazu Ishikawa
  • Patent number: 6631352
    Abstract: A decoding circuit, for receiving a bit stream including an encoded audio signal and header information used for-decoding the encoded audio signal, and decoding the encoded audio signal based on the header information, includes a header analysis section for outputting at least one decoding parameter obtained from the header information and decoding parameter change information indicating whether or not the at least one decoding parameter has been changed; a signal processing section for decoding the encoded audio signal, based on the at least one decoding parameter, into a decoded signal and outputting the decoded signal; an automatic mute processing section for executing automatic mute on the decoded signal after the at least one decoding parameter is changed; and an output section for outputting the decoded signal output from the automatic mute processing section.
    Type: Grant
    Filed: January 3, 2000
    Date of Patent: October 7, 2003
    Assignee: Matushita Electric Industrial Co. Ltd.
    Inventors: Takeshi Fujita, Takashi Katayama, Masahiro Sueyoshi, Shuji Miyasaka, Masaharu Matsumoto, Akihisa Kawamura, Kazutaka Abe, Kousuke Nishio
  • Publication number: 20030093264
    Abstract: A decoding device (30a) comprises a narrow-band decoding unit (31) operable to reproduce a PCM signal (P1) from a narrow-band bit stream included in a wide-band bit stream (S0), a wide-band decoding unit (32) operable to reproduce a PCM signal (P2) having a frequency band which is wider than that of the PCM signal (P1) reproduced by the narrow-band decoding unit (31) from the narrow-band bit stream and a band expanding bit stream included in the wide band bit stream (S0) and a selecting unit (34) operable to select either the PCM signal (P1) reproduced by the narrow-band decoding unit (31) or the PCM signal (P2) reproduced by the wide-band decoding unit (32), and to output the selected sound digital signal.
    Type: Application
    Filed: November 6, 2002
    Publication date: May 15, 2003
    Inventors: Shuji Miyasaka, Tomokazu Ishikawa, Yoshiaki Sawada
  • Patent number: 6546105
    Abstract: A sound image localization apparatus comprises a signal source for outputting an audio signal; a localization angle input unit for receiving an angle of a sound image to be localized; a coefficient control unit for receiving sound image localization angle information from the localization angle input unit, reading coefficients from a coefficient memory in accordance with the information, and outputting the coefficients; first, second, and third multipliers for multiplying the audio signal output from the signal source by using first, second, and third coefficients output from the coefficient control means, respectively; a first signal processing unit for receiving the output from the second multiplier, and processing it by using a filter having a predetermined first frequency response; a second signal processing unit for receiving the output from the second multiplier, and processing it by using a filter having a predetermined second frequency response; a first adder for adding the output from the first multi
    Type: Grant
    Filed: November 1, 1999
    Date of Patent: April 8, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takashi Katayama, Masaharu Matsumoto, Masahiro Sueyoshi, Shuji Miyasaka, Takeshi Fujita, Akihisa Kawamura, Kazutaka Abe, Kousuke Nishio
  • Patent number: 6484142
    Abstract: An encoder of the present invention includes: G storage sections for storing G groups of data; a selection section for selecting one of H Huffman codebooks having codebook numbers for each of the groups of data; G encoding sections Huffman-encoding the G groups of data by using the selected Huffman codebook; and an encoding section for encoding the codebook number of each Huffman codebook selected. The selection section includes a calculation section for calculating a code length and a control section for selecting one of the Huffman codebooks. When the Huffman codebook selected is an unsigned codebook, a number of bits required for sign information has previously been added to the calculated code length.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: November 19, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shuji Miyasaka, Takeshi Norimatsu, Mineo Tsushima, Tomokazu Ishikawa, Yoshiaki Sawada
  • Patent number: 6460016
    Abstract: An audio decoding device for decoding audio information with multiple channels includes a coded information memory section for storing the coded audio information; an information transmission section for reading the coded audio information stored at an arbitrary position in the coded information memory section; and an audio decoding section for decoding the coded audio information read by the information transmission section and outputting the resultant audio information in accordance with a time axis, wherein the information transmission section includes a buffer memory for retaining an address of an actual pointer for reading the coded audio information in the coded information memory section so as not to be reread, an address of a temporary pointer for reading the coded audio information in the coded information memory section so as to be reread, actual pointer data read by the actual pointer, and temporary pointer data read by the temporary pointer.
    Type: Grant
    Filed: October 10, 2000
    Date of Patent: October 1, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Sueyoshi, Shuji Miyasaka, Tukuru Ishito, Takeshi Fujita, Takashi Katayama, Masaharu Matsumoto, Tuyoshi Nakamura, Eiji Otomura, Akihisa Kawamura
  • Publication number: 20020054646
    Abstract: An encoding apparatus includes a quantized spectral sequence generation section for generating a quantized spectral sequence by quantizing an audio signal with a predetermined quantization precision, and a circulating code vector quantization section for outputting a spectral sequence code containing circulating position identification information indicating how much a reference spectral sequence is circulated to obtain a circulant quantized spectral sequence which is most similar to the quantized spectral sequence.
    Type: Application
    Filed: September 12, 2001
    Publication date: May 9, 2002
    Inventors: Mineo Tsushima, Takeshi Norimatsu, Shuji Miyasaka, Tomokazu Ishikawa, Yoshiaki Sawada
  • Patent number: 6363407
    Abstract: A device of the present invention is an exponential calculation device for calculating x{circumflex over ( )}(a/b) (where a and b are each an integer constant) for a given input value of x. The device includes: an input control section for outputting a value of x′, wherein x′=x when x≦A (where A is a threshold value within a variable range of x) and x′=x/2{circumflex over ( )}b when x>A; a core section for outputting a value of z′=x′{circumflex over ( )}(a/b); and an output control section for outputting a value of z, wherein z=z′ when x≦A and z=z′*2{circumflex over ( )}a when x>A.
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: March 26, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shuji Miyasaka, Takeshi Fujita, Masahiro Sueyoshi, Akihisa Kawamura, Masaharu Matsumoto, Takashi Katayama, Kazutaka Abe, Kosuke Nishio
  • Publication number: 20020035407
    Abstract: An audio decoding apparatus is provided for receiving a bit stream on a block-by-block basis, decoding one block of the bit stream to form decoded audio data for a plurality of channels, and storing the decoded audio data for each of the plurality of channels in a memory device, thereby down-mixing the decoded audio data for each of the plurality of channels. The audio decoding apparatus includes an operation section for down-mixing the decoded audio data for each of the plurality of channels corresponding to a first block of the bit stream in the memory section while a second block of the bit stream is decoded.
    Type: Application
    Filed: November 27, 2001
    Publication date: March 21, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tsukuru Ishito, Masaharu Matsumoto, Shuji Miyasaka, Takeshi Fujita, Takashi Katayama, Masahiro Sueyoshi, Kazutaka Abe, Tsuyoshi Nakamura, Eiji Otomura, Akihisa Kawamura
  • Publication number: 20020032712
    Abstract: A device of the present invention is an exponential calculation device for calculating x−(a/b) (where a and b are each an integer constant) for a given input value of x. The device includes: an input control section for outputting a value of x′, wherein x′=x when x≦A (where A is a threshold value within a variable range of x) and x′=x/2ˆ b when x>A: a core section for outputting a value of z′=x′ (a/b); and an output control section for outputting a value of z, wherein z=z′ when x≧A and z=z′*2 a when x>A.
    Type: Application
    Filed: August 14, 2001
    Publication date: March 14, 2002
    Inventors: Shuji Miyasaka, Takeshi Fujita, Masahiro Sueyoshi, Akihisa Kawamura, Masaharu Matsumoto, Takashi Katayama, Kazutaka Abe, Kosuke Nishio
  • Patent number: 6356639
    Abstract: A sound image localization device which includes a signal source for outputting an audio signal, a signal divider for dividing the audio signal output from the signal source into two digital audio signals respectively for two channels, and a first signal processor for receiving one of the two digital signals and processing the digital signal so as to localize a virtual sound image using a filter having a first frequency characteristic. In addition, the sound image localization device includes a first D/A converter for converting the digital signal output from the first signal processor into an analog signal, a second D/A converter for receiving the other digital signal obtained from the signal divider and converting the signal into an analog signal, a first control speaker for outputting the audio signal obtained by the first D/A converter to a prescribed space area; and a second control speaker for outputting the audio signal obtained by the second D/A converter to a prescribed space area.
    Type: Grant
    Filed: April 10, 1998
    Date of Patent: March 12, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tsukuru Ishito, Masaharu Matsumoto, Shuji Miyasaka, Takeshi Fujita, Takashi Katayama, Masahiro Sueyoshi, Kazutaka Abe, Tsuyoshi Nakamura, Eiji Otomura, Akihisa Kawamura
  • Publication number: 20020026468
    Abstract: An exponent part extraction section extracts a bit series from the exponent part of an inputted floating point data. A mantissa part extraction section extracts the uppermost K bits from the mantissa part of the floating point data. A first conversion section inputs the output e from the exponent part extraction section and outputs the value of a function X(e) thereof. A second conversion section inputs the output f from the mantissa part extraction section and outputs the value of a function Y(f) thereof. A multiplier section multiplies together these values. By setting suitable tables in advance in the first and the second conversion sections, the calculation of the vˆ p for an item v of floating point data can be performed.
    Type: Application
    Filed: July 23, 2001
    Publication date: February 28, 2002
    Inventors: Shuji Miyasaka, Takeshi Norimatsu, Mineo Tsushima, Tomokazu Ishikawa, Yoshiaki Sawada