Abstract: A three-dimensional interlayer composite carpet that can be washed without deformation is provided in the present invention, which includes a surface layer, a three-dimensional interlayer, and an anti-slip layer. The three-dimensional interlayer is composed of an upper knitted fabric layer, a lower knitted fabric layer, and a composite filament connecting layer arranged vertically in the middle and connecting the upper layer and the lower layer. The three-dimensional interlayer composite carpet adopting a composite filament connecting structure of the present invention has strong supporting force and high extensibility, and can be repeatedly folded for more than 1000 times. The washing shrinkage of 10 washings does not exceed 2%, and the composite carpet will not be deformed under long-term squeezing, heat, and moisture.

Abstract: The invention provides a resistive memory with better area efficiency without degrading reliability, which includes an array area, word lines, a local bit line, source lines, and a shared bit line. In the array area, memory cells are arranged in a matrix, and each memory cells includes a variable resistance element and an accessing transistor. The word lines extend in a row direction of the array area and are connected to the memory cells in the row direction. The local bit line extends in a column direction of the array area. The source lines extend in the column direction and are connected to first electrodes of the memory cells in the column direction. The shared bit line is connected to the local bit line. The shared bit line extends in the row direction and is connected to second electrodes of the memory cells in the row direction.

Abstract: A semiconductor package includes a substrate, a stacked structure, an encapsulation material, a lid structure, and a coupler. The stacked structure is disposed over and bonded to the substrate. The encapsulation material partially encapsulates the stacked structure. The lid structure is disposed on the substrate, wherein the lid structure surrounds the stacked structure and covers a top surface of the stacked structure. The coupler is bonded to the stacked structure, wherein a portion of the coupler penetrates through and extends out of the lid structure.

Abstract: A memory storage device including a memory storage array and a memory controller is provided. The memory storage array is configured to store data. The memory controller is coupled to the memory storage array. The memory controller is configured to write to-be-written data to the memory storage array. The to-be-written data includes a plurality of data bits and a flip bit. The memory controller performs a verification operation on the to-be-written data to determine whether the data bits includes error bits and records information of the error bits. The memory controller, determines, according to a quantity of the error bits, whether to invert parities of the data bits and the flip bit, and records the parity of the flip bit. In addition, a data access method is also provided.

Abstract: The present disclosure provides systems and methods for monitoring an environment of a front opening universal pod (FOUP). The systems and methods may include an environmental sensor disposed within the FOUP and configured to measure one or more environmental parameters of an interior environment of the FOUP; and a wireless transmitter disposed within the FOUP and in communication with the environmental sensor, wherein the wireless transmitter is configured to wirelessly transmit the one or more environmental parameters from the environmental sensor to a controller disposed outside of the FOUP to decide whether the one or more environmental parameters are within threshold limits and receive a message according to a decision of whether the one or more environmental parameters are within the threshold limits from the controller.

Abstract: An interface control circuit includes an interface wrapper, a logic circuit, a multiplexer and a command decoder. The interface wrapper transceives a plurality of first signals in a first interface, converts the first signals to a plurality of second signals in a second interface, and generates at least one first command signal according to the first signals. The logic circuit receives the second signals, and generates a second command signal according to the second signals. The multiplexer receives the first command signal and the second command signal, and generates a third command signal according to the first command signal and the second command signal. The command decoder receives the third command signal and generates the decoded command according to the third command signal.

Abstract: A memory storage device including a memory storage array and a memory controller is provided. The memory storage array is configured to store data. The memory controller is coupled to the memory storage array. The memory controller is configured to write to-be-written data to the memory storage array. The to-be-written data includes a plurality of data bits and a flip bit. The memory controller performs a verification operation on the to-be-written data to determine whether the data bits includes error bits and records information of the error bits. The memory controller, determines, according to a quantity of the error bits, whether to invert parities of the data bits and the flip bit, and records the parity of the flip bit. In addition, a data access method is also provided.

Abstract: An electric vehicle charging system includes a charging station for receiving a charging command and a positioning signal and a charging trolley connected to the charging station and provided with a license plate recognition module. The charging trolley receives power from the charging station and charges the electric vehicle, wherein, after receiving the charging command and the positioning signal, the charging station controls the charging trolley to go to a parking space in which the electric vehicle is parked to charge the electric vehicle.

Abstract: A non-volatile memory device includes a first memory cell array, a first error correction code (ECC) decoder and a controller. The first memory cell array is divided into a first sub-array and a second sub-array by a first address boundary. The first ECC decoder is coupled to the first memory cell array, performs an ECC operation on read-out data from first memory cell array. The controller is coupled to the first memory cell array and the first ECC decoder, adjusts the first address boundary according to a first ECC failure bit number.

Abstract: The invention provides a data accessing method for a memory apparatus. The data accessing method includes: performing a reading operation on the memory apparatus based on an address information to obtain a codeword and an indicator, where the indicator corresponds to the codeword; enabling a first error correction code (ECC) operation or second ECC operation to be operated on the codeword for generating an error corrected data, wherein, the first ECC operation corrects less bits than the second ECC operation.

Abstract: Laser weldable compositions are provided which in various examples include a tricyclodecane dimethanol-modified copolymer, a terephthalate-type polyester and an inorganic filler. Compared with compositions without the tricyclodecane dimethanol-modified copolymer, the compositions of the invention have improved, uniform laser transmittance, thereby welded products including the compositions have improved bonding strength and require stronger tensile strength to be torn apart.

Abstract: An illumination system including an exciting light source module, a wavelength converter and an anisotropic diffusion element is provided. The exciting light source module is configured to emit an exciting beam. The wavelength converter is disposed on a transmission path of the exciting beam. The anisotropic diffusion element is disposed on the transmission path of the exciting beam and is located between the exciting light source module and the wavelength converter. The anisotropic diffusion element allows the passing exciting beam to expand in a light expanding direction, and the light expanding direction is substantially parallel to a fast axis of the exciting beam. A projection apparatus including the illumination system is also provided.

Abstract: A panoramic video processing method, a panoramic video processing device and a panoramic video system are provided. The panoramic video processing method includes the following steps. A plurality of shooting ranges of a plurality of cameras and a field of view (FOV) are received. An amount of stitches of a plurality of original images is calculated according to the shooting ranges and the field of view. An amount of a plurality of adjacent parts of the original images is corresponding to the amount of stitches. The adjacent parts of the original images are stitched to obtain a plurality of partial panoramic images.

Abstract: The disclosure is directed to a memory storage apparatus having a dynamic data repair mechanism. The memory storage apparatus includes a connection interface; a memory array; and a memory control circuit configured at least to: receive, from the connection interface, a write command which includes a user data and an address of the user data; encode the user data as a codeword which includes the user data and parity bits; write the codeword, in a first memory location of the memory array, as a written codeword; perform a read procedure of the written codeword to determine whether the written codeword is erroneously written; and store a redundant codeword of the user data in a second memory location in response to having determined that the written codeword is erroneously written.

Abstract: A memory device and a multiple cells error correction in a memory cell is provided. The memory device includes a plurality of memory cells and a memory control circuit. Each of the memory cells includes a first type physical cell and a second type physical cell. The memory control circuit is coupled to each of the memory cells. The memory control circuit writes a writing data into the first type physical cell and verifies the data stored in the first type physical cell is same as the writing data or not. The writing data is set and processed by performing a write operation. The memory control circuit writes the writing data into the second type physical cell when the data stored in the first type physical cell is not same as the writing data.

Abstract: An encoding method for a memory storage apparatus adopting an ECC algorithm is provided. The memory storage apparatus comprises an ECC encoder. The encoding method includes: receiving a write command comprising a write address and a write data; reading an existing codeword; attaching a flip bit to the write data; encoding the write data and the flip bit to generate parity bits based on the ECC algorithm by the ECC encoder and attaching the write data and the flip bit to the plurality of parity bits to generate a new codeword; flipping the new codeword based on a number of bits among selected bits required to be changed from the existing codeword to the new codeword; and writing one of the new codeword and the flipped new codeword to the write address. In addition, a memory storage apparatus using the encoding method is provided.

Abstract: A pixel array substrate including pixel units is provided. Each of the pixel units includes a thin film transistor, a first insulating layer disposed on the thin film transistor, a common electrode disposed on the first insulating layer, a second insulating layer covering the common electrode, and a pixel electrode disposed on the second insulating layer. The first insulating layer includes a first via. The common electrode includes an opening and connects to the first via. The second insulating layer includes a second via and connects to the opening and the first via. The pixel electrode connects to the thin film transistor through the second via, the opening and the first via. The first via has two first sides opposite to each other and the opening has two third sides opposite to each other are aligned. A fourth side of the opening is not connected to the first via and the second via.

Abstract: A polarization rotation device including a rotation shaft, a driving element, a polarization element and a reflective element is provided. The polarization element is disposed on a transmission path of the at least one excitation light beam. The reflective element is disposed on a side of the polarization element. The driving element drives the polarization element to sequentially rotate with the rotation shaft as a rotation center axis. When the polarization element rotates, the excitation light beam is transmitted to the polarization element and passes through the polarization element and is again transmitted to and passes through the polarization element by the reflective element. The excitation light beam outputting from the polarization rotation device has different polarization states at different time periods. A projection device applying the polarization rotation device of the invention achieves the effect of uniform color or brightness when displaying images in a 3D display mode.

Abstract: A charging system for electric vehicles is provided, which may include a charging circuit module, a spare battery and a controller. The charging circuit module may be coupled to a utility power source. The spare battery may be coupled to the charging circuit module. The controller may control the utility power source and the spare battery via the charging circuit module.

Abstract: The codeword accessing method including: receiving a write data with M message bits; generating parity information with N-M bits based on an error correction algorithm and the M message bits, where N and M are positive integers; transforming the M message bits and the parity information to a scrambled codeword with N bits by a scrambling operation, where the scrambled codeword contains only a part of the M message bits; and writing the scrambled codeword into a memory device.