Patents by Inventor Shun Chen

Shun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210204242
    Abstract: A method for estimating an position of wireless network equipment, including setting a wireless network transmission parameter, wherein the wireless network transmission parameter includes a transmitting power, a carrier frequency and a spreading factor index, which are used for performing an initial operation setting of wireless network; according to the wireless network transmission parameter, providing a path loss index and a reference distance for simulating an actual wireless network environment; selecting a noise power to simulate a signal state of a transmission path; and according to a field domain, setting a received power threshold to calculate a predetermined transmission distance of wireless network equipment erection.
    Type: Application
    Filed: March 26, 2020
    Publication date: July 1, 2021
    Applicant: I-SHOU UNIVERSITY
    Inventors: LAIN-CHYR HWANG, CHAO-SHUN CHEN, TE-TIEN KU, WEI-CHENG SHYU
  • Patent number: 11034035
    Abstract: A utility knife is provided, including: a first housing, a second housing, a blade carrier and a locking mechanism. The first housing includes a shaft disposed thereon and having an axis. The second housing is rotatably mounted to the shaft and includes a first engaging portion. The blade carrier is movably received between the first housing and the second housing, and is operable to move. The locking mechanism is disposed through the second housing and non-rotatable relative to the shaft. The locking mechanism is axially slidable between a locking position and a releasing position along the shaft and rotatable about the axis. When the locking mechanism is in the locking position, the second housing is non-rotatable relative to the first housing; when the locking mechanism is in the releasing position, the second housing is rotatable about the locking mechanism and rotatable relative to the first housing.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: June 15, 2021
    Assignee: Ming Shin Tools Co., Ltd.
    Inventor: Yung-Shun Chen
  • Publication number: 20210174871
    Abstract: A memory circuit includes a bias voltage generator, a drive circuit, and a resistive random-access memory (RRAM) device. The bias voltage generator includes a first transistor configured to generate a voltage difference based on a first current and an activation voltage, and is configured to output the activation voltage and a bias voltage based on the voltage difference. The drive circuit is configured to receive the bias voltage and output a drive voltage having a voltage level based on the bias voltage, and the RRAM device is configured to receive the activation voltage and conduct a second current responsive to the drive voltage and the activation voltage.
    Type: Application
    Filed: February 18, 2021
    Publication date: June 10, 2021
    Inventors: Chung-Cheng CHOU, Chien-An LAI, Hsu-Shun CHEN, Zheng-Jun LIN, Pei-Ling TSENG
  • Publication number: 20210154823
    Abstract: A ratchet wrench is provided, including: a main body and a handling assembly. The main body includes a head portion being assembled with a ratchet head and a handling portion remote from the head portion. The handling assembly includes a casing coveringly disposed on the handling portion, and the casing defines a receiving space which is configured to receive at least one object and has at least one opening disposed therethrough. Part of an outer surface of the handling portion is flush with or protrusive beyond the at least one opening, and a material of the handling portion is different from a material of the casing.
    Type: Application
    Filed: November 26, 2019
    Publication date: May 27, 2021
    Inventors: YUNG-SHUN CHEN, CHENG-CHOU WU
  • Patent number: 11010526
    Abstract: A semiconductor device includes a first active fin on a substrate; a second active fin on the substrate and separate from the first active fin; and a first fin stub on the substrate, wherein the first fin stub connects a first end of the first active fin and a first end of the second active fin, wherein the fin stub is lower than both the first and the second active fins in height, wherein from a top view the first active fin is oriented lengthwise in a first direction, and the first fin stub is oriented lengthwise in a second direction that is different from the first direction.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: May 18, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chung-Ming Wang, Chih-Hsiung Peng, Chi-Kang Chang, Kuei-Shun Chen, Shih-Chi Fu
  • Patent number: 11009882
    Abstract: The disclosure is related to a method and a system for obstacle detection adapted to a self-guiding machine. The method is performed in the system including a controller for driving the system, a light emitter, a light sensor, an image processor and a central processor. The light emitter and the light sensor are set apart at a distance. When the light emitter emits an indicator light being projected onto a path the self-guiding machine travels toward, the light sensor senses the indicator light. An image containing the indicator light is generated. After analyzing the image, at least one feature of the indicator light being sensed can be obtained and used to obtain a spatial relationship between the self-guiding machine and an obstacle. The spatial relationship allows the system to determine if the self-guiding machine will collide with a wall or fall from a cliff.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: May 18, 2021
    Assignee: PIXART IMAGING INC.
    Inventors: Kai-Shun Chen, Wei-Chung Wang
  • Patent number: 11003091
    Abstract: A method for exposing a wafer substrate includes forming a reticle having a device pattern. A relative orientation between the device pattern and a mask field of an exposure tool is determined based on mask field utilization. The reticle is loaded on the exposure tool. The wafer substrate is rotated based on an orientation of the device pattern. Radiation is projected through the reticle onto the rotated wafer substrate by the exposure tool, thereby imaging the device pattern onto the rotated wafer substrate.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: May 11, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsueh-Yi Chung, Yung-Cheng Chen, Fei-Gwo Tsai, Chi-Hung Liao, Shih-Chi Fu, Wei-Ti Hsu, Jui-Ping Chuang, Tzong-Sheng Chang, Kuei-Shun Chen, Meng-Wei Chen
  • Publication number: 20210118674
    Abstract: The present disclosure provides a method for semiconductor manufacturing in accordance with some embodiments. The method includes providing a substrate and a patterning layer over the substrate and forming a plurality of openings in the patterning layer. The substrate includes a plurality of features to receive a treatment process. The openings partially overlap with the features from a top view while a portion of the features remains covered by the patterning layer. Each of the openings is free of concave corners. The method further includes performing an opening expanding process to enlarge each of the openings and performing a treatment process to the features through the openings. After the opening expanding process, the openings fully overlap with the features from the top view.
    Type: Application
    Filed: December 7, 2020
    Publication date: April 22, 2021
    Inventors: Yu-Tien Shen, Ya-Wen Yeh, Wei-Liang Lin, Ya Chang, Yung-Sung Yen, Wei-Hao Wu, Li-Te Lin, Ru-Gun Liu, Kuei-Shun Chen
  • Patent number: 10985261
    Abstract: A structure and method for implementation of dummy gate structures within multi-gate device structures includes a semiconductor device including an isolation region that separates a first and second active region. The first active region is adjacent to a first side of the isolation region and the second active region is adjacent to a second side of the isolation region. A device including a source, a drain, and a gate is formed within the first active region. One of the source and drain regions are disposed adjacent to the isolation region. A dummy gate is formed at least partially over the isolation region and adjacent to the one of the source and drain regions. In various examples, the gate includes a first dielectric layer having a first thickness and the dummy gate includes a second dielectric layer having a second thickness greater than the first thickness.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: April 20, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Chu Liu, Kuei-Shun Chen, Chiang Mu-Chi, Chao-Cheng Chen
  • Patent number: 10965287
    Abstract: A replaceable key structure includes a key holder and a circuit board. The key holder is disposed above a circuit board. The key holder is formed with a mounting slot for selectively receiving a first key module or a second key module therein. A magnetic sensor and a contact connector are disposed on the circuit board positionally corresponding to the mounting slot of the key holder. The first key module has a shaft, and a magnetic element disposed on the bottom of the shaft. The magnetic sensor can output an analog signal when the magnetic element approaches. The second key module has a trigger switch which has two electrical terminals disposed on the bottom surface of the second key module. When the second key module is installed in the mounting slot, the electrical terminals can be electrically connected to the contact connector.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: March 30, 2021
    Assignees: DEXIN ELECTRONIC LTD., DEXIN CORPORATION
    Inventor: Yi-Shun Chen
  • Publication number: 20210089697
    Abstract: A method of manufacturing an integrated circuit (IC) includes receiving a layout of the IC having a first region interposed between two second regions. The layout includes a first layer having first features and second and third layer having second and third features in the first region. The second and third features collectively form cut patterns for the first features. The method further includes modifying the second and third features by a mask house tool, resulting in modified second and third features, which collectively form modified cut patterns for the first features. The modifying of the second and third features meets at least one of following conditions: total spacing between adjacent modified second (third) features is greater than total spacing between adjacent second (third) features, and total length of the modified second (third) features is smaller than total length of the second (third) features.
    Type: Application
    Filed: November 30, 2020
    Publication date: March 25, 2021
    Inventors: Yun-Lin Wu, Cheng-Cheng Kuo, Chia-Ping Chiang, Chih-Wei Hsu, Hua-Tai Lin, Kuei-Shun Chen, Yuan-Hsiang Lung, Yan-Tso Tsai
  • Fan
    Patent number: 10954956
    Abstract: A fan includes a fan frame, an impeller, and at least a supporting member. The fan frame includes a bottom plate and a cover plate spaced from the bottom plate. The bottom plate and the cover plate together define a first accommodating space. The cover plate has an air inlet disposed in an axial direction. A side of the fan frame is provided with at least an air outlet. The impeller is disposed in the first accommodating space and includes a hub and a plurality of blades. A cross-sectional area of the hub increases gradually along a direction from the cover plate to the bottom plate. The blades are disposed around the periphery of the hub. The supporting member is disposed between the bottom plate and the cover plate for supporting the cover plate.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: March 23, 2021
    Assignee: Delta Electronics, Inc.
    Inventors: Shun-Chen Chang, Po-Cheng Kung, Shih-Di Chen
  • Publication number: 20210071682
    Abstract: A centrifugal fan is provided and includes an impeller, a motor, a first case and a second case. The motor is connected with the impeller to drive the impeller to rotate. The first case and the second case are assembled to form an accommodation space for accommodating the impeller and the motor. The first case includes a first side, a first guiding wall, a flow inlet and a flow outlet. The flow inlet is disposed on the first side, the first guiding wall is connected with the first side, and the flow outlet and the flow inlet are located at a same side of the centrifugal fan. The second case includes a second side and a second guiding wall connected with the second side. The first guiding wall and the second guiding wall are assembled to form a flow guiding channel, which has cross-sectional areas with different sizes.
    Type: Application
    Filed: February 18, 2020
    Publication date: March 11, 2021
    Inventors: Chao-Fu Yang, Shao-Ning Lee, Chih-Chung Chen, Shun-Chen Chang, Kuo-Tung Hsu
  • Publication number: 20210071681
    Abstract: An impeller and a fan are provided. The impeller includes a hub, a plurality of first blades, a plurality of second blades and a connecting member. The plurality of first blades are disposed around the hub separately. Each first blade is connected with a periphery of the hub. The plurality of second blades are disposed around the hub separately. Each second blade is disposed away from the periphery of the hub and located between two adjacent first blades of the plurality of first blades. The connecting member is disposed around the hub and penetrated through the plurality of first blades and the plurality of second blades. The connecting member is not in contact with a first edge of any side of each first blade. The connecting member is not in contact with a second edge of any side of each second blade.
    Type: Application
    Filed: September 2, 2020
    Publication date: March 11, 2021
    Inventors: Kuo-Tung Hsu, Shun-Chen Chang, Chao-Fu Yang, Li-Han Hung
  • Publication number: 20210057231
    Abstract: A method includes forming a material layer over a substrate, forming a first hard mask (HM) layer over the material layer, forming a first trench, along a first direction, in the first HM layer. The method also includes forming first spacers along sidewalls of the first trench, forming a second trench in the first HM layer parallel to the first trench, by using the first spacers to guard the first trench. The method also includes etching the material layer through the first trench and the second trench, removing the first HM layer and the first spacers, forming a second HM layer over the material layer, forming a third trench in the second HM layer. The third trench extends along a second direction that is perpendicular to the first direction and overlaps with the first trench. The method also includes etching the material layer through the third trench.
    Type: Application
    Filed: October 26, 2020
    Publication date: February 25, 2021
    Inventors: Yung-Sung Yen, Chung-Ju Lee, Chun-Kuang Chen, Chia-Tien Wu, Ta-Ching Yu, Kuei-Shun Chen, Ru-Gun Liu, Shau-Lin Shue, Tsai-Sheng Gau, Yung-Hsu Wu
  • Patent number: 10930344
    Abstract: A memory circuit includes a bias voltage generator, a drive circuit, and a resistive random-access memory (RRAM) device. The bias voltage generator includes a first current path configured to receive a first current from a current source, and output a bias voltage based on a voltage difference generated from conduction of the first current in the first current path. The drive circuit is configured to receive the bias voltage and output a drive voltage having a voltage level based on the bias voltage, and the RRAM device is configured to conduct a second current responsive to the drive voltage.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: February 23, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chung-Cheng Chou, Hsu-Shun Chen, Chien-An Lai, Pei-Ling Tseng, Zheng-Jun Lin
  • Publication number: 20210039270
    Abstract: A utility knife is provided, including: a first housing, a second housing, a blade carrier and a locking mechanism. The first housing includes a shaft disposed thereon and having an axis. The second housing is rotatably mounted to the shaft and includes a first engaging portion. The blade carrier is movably received between the first housing and the second housing, and is operable to move. The locking mechanism is disposed through the second housing and non-rotatable relative to the shaft. The locking mechanism is axially slidable between a locking position and a releasing position along the shaft and rotatable about the axis. When the locking mechanism is in the locking position, the second housing is non-rotatable relative to the first housing; when the locking mechanism is in the releasing position, the second housing is rotatable about the locking mechanism and rotatable relative to the first housing.
    Type: Application
    Filed: August 9, 2019
    Publication date: February 11, 2021
    Inventor: YUNG-SHUN CHEN
  • Patent number: 10878160
    Abstract: An electronic design flow generates an electronic architectural design layout for analog circuitry from a schematic diagram. The electronic design flow assigns analog circuits of the schematic diagram to various categories of analog circuits. The electronic design flow places various analog standard cells corresponding to these categories of analog circuits into analog placement sites assigned to the analog circuits. These analog standard cells have a uniform cell height which allows these analog standard cells to be readily connected or merged to digital standard cells which decreases the area of the electronic architectural design layout. This uniformity in height between these analog standard cells additionally provides a more reliable yield when compared to non-uniform analog standard cells.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: December 29, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Ting Lu, Chih-Chiang Chang, Chung-Peng Hsieh, Chung-Chieh Yang, Yung-Chow Peng, Yung-Shun Chen, Tai-Yi Chen, Nai Chen Cheng
  • Patent number: D910410
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: February 16, 2021
    Assignee: MING SHIN TOOLS CO., LTD.
    Inventor: Yung-Shun Chen
  • Patent number: D922168
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: June 15, 2021
    Assignee: Ming Shin Tools Co., Ltd.
    Inventor: Yung-Shun Chen