Abstract: A radio frequency power amplifier and a device are disclosed. A first microstrip line and a second microstrip line are coupled, one end of the second microstrip line is an open stub and another end of the second microstrip line is grounded; and the first microstrip line having a first width is connected to a first transmission line having a second width which is wider than the first width. Therefore, some harmonic bands suppression can be implemented independently. Furthermore, the harmonic termination is independent and may not impact one or more fundamental components during matching a network. In addition, it may not take up more space and is sufficiently compact. Furthermore, sufficient wide harmonic response bandwidth can be provided.

Abstract: A method is disclosed, including the following operations: arranging a first gate structure extending continuously above a first active region and a second active region of a substrate; arranging a first separation spacer disposed on the first gate structure to isolate an electronic signal transmitted through a first gate via and a second gate via that are disposed on the first gate structure, in which the first gate via and the second gate via are arranged above the first active region and the second active region respectively; and arranging a first local interconnect between the first active region and the second active region, in which the first local interconnect is electrically coupled to a first contact disposed on the first active region and a second contact disposed on the second active region.

Abstract: A method includes generating a layout diagram of a cell of an integrated circuit (IC), and storing the generated layout diagram on a non-transitory computer-readable medium. In the generating the layout diagram of the cell, a first active region is arranged inside a boundary of the cell. The first active region extends along a first direction. At least one gate region is arranged inside the boundary. The at least one gate region extends across the first active region along a second direction transverse to the first direction. A first conductive region is arranged to overlap the first active region and a first edge of the boundary. The first conductive region is configured to form an electrical connection to the first active region.

Abstract: In accordance with an embodiment, described herein is a system and method for implementing a distributed ledger a blockchain cloud service. The blockchain cloud service can include nodes of the distributed ledger and a management console component. The management console component can include a web application running in a script runtime environment, a plurality of backend of APIs for communicating with various nodes of the blockchain cloud service, and a plurality of client APIs configured to be invoked by a client application. The plurality of client APIs uses one or more of the plurality of backend APIs in provisioning the distributed ledger as a blockchain cloud service, and in managing the managing the blockchain cloud service.

Abstract: In accordance with an embodiment, described herein is a system and method for implementing a distributed ledger a blockchain cloud service. The blockchain cloud service can include nodes of the distributed ledger and a management console component. The management console component can include a web application running in a script runtime environment, a plurality of backend of APIs for communicating with various nodes of the blockchain cloud service, and a plurality of client APIs configured to be invoked by a client application. The plurality of client APIs uses one or more of the plurality of backend APIs in provisioning the distributed ledger as a blockchain cloud service, and in managing the managing the blockchain cloud service.

Abstract: A transmitter circuit applicable to a digital isolator is provided, adapted to receive a data input signal and coupled to an isolation barrier, developing a receiver input signal to a receiver circuit for generating a data output signal. The transmitter circuit generates a transmitter output signal in response to a rising edge and falling edge of the data input signal, and includes a rising and falling converter for outputting a converted data input signal according to the rising edge and falling edge of the data input signal, a delay and logic unit for receiving the converted data input signal and generating a carrier signal, and an AND gate receiving the converted data input signal and the carrier signal, and outputting the transmitter output signal. Since a number of pulses of the carrier signal is limited and definite, the present invention achieves to reduce power consumption and electromagnetic interferences effectively.

Abstract: A semiconductor device includes a gate electrode extending in a first direction in a first layer over an active region, a first conductive line extending in the first layer adjacent to the gate electrode, a first power rail extending in a second direction perpendicular to the first direction in a second layer over the first layer, a second conductive line arranged in a third layer over the second layer, and a conductive via extending through the first power rail and electrically connecting the second conductive line to one of the gate electrode and the first conductive line. The conductive via is electrically insulated from the first power rail.

Abstract: A digital isolator module with pulse carrier modulation is provided, comprising an isolation barrier, operable to develop an isolated output signal in response to an input signal, a transmitter circuit adapted to receive a data input signal and coupled to the isolation barrier, and a receiver circuit coupled to the isolation barrier to receive the isolated output signal and generate a data output signal. The transmitter circuit is adapted to be operable to generate a transmitter output signal in response to the data input signal, and the transmitter output signal comprises different number of pulse carrier respectively responsive to a rising edge and a falling edge of the data input signal. By employing the proposed pulse carrier modulation of the present invention, it has been verified to reduce channel numbers, IC power consumption and electromagnetic interferences. In addition, jitter disturbances can be avoided and solved effectively.

Abstract: A cell on an integrated circuit is provided. The cell includes: a fin structure; an intermediate fin structure connection metal track disposed in an intermediate fin structure connection metal layer above the fin structure, the intermediate fin structure connection metal track being connected to the fin structure; and a first intermediate gate connection metal track disposed in an intermediate gate connection metal layer above the intermediate fin structure connection metal layer, the first intermediate gate connection metal track being connected to the intermediate fin structure connection metal track. A first power supply terminal is connected to the first intermediate gate connection metal track.

Abstract: Molecular-beam epitaxy (MBE) and more particularly suboxide MBE (S-MBE) and related structures are disclosed. S-MBE is disclosed that includes the use of a molecular beam of a suboxide that may be subsequently oxidized in a single step reaction to form an oxide film. By way of example, for a gallium oxide (Ga2O3) film, a molecular beam including a suboxide of gallium (Ga2O) may be provided. S-MBE may be performed in adsorption-controlled regimes where there is an excess of source material containing species in order to promote high growth rates for oxide films with improved crystallinity. Source mixtures for providing molecular beams of suboxides are disclosed that include mixtures of a particular element and an oxide of the element in ratios that promote such adsorption-controlled growth regimes. Related structures include oxide films having increased thickness with reduced crystal defects, including single polymorph films of gallium oxide.

Abstract: The present disclosure provides fusion proteins that specifically inhibit transforming growth factor-? (TGF-?) signaling in CD4+ helper T cells, and engineered CD4+ helper T cells that are deficient in TGF-? signaling, to counteract tumor-induced immune tolerance and promote anti-tumor immunity. The fusion proteins and engineered CD4+ helper T cells of the present technology are useful in methods for treating cancer, and enhancing the efficacy of other therapeutic agents against refractory cancer cells.

Abstract: A bicycle cassette with increased tooth ratio includes a driver body connected to a bicycle rear hub, and multiple cogs which are sequentially mounted to the driver body with equal spacing. An additional cog is mounted to the driver body and located opposite to the rear hub. The additional cog has 8-10 teeth. The tooth ratio is increased by the additional cog and the chainring to break through the limitation of tooth ratio of existing bicycle cassettes, and to increase the number of the gears of the bicycle cassette.

Abstract: A saturation clustering-based method for positioning bone marrow white blood cells: first, pre-processing a bone marrow white blood cell image to eliminate partial noise points and simultaneously smooth the image; using K-means clustering to cluster saturation channels of the bone marrow white blood cell image, and select the type of the white blood cells according to a decision tree algorithm; next, eliminating irrelevant areas in a binary image of the white blood cells by means of a morphology processing algorithm, and simultaneously filling in point holes in the white blood cells; and finally, positioning the white blood cells. The present method is simple and effective, and is suitable for a wide range of applications compared to existing threshold-based algorithms, while rendering a final result more accurate by integrating the decision tree algorithm.

Abstract: The present invention relates to a sacubitril intermediate and a preparation method thereof. The sacubitril intermediate disclosed herein can be prepared by a deprotection reaction of a compound. In addition, the intermediate can be used as a raw material to synthesize sacubitril.

Abstract: The present disclosure provides techniques for presenting information associated with bullet screens. The techniques comprise receiving trigger information comprising information of identifying a bullet screen and information of identifying a user who performed a trigger event for the bullet screen; determining a list of jump links associated with the bullet screen based on the information of identifying the bullet screen; determining a tag associated with the user based on the information of identifying the user; selecting a target jump link from the list of jump links based on the tag associated with the user; and transmitting information associated with the bullet screen and comprising the target jump link for display of at least one part of the information in a preset area associated with the bullet screen.

Abstract: A semiconductor cell structure includes four pairs of conductive segments, a first gate-strip, and a second gate-strip. A first conductive segment is configured to have a first supply voltage, and a second conductive segment is configured to have a second supply voltage. Each of the first gate-strip and the second gate-strip intersects an active zone over a channel region of a transistor. The first gate-strip is conductively connected to the second conductive segment. The semiconductor cell structure also includes a first dummy gate-strip and a second dummy gate-strip. The first dummy gate-strip separates from the first gate-strip by one CPP. The second dummy gate-strip separates from the second gate-strip by one CPP. The first gate-strip and the second gate-strip are separated from each other by two CPPs. The dummy gate-strip and the second dummy gate-strip are separated from each other by four CPPs.

Abstract: A method of forming a memory device includes forming a first electrode; forming a resistive switching layer over the first electrode; forming a dielectric layer over the resistive switching layer; forming a first opening in the dielectric layer, wherein the first opening passes through the dielectric layer and exposes the resistive switching layer; forming a first trench in the dielectric layer, wherein the first trench is directly above the first opening; and forming a second electrode having a step shape in the first opening and the first trench.

Abstract: A cell on an integrated circuit is provided. The cell includes: a fin structure; an intermediate fin structure connection metal track disposed in an intermediate fin structure connection metal layer above the fin structure, the intermediate fin structure connection metal track being connected to the fin structure; and a first intermediate gate connection metal track disposed in an intermediate gate connection metal layer above the intermediate fin structure connection metal layer, the first intermediate gate connection metal track being connected to the intermediate fin structure connection metal track. A first power supply terminal is connected to the first intermediate gate connection metal track.

Abstract: Molecular-beam epitaxy (MBE) and more particularly suboxide MBE (S-MBE) and related structures are disclosed. S-MBE is disclosed that includes the use of a molecular beam of a suboxide that may be subsequently oxidized in a single step reaction to form an oxide film. By way of example, for a gallium oxide (Ga2O3) film, a molecular beam including a suboxide of gallium (Ga2O) may be provided. S-MBE may be performed in adsorption-controlled regimes where there is an excess of source material containing species in order to promote high growth rates for oxide films with improved crystallinity. Source mixtures for providing molecular beams of suboxides are disclosed that include mixtures of a particular element and an oxide of the element in ratios that promote such adsorption-controlled growth regimes. Related structures include oxide films having increased thickness with reduced crystal defects, including single polymorph films of gallium oxide.

Abstract: A cell on an integrated circuit is provided. The cell includes: a fin structure; an intermediate fin structure connection metal track disposed in an intermediate fin structure connection metal layer above the fin structure, the intermediate fin structure connection metal track being connected to the fin structure; and a first intermediate gate connection metal track disposed in an intermediate gate connection metal layer above the intermediate fin structure connection metal layer, the first intermediate gate connection metal track being connected to the intermediate fin structure connection metal track. A first power supply terminal is connected to the first intermediate gate connection metal track.