Patents by Inventor Shun Li

Shun Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10964045
    Abstract: It is desired to provide technology that enables automatic measurement of the size of a subject with a reduced number of frames of images required, relaxed restrictions on the coverage and light projection, and no limitation on the shape of the subject. Provided is an information processing device including: a depth information acquiring unit configured to acquire depth information; a data conversion unit configured to convert the depth information into three-dimensional data; a subject extraction unit configured to extract a subject area where a subject is present on the basis of the three-dimensional data; and a size measurement unit configured to measure a size of the subject on the basis of the subject area, in which the size measurement unit detects six planes circumscribing the subject area and measures the size of the subject on the basis of the six planes.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: March 30, 2021
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hiroaki Ono, Tomonori Masuno, Shun Li
  • Patent number: 10963322
    Abstract: The present disclosure relates to the technical field of computers, and particularly relates to a data sharing method and an apparatus, and an electronic device. The method is applied to a mobile terminal. A display screen of the mobile terminal is a bendable display screen. The method includes determining a first application and a second application in the display screen; and in a case that it is detected that the display screen is bent, sharing the first data information of the first application to the second application.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: March 30, 2021
    Assignees: GREE ELECTRIC APPLIANCES (WUHAN) CO., LTD, GREE ELECTRIC APPLIANCES, INC. OF ZHUHAI
    Inventors: Jie Liu, Linlin Diao, Shun Li, Biao Xiang
  • Publication number: 20210091066
    Abstract: A method for forming a semiconductor device includes: forming a fin structure protruding from a substrate of the semiconductor device; forming a first conductive rail on the substrate, wherein a side of the first conductive rail facing the fin structure has a first recess and a second recess; forming a first conductive line in a same layer as the first conductive rail by filling a first conductive material into the first recess, wherein the first conductive line extends across the fin structure and wraps a portion of the fin structure; and forming a second conductive line in the same layer as the first conductive rail by filling a second conductive material into the second recess, wherein the second conductive line extends across the fin structure and contacts another portion of the fin structure.
    Type: Application
    Filed: December 9, 2020
    Publication date: March 25, 2021
    Inventors: SHUN-LI CHEN, CHUNG-TE LIN, HUI-ZHONG ZHUANG, PIN-DAI SUE, JUNG-CHAN YANG
  • Publication number: 20210082903
    Abstract: A method is disclosed, including the following operations: arranging a first gate structure extending continuously above a first active region and a second active region of a substrate; arranging a first separation spacer disposed on the first gate structure to isolate an electronic signal transmitted through a first gate via and a second gate via that are disposed on the first gate structure, in which the first gate via and the second gate via are arranged above the first active region and the second active region respectively; and arranging a first local interconnect between the first active region and the second active region, in which the first local interconnect is electrically coupled to a first contact disposed on the first active region and a second contact disposed on the second active region.
    Type: Application
    Filed: November 6, 2020
    Publication date: March 18, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Charles Chew-Yuen YOUNG, Chih-Liang CHEN, Chih-Ming LAI, Jiann-Tyng TZENG, Shun-Li CHEN, Kam-Tou SIO, Shih-Wei PENG, Chun-Kuang CHEN, Ru-Gun LIU
  • Publication number: 20210066182
    Abstract: Examples of an integrated circuit a having an advanced two-dimensional (2D) metal connection with metal cut and methods of fabricating the same are provided. An example method for fabricating a conductive interconnection layer of an integrated circuit may include: patterning a conductive connector portion on the conductive interconnection layer of the integrated circuit using extreme ultraviolet (EUV) lithography, wherein the conductive connector portion is patterned to extend across multiple semiconductor structures in a different layer of the integrated circuit; and cutting the conductive connector portion into a plurality of conductive connector sections, wherein the conductive connector portion is cut by removing conductive material from the metal connector portion at one or more locations between the semiconductor structures.
    Type: Application
    Filed: November 16, 2020
    Publication date: March 4, 2021
    Inventors: Chih-Liang Chen, Cheng-Chi Chuang, Chih-Ming Lai, Chia-Tien Wu, Charles Chew-Yuen Young, Hui-Ting Yang, Jiann-Tyng Tzeng, Kam-Tou Sio, Ru-Gun Liu, Shun Li Chen, Shih-Wei Peng, Tien-Lu Lin
  • Publication number: 20210056249
    Abstract: A semiconductor cell structure includes four transistors, two gate-strips, four pairs of conductive segments, and a plurality of horizontal routing lines. Each of the two gate-strips intersects a first-type active zone and a second-type active zone. A first conductive segment is configured to have a first supply voltage. A second conductive segment is configured to have a second supply voltage. The first gate-strip is conductively connected to the second conductive segment. Each of the horizontal routing lines intersects one or more conductive segments over one or more corresponding intersections while conductively isolated from the one or more conductive segments at each of the one or more corresponding intersections.
    Type: Application
    Filed: October 27, 2020
    Publication date: February 25, 2021
    Inventors: Shun Li CHEN, Li-Chun TIEN, Ting Yu CHEN, Wei-Ling CHANG
  • Patent number: 10930406
    Abstract: Disclosed is a liquid-phase oxidative decomposition method for radioactively contaminated carbonaceous material, providing a method of oxidizing carbon into a gas in liquid phase to treat radioactively contaminated carbonaceous material. The method comprises the following steps: ball milling a mixture of a molybdenum-containing substance and a carbonaceous material, thermally treating the ball milled mixture, and performing liquid-phase oxidation of the thermally treated mixture. The thermal treatment causes carbon to enter space between molybdenum atoms so as to reduce the particle size of carbon and improve the chemical reactivity of carbon, and an oxidant is then used to oxidize the carbon in the space between molybdenum atoms into a gas in liquid phase, while the molybdenum-containing moiety is converted into a water-soluble substance.
    Type: Grant
    Filed: November 23, 2018
    Date of Patent: February 23, 2021
    Assignee: Institute of Materials, China Academy of Engineering Physics
    Inventors: Min Pang, Peilun Sang, Ning Zeng, Qingkai Zhao, Shun Li
  • Publication number: 20210004640
    Abstract: A saturation clustering-based method for positioning bone marrow white blood cells: first, pre-processing a bone marrow white blood cell image to eliminate partial noise points and simultaneously smooth the image; using K-means clustering to cluster saturation channels of the bone marrow white blood cell image, and select the type of the white blood cells according to a decision tree algorithm; next, eliminating irrelevant areas in a binary image of the white blood cells by means of a morphology processing algorithm, and simultaneously filling in point holes in the white blood cells; and finally, positioning the white blood cells. The present method is simple and effective, and is suitable for a wide range of applications compared to existing threshold-based algorithms, while rendering a final result more accurate by integrating the decision tree algorithm.
    Type: Application
    Filed: May 22, 2019
    Publication date: January 7, 2021
    Inventors: Fengqi Fang, Qiang Li, Ju Lu, Shun Li, Yongtao Liu, Jiajia Hu, Zhen Huang
  • Publication number: 20200403156
    Abstract: A method of forming a memory device includes forming a first electrode; forming a resistive switching layer over the first electrode; forming a dielectric layer over the resistive switching layer; forming a first opening in the dielectric layer, wherein the first opening passes through the dielectric layer and exposes the resistive switching layer; forming a first trench in the dielectric layer, wherein the first trench is directly above the first opening; and forming a second electrode having a step shape in the first opening and the first trench.
    Type: Application
    Filed: November 26, 2019
    Publication date: December 24, 2020
    Inventor: Shun-Li LAN
  • Publication number: 20200401578
    Abstract: In accordance with an embodiment, described herein is a system and method for implementing a distributed ledger a blockchain cloud service. The blockchain cloud service can include nodes of the distributed ledger and a management console component. The management console component can include a web application running in a script runtime environment, a plurality of backend of APIs for communicating with various nodes of the blockchain cloud service, and a plurality of client APIs configured to be invoked by a client application. The plurality of client APIs uses one or more of the plurality of backend APIs in provisioning the distributed ledger as a blockchain cloud service, and in managing the managing the blockchain cloud service.
    Type: Application
    Filed: August 31, 2020
    Publication date: December 24, 2020
    Inventors: Pierce Shi, Jared Li, Shi Xiang Zhou, Weiguo Zhu, Sheng Zhu, Shun Li, Jim Jin, Todd Little
  • Patent number: 10867114
    Abstract: An integrated circuit (IC) structure includes a first active region, a second active region, a first multi-gate structure, a first rail and a second rail. The first active region and the second active region extend in a first direction and are located at a first level. The second active region is separated from the first active region in a second direction. The first multi-gate structure extends in the second direction, overlaps the first active region and the second active region, and is located at a second level different from the first level. The first rail extends in the first direction, overlaps a portion of the first active region, supplies a first supply voltage, and is located at a third level. The second rail extends in the first direction, is located at the third level, is separated from the first rail in the second direction, and supplies a second supply voltage.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hui-Zhong Zhuang, Ting-Wei Chiang, Lee-Chung Lu, Li-Chun Tien, Shun Li Chen
  • Patent number: 10867986
    Abstract: A semiconductor device includes a fin structure, a first conductive line, a second conductive line and a first conductive rail. The fin structure is disposed on a substrate. The first conductive line is arranged to wrap a first portion of the fin structure. The second conductive line is attached on a second portion of the fin structure. The second portion is different from the first portion. The first conductive rail is disposed in a same layer as the first conductive line and the second conductive line on the substrate. The first conductive rail is attached on one end of the first conductive line and one end of the second conductive line for electrically connecting the first conductive line and the second conductive line.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Shun-Li Chen, Chung-Te Lin, Hui-Zhong Zhuang, Pin-Dai Sue, Jung-Chan Yang
  • Publication number: 20200379779
    Abstract: This application provides a program operating method and a related apparatus. The method includes obtaining first operating data of the program from a server, the first operating data comprising at least an instruction for starting the program; executing the first operating data, and displaying a first page of the program according to the first operating data; determining, in response to a second triggering instruction of a control in the first page, a second page identifier corresponding to the control; obtaining second operating data from the server according to the second page identifier if operating data corresponding to the second page identifier is not in the first operating data, the second operating data comprising the operating data corresponding to the second page identifier; and executing the second operating data, and displaying a second page according to the second operating data, the second operating data comprising portions of the program.
    Type: Application
    Filed: August 18, 2020
    Publication date: December 3, 2020
    Inventors: Zhaopeng LIANG, Shangtao LIANG, Shun LI, Xing LIN, Chao LIN, Canhui HUANG, Xuyu GUI, Haojun HU, Yihong YANG, Weibang LUO, Yaxuan LI, Zhe CHENG, Qingjie LIN, Yu WU, Taotao XIAO
  • Patent number: 10851438
    Abstract: Oxide dispersion-strengthened alloy (ODS), lead-free and free-cutting brass and producing method thereof. The mass percent of components in the brass are: 52.0%-90.0% of copper, 0.001%-0.99% of phosphorus, 0.15%-0.70% of tin, 0.25%-3.0% of manganese, 0.15%-0.90% of aluminum, 0.10%-1.5% of nickel, 0.191%-0.90% of oxygen, and 0.06%-0.80% of carbon, the ratio of aluminum to oxygen not exceeding 27:24, with the balance being zinc and inevitable impurities, wherein lead is not more than 0.08%. The brass is produced by a powder metallurgy method: brass powder, copper oxide powder, and graphite micro powder are mixed evenly; 0.001%-1.5% of a forming agent is added and mixed evenly with the mixture; and then molded by compression, and sintering are performed before post-treatment.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: December 1, 2020
    Assignee: Hunan Terry New Materials Company Ltd.
    Inventors: Jinsong Huang, Xin Jin, Wei Li, Bin Liu, Zhongling Zhang, Shun Li, Ziyang Gan
  • Patent number: 10846458
    Abstract: A semiconductor cell structure includes four transistors, two gate-strips, four pairs of conductive segments, and a plurality of horizontal routing lines. Each of the two gate-strips intersects a first-type active zone and a second-type active zone. A first conductive segment is configured to have a first supply voltage. A second conductive segment is configured to have a second supply voltage. The first gate-strip is conductively connected to the second conductive segment. Each of the horizontal routing lines intersects one or more conductive segments over one or more corresponding intersections while conductively isolated from the one or more conductive segments at each of the one or more corresponding intersections.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: November 24, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Shun Li Chen, Li-Chun Tien, Ting Yu Chen, Wei-Ling Chang
  • Patent number: 10847460
    Abstract: Examples of an integrated circuit a having an advanced two-dimensional (2D) metal connection with metal cut and methods of fabricating the same are provided. An example method for fabricating a conductive interconnection layer of an integrated circuit may include: patterning a conductive connector portion on the conductive interconnection layer of the integrated circuit using extreme ultraviolet (EUV) lithography, wherein the conductive connector portion is patterned to extend across multiple semiconductor structures in a different layer of the integrated circuit; and cutting the conductive connector portion into a plurality of conductive connector sections, wherein the conductive connector portion is cut by removing conductive material from the metal connector portion at one or more locations between the semiconductor structures.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: November 24, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chih-Liang Chen, Cheng-Chi Chuang, Chih-Ming Lai, Chia-Tien Wu, Charles Chew-Yuen Young, Hui-Ting Yang, Jiann-Tyng Tzeng, Kam-Tou Sio, Ru-Gun Liu, Shun Li Chen, Shih-Wei Peng, Tien-Lu Lin
  • Patent number: 10833061
    Abstract: Gate structures extending continuously above a first active region, a second active region and a non-active region of a substrate of a semiconductor structure are arranged. At least one local interconnect over the non-active region and between two of the gate structures is selectively arranged, to couple at least one of contacts that is arranged above the first active region to at least one of the contacts that is arranged above the second active region.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: November 10, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Charles Chew-Yuen Young, Chih-Liang Chen, Chih-Ming Lai, Jiann-Tyng Tzeng, Shun-Li Chen, Kam-Tou Sio, Shih-Wei Peng, Chun-Kuang Chen, Ru-Gun Liu
  • Publication number: 20200341823
    Abstract: The present disclosure relates to the technical field of computers, and particularly relates to a data sharing method and an apparatus, and an electronic device. The method is applied to a mobile terminal. A display screen of the mobile terminal is a bendable display screen. The method includes determining a first application and a second application in the display screen; and in a case that it is detected that the display screen is bent, sharing the first data information of the first application to the second application.
    Type: Application
    Filed: June 22, 2018
    Publication date: October 29, 2020
    Inventors: Jie LIU, Linlin DIAO, Shun LI, Biao XIANG
  • Patent number: 10796060
    Abstract: A computer readable storage medium encoded with program instructions, wherein, when the program instructions is executed by at least one processor, the at least one processor performs a method. The method includes selecting a cell, determining whether a pin has an area smaller than a predetermined area, allowing a pin access of the pin to extend in a corresponding patterning track of the pin access when the pin access when the pin is determined to be having an area smaller than the predetermined threshold, and causing an integrated circuit to be fabricated according to the pin.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: October 6, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Fong-Yuan Chang, Li-Chun Tien, Shun-Li Chen, Ya-Chi Chou, Ting-Wei Chiang, Po-Hsiang Huang
  • Patent number: D909432
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: February 2, 2021
    Inventors: Chenxiang Xu, Shun Li