Patents by Inventor Shun Zhang

Shun Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210358420
    Abstract: A display panel, a manufacture method thereof and a display device are provided. The display panel includes multiple subpixel zones and a reset signal line pattern, an initialization signal line pattern and a conductive connecting part pattern in each of the subpixel zones. The initialization signal line pattern includes a first body portion and a first protruding portion coupled to each other. The orthographic projection of the first body portion onto the base is between the orthographic projection of the first protruding portion onto the base and the orthographic projection of the reset signal line pattern onto the base. The orthographic projection of a first end portion of the conductive connecting part pattern onto the base and the orthographic projection of the first protruding portion onto the base have a first overlapped region.
    Type: Application
    Filed: March 25, 2020
    Publication date: November 18, 2021
    Inventors: Huijuan YANG, Tingliang LIU, Xiaofeng JIANG, Huijun LI, Shun ZHANG, Yu WANG, Jie DAI
  • Patent number: 11172868
    Abstract: A system and method to screen for malignant gliomas, other brain tumors, and brain injuries use disturbance coefficient, differential impedances, and artificial neural networks. The system uses prescribed excitation signals with several system configurations to measure the differential impedances, calculate harmonic responses and nonlinearity of brain tissue, and estimate the disturbance coefficient that indicates the likelihood of malignant gliomas, other brain tumors, and brain injuries. The disturbance coefficient is a weighted sum of many parameters such as receiving differential impedances, transmission differential impedances, harmonic responses, frequency dispersion, and nonlinear responses using different system configurations and different excitation signals. The method includes arranging the transmitters, receivers, and transmission lines to maximize the sensitivity of detecting brain tissue condition.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: November 16, 2021
    Inventors: Yi Zheng, Anna Zheng, Qi Wu, Hui Jiang, Shun Zhang, Weining Hu
  • Patent number: 11164929
    Abstract: A display substrate, a method of forming the same and a display device are provided. The display substrate includes: a base substrate, and a light shielding layer, a first insulating layer, a first metal layer, a second insulating layer and a light emitting device stacked in sequence on the base substrate; where the second insulating layer has a first groove and a second groove, and a portion of the second insulating layer between the first groove and the second groove forms a barrier structure; the first groove is at a side of the barrier structure adjacent to the light emitting device with respect to the second groove; the first metal layer includes a signal line at a side of the first groove away from the barrier structure and a connection terminal at a side of the second groove away from the barrier structure; the light shielding layer includes a connection lead through which the signal line and the connection terminal are electrically connected.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: November 2, 2021
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Bo Cheng, Shun Zhang, Yang Zhou
  • Publication number: 20210336068
    Abstract: A thin film transistor is provided. The thin film transistor includes a base substrate; a first target layer on the base substrate; a first insulating layer on a side of the first target layer away from the base substrate; an intermediate layer on a side of the first insulating layer away from the first target layer; a second insulating layer on a side of the intermediate layer away from the first insulating layer; and a second target layer on a side of the second insulating layer away from the intermediate layer. The first target layer is electrically connected to the second target layer. The intermediate layer is one of a gate electrode and an active layer, and the first target layer and the second target layer together constitute another one of the gate electrode and the active layer.
    Type: Application
    Filed: May 5, 2019
    Publication date: October 28, 2021
    Applicants: BOE Technology Group Co., Ltd., Chengdu BOE Optoelectronics Technology Co., Ltd.
    Inventors: Shun Zhang, Bo Cheng, Kai Zhang
  • Publication number: 20210320156
    Abstract: A display substrate and a display device are provided. The display substrate includes sub-pixels including a light emitting element and a pixel circuit, the light emitting element includes a second electrode including a main body electrode. The sub-pixels include a first color sub-pixel which includes a first connecting portion. In the first color sub-pixel, the connecting electrode is connected with the first connecting portion through a first via hole, and the first connecting portion is electrically connected with the pixel circuit through a first connecting hole; and the first via hole and the first connecting hole are not overlapped with the main body electrode, and orthographic projections of the first via hole and the first connection hole on a first straight line extending in an extension direction of the data line are overlapped.
    Type: Application
    Filed: July 31, 2020
    Publication date: October 14, 2021
    Inventors: Tinghua SHANG, Yang ZHOU, Shun ZHANG, Huijuan YANG, Yi ZHANG, Ling SHI, Yao HUANG
  • Publication number: 20210312869
    Abstract: The present disclosure provides a display substrate, a manufacturing method and a display device. The display substrate comprises a scan driving circuit and a display area, wherein the scan driving circuit comprises a plurality of shift register units, a first voltage signal line, a second voltage signal line, a first clock signal line, and a second clock signal line, all of which extend in a first direction; and the display area comprises at least one driving transistor configured to drive a light-emitting element for display. At least one of the plurality of shift register units comprises an output circuit and a signal output line, wherein the output circuit is coupled to the first voltage signal line, the second voltage signal line, and the signal output line, and the signal output line extends in a second direction intersecting the first direction. The output circuit comprises a transistor that is provided between the first voltage signal line and the second voltage signal line.
    Type: Application
    Filed: March 16, 2020
    Publication date: October 7, 2021
    Inventors: Jie DAI, Pengfei YU, Shun ZHANG, Lu BAI, Siyu WANG, Mengqi WANG, Hao ZHANG
  • Publication number: 20210276827
    Abstract: The present disclosure provides an elevator control method, apparatus, electronic device, storage medium and system, which relate to artificial intelligence technology. The method includes: obtaining a user instruction, where the user instruction is determined by a speech device based on a user's speech content; recognizing the user instruction and converting the user instruction into an elevator control instruction; and controlling an elevator via the elevator control instruction. The elevator control method provided by the present disclosure enables the user to control the elevator through the speech device without touching the elevator, and thereby reducing potential safety risk caused by multiple people touching the elevator.
    Type: Application
    Filed: September 29, 2020
    Publication date: September 9, 2021
    Applicant: BAIDU ONLINE NETWORK TECHNOLOGY (BEIJING) CO., LTD.
    Inventors: Shiyu LI, Quan WEN, Haifeng WANG, Daoping SUN, Shun ZHANG, Xiaogang WANG, Wenwen LIU, Yan HONG, Fei LONG
  • Patent number: 11094765
    Abstract: The present disclosure relates to an array substrate, manufacturing method thereof, and a display panel. The array substrate includes a substrate, at least a first top gate TFT and at least a first bottom gate TFT disposed on the substrate and located in each sub-pixel region; a gate of the first top gate TFT and a gate of the first bottom gate TFT are formed in a same layer with same material, an active layer pattern of the first top gate TFT and an active layer pattern of the first bottom gate TFT are respectively arranged on two sides of the gate, and orthographic projections of the active layer pattern of the first top gate TFT and the active layer pattern of the first bottom gate TFT on the substrate are spaced from each other in a first direction.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: August 17, 2021
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Shun Zhang, Linhong Han, Yang Zhou, Mengmeng Du, Yue Teng
  • Publication number: 20210193745
    Abstract: The present disclosure provides a display substrate, including: a display area having a contour, at least a portion of the contour having a curved shape, the display area being divided into a plurality of sub-display areas, at least one of the sub-display areas close to an edge of the display area having a contour conformal to the contour of the display area. The at least one sub-display area includes a plurality of sub-pixels arranged therein along an extending direction of the contour of the sub-display area.
    Type: Application
    Filed: August 30, 2019
    Publication date: June 24, 2021
    Inventors: Shun ZHANG, Tingliang LIU, Yonglin GUO
  • Publication number: 20210167164
    Abstract: A display substrate includes: a base substrate having a display area and a peripheral area surrounding the display area; an electroluminescent device disposed on the base substrate and located in the display area, the electroluminescent device including an anode, an electroluminescent layer, and a cathode disposed in this order on the base substrate; a negative power line disposed on the base substrate and located in the peripheral area, the negative power line extending along a side of the base substrate and being electrically connected to the cathode; and an insulating layer between the base substrate and the negative power line, a side of the insulating layer close to the negative power line being provided with at least a trench. The trench is located in the peripheral area and extends in an extending direction of the negative power line, a part of the negative power line being located in the trench.
    Type: Application
    Filed: August 22, 2019
    Publication date: June 3, 2021
    Inventors: Shun Zhang, Yonglin Guo, Yuan Yao
  • Publication number: 20210142044
    Abstract: A facial recognition method using online sparse learning includes initializing target position and scale, extracting positive and negative samples, and extracting high-dimensional Haar-like features. A sparse coding function can be used to determine sparse Haar-like features and form a sparse feature matrix, and the sparse feature matrix in turn is used to classify targets.
    Type: Application
    Filed: December 15, 2020
    Publication date: May 13, 2021
    Inventors: Jinjun Wang, Shun Zhang, Rui Shi
  • Publication number: 20210103718
    Abstract: A facial recognition method using online sparse learning includes initializing target position and scale, extracting positive and negative samples, and extracting high-dimensional Haar-like features. A sparse coding function can be used to determine sparse Haar-like features and form a sparse feature matrix, and the sparse feature matrix in turn is used to classify targets.
    Type: Application
    Filed: December 15, 2020
    Publication date: April 8, 2021
    Inventors: Jinjun Wang, Shun Zhang, Rui Shi
  • Publication number: 20210074788
    Abstract: A display substrate, a method of forming the same and a display device are provided. The display substrate includes: a base substrate, and a light shielding layer, a first insulating layer, a first metal layer, a second insulating layer and a light emitting device stacked in sequence on the base substrate; where the second insulating layer has a first groove and a second groove, and a portion of the second insulating layer between the first groove and the second groove forms a barrier structure; the first groove is at a side of the barrier structure adjacent to the light emitting device with respect to the second groove; the first metal layer includes a signal line at a side of the first groove away from the barrier structure and a connection terminal at a side of the second groove away from the barrier structure; the light shielding layer includes a connection lead through which the signal line and the connection terminal are electrically connected.
    Type: Application
    Filed: December 18, 2019
    Publication date: March 11, 2021
    Inventors: Bo CHENG, Shun ZHANG, Yang ZHOU
  • Patent number: 10902243
    Abstract: A facial recognition method using online sparse learning includes initializing target position and scale, extracting positive and negative samples, and extracting high-dimensional Haar-like features. A sparse coding function can be used to determine sparse Haar-like features and form a sparse feature matrix, and the sparse feature matrix in turn is used to classify targets.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: January 26, 2021
    Assignee: DEEP NORTH, INC.
    Inventors: Jinjun Wang, Shun Zhang, Rui Shi
  • Patent number: 10869313
    Abstract: An embodiment of the present invention provides an uplink access method based on an orthogonal frequency-division multiple access mechanism, comprising: determining the number of subchannels available for a current transmission and the number of time slot blocks required for the current access; transmitting uplink access trigger frames on the available subchannels; randomly selecting among the available subchannels and the time slot blocks; and transmitting an uplink access response frame to an access point by the randomly selected available subchannel and time slot block, to perform random access. The embodiment of the present invention can reduce an average time taken by users to access channels, thereby reducing transmission delay of data packet, reducing waste of time and subchannel resources, and improving the throughput of the entire network.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: December 15, 2020
    Assignee: XIDIAN UNIVERSITY
    Inventors: Jiandong Li, Hongyan Li, Shun Zhang, Ting Zheng, Ronghui Hou, Zhicong Xie, Pengyu Huang, Yinghong Ma, Min Sheng, Yan Zhang, Qin Liu
  • Patent number: 10860863
    Abstract: A non-hierarchical and iteratively updated tracking system includes a first module for creating an initial trajectory model for multiple targets from a set of received image detections. A second module is connected to the first module to provide identification of multiple targets using a target model, and a third module is connected to the second module to solve a joint object function and maximal condition probability for the target module. A tracklet module can update the first module trajectory module, and after convergence, output a trajectory model for multiple targets.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: December 8, 2020
    Assignee: DEEPNORTH INC.
    Inventors: Jinjun Wang, Rui Shi, Shun Zhang
  • Publication number: 20200350266
    Abstract: A display substrate, a manufacturing method and a display device are provided. The display substrate includes a functional region and a peripheral region surrounding the functional region. A barrier structure is arranged at the peripheral region of the display substrate, and includes a plurality of barrier members spaced from each other in a direction away from the functional region. At least a part of the barrier member are made of metal.
    Type: Application
    Filed: August 14, 2019
    Publication date: November 5, 2020
    Inventors: Shun ZHANG, Mengmeng DU, Bo CHENG
  • Publication number: 20200266256
    Abstract: The present disclosure relates to an array substrate, manufacturing method thereof, and a display panel. The array substrate includes a substrate, at least a first top gate TFT and at least a first bottom gate TFT disposed on the substrate and located in each sub-pixel region; a gate of the first top gate TFT and a gate of the first bottom gate TFT are formed in a same layer with same material, an active layer pattern of the first top gate TFT and an active layer pattern of the first bottom gate TFT are respectively arranged on two sides of the gate, and orthographic projections of the active layer pattern of the first top gate TFT and the active layer pattern of the first bottom gate TFT on the substrate are spaced from each other in a first direction.
    Type: Application
    Filed: December 13, 2019
    Publication date: August 20, 2020
    Applicants: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Shun ZHANG, Linhong HAN, Yang ZHOU, Mengmeng DU, Yue TENG
  • Patent number: 10687415
    Abstract: A flexible printed circuit board is disclosed, which includes a pad portion, wherein the pad portion includes a pair of first signal pads formed in a first conductor layer and respectively connected with a pair of signal wires, a pair of second signal pads formed in a second conductor layer and electrically separated from a grounding layer; a pair of first grounding pads formed in the first conductor layer and electrically separated from the pair of signal wires, wherein: the pair of first signal pads is sandwiched between the pair of first grounding pads, and a pair of second grounding pads formed in the second conductor layer and connected with the grounding layer, wherein the pair of second signal pads are sandwiched between the pair of second grounding pads. A width of the first and the second signal pads is larger than that of the signal wires.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: June 16, 2020
    Assignee: DALIAN CANGLONG OPTOELECTRONICS TECHNOLOGIES CO., LTD
    Inventors: Hao Wang, Shun Zhang, Lin Cui, Wenchen Zhang, Chuanwu Liao
  • Patent number: 10587093
    Abstract: A connection structure for a laser and a laser assembly are provided. The connection structure for a laser includes a first insulation substrate, where the first insulation substrate includes a conductive path separately on an upper surface and a lower surface thereof. A second insulation substrate is disposed on the upper surface of the first insulation substrate. An upper surface of the second insulation substrate includes a conductive path. The conductive path on the upper surface of the second insulation substrate is electrically connected to the conductive path on the lower surface of the first insulation substrate via a through-hole. The connection structure for a laser and the laser assembly in the present disclosure are configured to supplying power to a laser.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: March 10, 2020
    Assignees: HISENSE BROADBAND MULTIMEDIA TECHNOLOGIES CO., LTD., HISENSE USA CORP., HISENSE INTERNATIONAL CO., LTD.
    Inventors: Hao Wang, Hongwei Mu, YongLiang Huang, Shun Zhang