Patents by Inventor Shuntaro Machida

Shuntaro Machida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11904356
    Abstract: A highly-sensitive ultrasonic transducer with good yield is provided. The ultrasonic transducer includes a cavity layer, a pair of electrodes positioned above and below the cavity layer, insulating layers disposed above and below each of the pair of electrodes, and a filled hole that penetrates, in a vertical direction, at least a portion of the insulating layers positioned above the cavity layer. When the ultrasonic transducer is viewed from above, each electrode of the pair of electrodes includes, at a position that overlaps the embedded hole, a non-electrode region where the electrodes are not formed.
    Type: Grant
    Filed: November 29, 2019
    Date of Patent: February 20, 2024
    Assignee: Hitachi, Ltd.
    Inventors: Taiichi Takezaki, Masakazu Kawano, Shuntaro Machida
  • Patent number: 11642695
    Abstract: An ultrasonic probe includes a semiconductor chip in which an ultrasonic transducer is formed and an electrode pad electrically connected to an upper electrode or a lower electrode of the ultrasonic transducer is provided and a flexible substrate in which a bump electrically connected to the electrode pad is provided and the bump is disposed in a portion overlapping with a stepped portion of the semiconductor chip. Further, a height of a connection surface of the electrode pad of the semiconductor chip connected to the bump is lower than a height of a lower surface of the lower electrode.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: May 9, 2023
    Assignee: FUJIFILM HEALTHCARE CORPORATION
    Inventors: Shuntaro Machida, Akifumi Sako, Yasuhiro Yoshimura
  • Patent number: 11502046
    Abstract: Provided is a semiconductor chip, including: a semiconductor substrate; a thin film formed on the semiconductor substrate, the thin film having internal stress; and a semiconductor device formed on the semiconductor substrate that has the thin film formed thereon, wherein the semiconductor chip warps due to the internal stress of the thin film.
    Type: Grant
    Filed: July 14, 2020
    Date of Patent: November 15, 2022
    Assignee: HITACHI, LTD.
    Inventor: Shuntaro Machida
  • Patent number: 11376628
    Abstract: A capacitive device includes a unit cell including a CMUT, and a transmission/reception plate for impedance matching which is provided above the unit cell via a connection portion, in which a membrane of the CMUT constituting the unit cell is connected to the transmission/reception plate via the connection portion having an area smaller than that of the transmission/reception plate. The area of the transmission/reception plate is desirably larger than the area of a hollow portion of the CMUT.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: July 5, 2022
    Assignee: Hitachi, Ltd.
    Inventors: Taiichi Takezaki, Hiroaki Hasegawa, Shuntaro Machida
  • Patent number: 11331693
    Abstract: Capacitors, each of which is electrically connected to a capacitor which is the cell of the CMUT mounted in a chip and is used as a DC block capacitor for protecting an amplifying circuit, are formed as many as plural aligned channels in the chip. The capacitor is an electrostatic capacitance element which is not vibrated acoustically.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: May 17, 2022
    Assignee: FUJIFILM Healthcare Corporation
    Inventors: Hiroaki Hasegawa, Kengo Imagawa, Shuntaro Machida, Taiichi Takezaki
  • Patent number: 11268937
    Abstract: A capacitive micromachined ultrasonic transducer 111A includes: a silicon substrate 101; an insulating film 102 formed over the silicon substrate 101; a lower electrode 103; insulating films 104 and 106; a cavity 105 constituted by a void formed in a portion of the insulating film 106; an upper electrode 107; insulating films 108 and 114; and a protective film 109. In addition, the insulating film 106, upper electrode 107, insulating film 108 and insulating film 114 above the cavity 105 configure a vibration film 110, and the protective film 109 above the vibration film 110 is divided into a plurality of isolated patterns regularly arranged with a gap 115 having a constant spacing formed therebetween.
    Type: Grant
    Filed: July 6, 2017
    Date of Patent: March 8, 2022
    Assignee: FUJIFILM HEALTHCARE CORPORATION
    Inventors: Taiichi Takezaki, Shuntaro Machida, Daisuke Ryuzaki, Yasuhiro Yoshimura, Tatsuya Nagata, Naoaki Yamashita
  • Publication number: 20210162462
    Abstract: An ultrasonic probe includes a semiconductor chip 101 in which a CMUT 102 is formed and an electrode pad 101a electrically connected to an upper electrode or a lower electrode of the CMUT 102 is provided and a flexible substrate 100 in which a bump 100b electrically connected to the electrode pad 101a is provided and the bump 100b is disposed in a portion overlapping with a stepped portion 101e of the semiconductor chip 101. Further, a height of a connection surface 101aa of the electrode pad 101a of the semiconductor chip 101 connected to the bump 100b is lower than a height of a lower surface of the lower electrode.
    Type: Application
    Filed: August 23, 2018
    Publication date: June 3, 2021
    Inventors: Shuntaro Machida, Akifumi Sako, Yasuhiro Yoshimura
  • Publication number: 20210063553
    Abstract: Disclosed is a measurement method of ultrasonic waves using a capacitive micromachined ultrasonic transducer. The method includes measuring a ultrasonic wave by applying a bias voltage to the capacitive micromachined ultrasonic transducer in each of a plurality of first periods, and applying a voltage that is equal to or greater than 0V and smaller than the bias voltage to the capacitive micromachined ultrasonic transducer in a second period between two first periods among the plurality of first periods.
    Type: Application
    Filed: August 31, 2020
    Publication date: March 4, 2021
    Inventors: Taiichi TAKEZAKI, Shuntaro MACHIDA
  • Publication number: 20210043584
    Abstract: Provided is a semiconductor chip, including: a semiconductor substrate; a thin film formed on the semiconductor substrate, the thin film having internal stress; and a semiconductor device formed on the semiconductor substrate that has the thin film formed thereon, wherein the semiconductor chip warps due to the internal stress of the thin film.
    Type: Application
    Filed: July 14, 2020
    Publication date: February 11, 2021
    Inventor: Shuntaro Machida
  • Patent number: 10751027
    Abstract: Technique that enables precisely measuring cavity height and precisely grasping maximum transmission sound pressure in an ultrasonic probe is provided to the ultrasonic probe using CMUT. The ultrasonic probe according to the present invention includes plural cells each of which includes a lower electrode and an upper electrode arranged via a gap with respect to the lower electrode, and the plural cells include an ultrasonic cell the gap of which is void and which transmits/receives an ultrasonic wave and a reference cell the gap of which is filled with a conductive material. Electrostatic capacity of the ultrasonic cell and the reference cell is measured, parasitic capacity included in the measured electrostatic capacity as to the ultrasonic cell is corrected using parasitic capacity included in the measured electrostatic capacity as to the reference cell, and cavity height is calculated on the basis of the corrected electrostatic capacity of the ultrasonic cell.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: August 25, 2020
    Assignee: HITACHI, LTD.
    Inventors: Taiichi Takezaki, Shuntaro Machida, Daisuke Ryuzaki
  • Publication number: 20200222940
    Abstract: An object of the present invention is to provide an ultrasonic transducer having a high sensitivity and a high durability. An ultrasonic transducer includes: a pair of upper and lower electrodes; a cavity layer having a vibration space directly sandwiched between the pair of electrodes; and an insulating layer sandwiched between the pair of electrodes and disposed around the vibration space. A vertical thickness of the insulating layer is greater than that of the cavity layer.
    Type: Application
    Filed: January 13, 2020
    Publication date: July 16, 2020
    Inventors: Masakazu KAWANO, Taiichi TAKEZAKI, Shuntaro MACHIDA, Daisuke RYUZAKI
  • Publication number: 20200171538
    Abstract: A highly-sensitive ultrasonic transducer with good yield is provided. The ultrasonic transducer includes a cavity layer, a pair of electrodes positioned above and below the cavity layer, insulating layers disposed above and below each of the pair of electrodes, and a filled hole that penetrates, in a vertical direction, at least a portion of the insulating layers positioned above the cavity layer. When the ultrasonic transducer is viewed from above, each electrode of the pair of electrodes includes, at a position that overlaps the embedded hole, a non-electrode region where the electrodes are not formed.
    Type: Application
    Filed: November 29, 2019
    Publication date: June 4, 2020
    Inventors: Taiichi TAKEZAKI, Masakazu KAWANO, Shuntaro MACHIDA
  • Patent number: 10610890
    Abstract: An ultrasonic transducer element includes a substrate, a lower electrode on a first surface of the substrate, a first insulating film on the lower electrode, a first cavity layer on the first insulating film, a second insulating film on the first cavity layer, an upper electrode on the second insulating film that overlaps the first cavity layer, a third insulating film on the upper electrode, a second cavity layer on the third insulating film, a fourth insulating film on the second cavity layer, a fixing portion formed by the second to fourth insulating films, a movable portion in a membrane insides the second cavity layer, a first connection portion and a second connection portion that are stacked with a gap and the connection portions are configured by the second to fourth insulating films connecting the movable portion and the fixing portion.
    Type: Grant
    Filed: June 4, 2015
    Date of Patent: April 7, 2020
    Assignee: Hitachi, Ltd.
    Inventors: Hiroaki Hasegawa, Taiichi Takezaki, Shuntaro Machida, Daisuke Ryuzaki
  • Patent number: 10603689
    Abstract: A structure that prevents a substrate from being warped is provided on a region or a location other than a membrane that determines the characteristics of a CMUT. In a CMUT in a structure in which a first conductive layer and a second conductive layer are provided sandwiching a cavity on a substrate, for example, as a warpage prevention structure, a warpage prevention layer that prevents the substrate from being warped is provided between the substrate and the first conductive film. When the insulating film disposed between the cavity and the first conductive film and the insulating film disposed between the cavity and the second conductive film are silicon oxide films, the warpage prevention layer includes a silicon nitride film.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: March 31, 2020
    Assignee: Hitachi, Ltd.
    Inventors: Shuntaro Machida, Daisuke Ryuzaki, Tatsuya Nagata, Naoaki Yamashita, Yuko Hanaoka, Yasuhiro Yoshimura
  • Patent number: 10605824
    Abstract: For the purpose of shortening the MEMS manufacturing TAT, the MEMS manufacturing method according to the present invention includes a step of extracting the first MEMS with first characteristic in a range approximate to the required characteristic from the plurality of MEMS preliminarily prepared on the main surface of the substrate, and a step of forming a second MEMS having the required characteristic by directly processing the first MEMS.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: March 31, 2020
    Assignee: Hitachi, Ltd.
    Inventors: Shuntaro Machida, Nobuyuki Sugii, Keiji Watanabe, Daisuke Ryuzaki, Tetsufumi Kawamura, Kazuki Watanabe
  • Publication number: 20200069287
    Abstract: Capacitors, each of which is electrically connected to a capacitor which is the cell of the CMUT mounted in a chip and is used as a DC block capacitor for protecting an amplifying circuit, are formed as many as plural aligned channels in the chip. The capacitor is an electrostatic capacitance element which is not vibrated acoustically.
    Type: Application
    Filed: March 22, 2019
    Publication date: March 5, 2020
    Inventors: Hiroaki HASEGAWA, Kengo IMAGAWA, Shuntaro MACHIDA, Taiichi TAKEZAKI
  • Publication number: 20200070205
    Abstract: A capacitive device includes a unit cell including a CMUT, and a transmission/reception plate for impedance matching which is provided above the unit cell via a connection portion, in which a membrane of the CMUT constituting the unit cell is connected to the transmission/reception plate via the connection portion having an area smaller than that of the transmission/reception plate. The area of the transmission/reception plate is desirably larger than the area of a hollow portion of the CMUT.
    Type: Application
    Filed: August 7, 2019
    Publication date: March 5, 2020
    Inventors: Taiichi TAKEZAKI, Hiroaki HASEGAWA, Shuntaro MACHIDA
  • Publication number: 20190321000
    Abstract: Performance of an ultrasonic examination device, which includes an ultrasonic sensor of a capacitance detection type including a cavity between electrodes and vibrating a membrane, is enhanced. A cell which is a capacitive type device provided with a lower electrode, a cavity, and an upper electrode in a membrane, which are stacked in a longitudinal direction, and a condenser provided with the lower electrode and an upper electrode which are stacked in the longitudinal direction, are formed in one semiconductor chip. The cell and the condenser are connected to each other in parallel, and, when ultrasonic waves are transmitted and received using the cell, connection between a DC bias power source and the semiconductor chip is blocked, and a direct current voltage is applied to the cell from the condenser.
    Type: Application
    Filed: January 11, 2019
    Publication date: October 24, 2019
    Applicant: HITACHI, LTD.
    Inventors: Taiichi TAKEZAKI, Hiroaki HASEGAWA, Shuntaro MACHIDA, Ryo IMAI, Tomohiko TANAKA
  • Patent number: 10429340
    Abstract: A sensor element includes a sensor FET provided in a main surface of a semiconductor substrate, a cavity provided in the sensor FET and into which a detection target gas is introduced, and an ion pump provided over the cavity. By laminating the ion pump over the sensor FET via the cavity, a part of a front surface of a gate layer is exposed to the cavity, and a part of a lower surface of an ion pump electrode is exposed to the cavity. When the gate layer comes into contact with the detection target gas, a work function changes, so that gas concentration can be detected.
    Type: Grant
    Filed: March 2, 2018
    Date of Patent: October 1, 2019
    Assignee: Hitachi Metals, Ltd.
    Inventors: Yoshitaka Sasago, Shuntaro Machida, Hitoshi Nakamura, Takahiro Odaka
  • Patent number: 10410826
    Abstract: The invention is directed to a technique for reducing the time from the start of fabrication of a prototype structure to the completion of fabrication of a real structure. A device processing method includes steps of: fabricating a first structure using an ion beam under a first condition in a first region on a substrate; measuring a size of the first structure which is fabricated; comparing the measurement result with design data; determining a second condition from the comparison result; and fabricating a second structure using the ion beam under the second condition in a second region on the substrate.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: September 10, 2019
    Assignee: HITACHI, LTD.
    Inventors: Tetsufumi Kawamura, Misuzu Sagawa, Kazuki Watanabe, Keiji Watanabe, Shuntaro Machida, Nobuyuki Sugii, Daisuke Ryuzaki