Patents by Inventor Shuntaro Machida

Shuntaro Machida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10336609
    Abstract: First, an ion beam is applied to a workpiece to form a tapered hole the side wall of which is inclined. Next, the application of the ion beam is stopped, and then a material gas is introduced from the gas source to the upper surface of the workpiece from an oblique direction to cause gas molecules to be adsorbed to the upper surface of the workpiece and to the upper portion of the side wall of the hole. Next, introduction of the material gas is stopped, and then the ion beam is applied again to the region of the workpiece where the hole is formed. As a result, at the upper portion of the side wall of the hole, film formation occurs using the gas molecules as the material adsorbed to the side wall of the hole, and, at the bottom portion of the hole, etching of the workpiece occurs.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: July 2, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Keiji Watanabe, Shuntaro Machida, Katsuya Miura, Aki Takei, Tetsufumi Kawamura, Nobuyuki Sugii, Daisuke Ryuzaki
  • Publication number: 20190170699
    Abstract: A capacitive micromachined ultrasonic transducer 111A includes: a silicon substrate 101; an insulating film 102 formed over the silicon substrate 101; a lower electrode 103; insulating films 104 and 106; a cavity 105 constituted by a void formed in a portion of the insulating film 106; an upper electrode 107; insulating films 108 and 114; and a protective film 109. In addition, the insulating film 106, upper electrode 107, insulating film 108 and insulating film 114 above the cavity 105 configure a vibration film 110, and the protective film 109 above the vibration film 110 is divided into a plurality of isolated patterns regularly arranged with a gap 115 having a constant spacing formed therebetween.
    Type: Application
    Filed: July 6, 2017
    Publication date: June 6, 2019
    Inventors: Taiichi TAKEZAKI, Shuntaro MACHIDA, Daisuke RYUZAKI, Yasuhiro YOSHIMURA, Tatsuya NAGATA, Naoaki YAMASHITA
  • Publication number: 20190167229
    Abstract: An ultrasound imaging probe capable of securing an assembly accuracy of and improving a resolution performance of an obtained image is provided. A photoacoustic catheter includes: a silicon substrate which includes an ultrasonic transducer for detecting an ultrasonic wave formed thereon and a through hole passing through front and rear surfaces; an optical fiber which oscillates a laser; a lens which condenses the laser and is arranged within the through hole; a tubular housing; a glass cover which covers the lens; and a resin which fills a gap between the through hole and the lens. Further, the silicon substrate and the optical fiber are fixed to a part of the housing in the housing.
    Type: Application
    Filed: December 4, 2018
    Publication date: June 6, 2019
    Applicant: HITACHI, LTD.
    Inventors: Taiichi TAKEZAKI, Shuntaro MACHIDA, Hiroaki HASEGAWA, Tomohiko TANAKA, Ryo IMAI, Yoshiho SEO, Takahiro MATSUDA, Shinsuke ONOE
  • Publication number: 20190118222
    Abstract: An ultrasonic transducer includes: a hollow portion 110 formed between insulating films 104 and 106 interposed between a lower electrode 103 and an upper electrode 107 above a substrate 101; and a membrane 120 that is configured of insulating films 106, 108, 111, and 112 and the upper electrode 107 above the hollow portion 110 and vibrates at a time of transmission/reception of ultrasonic wave. Also, the hollow portion 110 has a cross-sectional shape according to which a relationship of h1>h2>0 is established when a thickness of a center portion is given as h1 and a thickness of an outer peripheral portion is given as h2.
    Type: Application
    Filed: July 7, 2017
    Publication date: April 25, 2019
    Inventors: Hiroaki HASEGAWA, Shuntaro MACHIDA, Taiichi TAKEZAKI, Daisuke RYUZAKI
  • Patent number: 10203688
    Abstract: A manufacturing device inputs design information including three-dimensional structure data, generates a manufacturing process flow, and displays the manufacturing process flow on a screen for a user to check, modify, and confirm the flow based on design information and setting information. A process method includes a first process method of a direct modeling method having an FIB method and a second process method of a semiconductor manufacturing process method which is a non-FIB method. The manufacturing device generates a plurality of manufacturing process flows by a combination of cases where each of the process methods is applied to each of the regions of the three-dimensional data. The manufacturing process flow includes a process device, the process method, a control parameter value, a process time, and a total process time for each of process steps. An output unit outputs a manufacturing process flow having, for example, the shortest total process time.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: February 12, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Masaharu Kinoshita, Nobuyuki Sugii, Tomonori Sekiguchi, Shuntaro Machida, Tetsufumi Kawamura
  • Publication number: 20190013179
    Abstract: The invention is directed to a technique for reducing the time from the start of fabrication of a prototype structure to the completion of fabrication of a real structure. A device processing method includes steps of: fabricating a first structure using an ion beam under a first condition in a first region on a substrate; measuring a size of the first structure which is fabricated; comparing the measurement result with design data; determining a second condition from the comparison result; and fabricating a second structure using the ion beam under the second condition in a second region on the substrate.
    Type: Application
    Filed: March 18, 2016
    Publication date: January 10, 2019
    Applicant: HITACHI, LTD.
    Inventors: Tetsufumi KAWAMURA, Misuzu SAGAWA, Kazuki WATANABE, Keiji WATANABE, Shuntaro MACHIDA, Nobuyuki SUGII, Daisuke RYUZAKI
  • Publication number: 20180284060
    Abstract: A sensor element includes a sensor FET provided in a main surface of a semiconductor substrate, a cavity provided in the sensor FET and into which a detection target gas is introduced, and an ion pump provided over the cavity. By laminating the ion pump over the sensor FET via the cavity, a part of a front surface of a gate layer is exposed to the cavity, and a part of a lower surface of an ion pump electrode is exposed to the cavity. When the gate layer comes into contact with the detection target gas, a work function changes, so that gas concentration can be detected.
    Type: Application
    Filed: March 2, 2018
    Publication date: October 4, 2018
    Applicant: HITACHI METALS, LTD.
    Inventors: Yoshitaka SASAGO, Shuntaro MACHIDA, Hitoshi NAKAMURA, Takahiro ODAKA
  • Publication number: 20180273378
    Abstract: Provided is a technology that enables the shortening of the designing period. A device designing method includes a step of extracting a structure compatible with requested characteristics from a database in which each structure of a device is associated with characteristics and a step of outputting the extracted structure and a tuning parameter for adjusting the structure into ranges of the requested characteristics. In regard to each structure parameter determining the structure of the device, characteristics obtained by performing a simulation while exhaustively changing the structure parameter in a manufacturable range and the structure parameter used for the simulation are stored in the database while being associated with each other.
    Type: Application
    Filed: March 18, 2016
    Publication date: September 27, 2018
    Inventors: Tetsufumi KAWAMURA, Kazuki WATANABE, Atsushi ISOBE, Yuudai KAMADA, Shuntaro MACHIDA, Nobuyuki SUGII, Daisuke RYUZAKI
  • Publication number: 20180267075
    Abstract: For the purpose of shortening the MEMS manufacturing TAT, the MEMS manufacturing method according to the present invention includes a step of extracting the first MEMS with first characteristic in a range approximate to the required characteristic from the plurality of MEMS preliminarily prepared on the main surface of the substrate, and a step of forming a second MEMS having the required characteristic by directly processing the first MEMS.
    Type: Application
    Filed: March 18, 2016
    Publication date: September 20, 2018
    Inventors: Shuntaro MACHIDA, Nobuyuki SUGII, Keiji WATANABE, Daisuke RYUZAKI, Tetsufumi KAWAMURA, Kazuki WATANABE
  • Publication number: 20180161813
    Abstract: An ultrasonic transducer element includes a substrate, a lower electrode on a first surface of the substrate, a first insulating film on the lower electrode, a first cavity layer on the first insulating film, a second insulating film on the first cavity layer, an upper electrode on the second insulating film that overlaps the first cavity layer, a third insulating film on the upper electrode, a second cavity layer on the third insulating film, a fourth insulating film on the second cavity layer, a fixing portion formed by the second to fourth insulating films, a movable portion in a membrane insides the second cavity layer, a first connection portion and a second connection portion that are stacked with a gap and the connection portions are configured by the second to fourth insulating films connecting the movable portion and the fixing portion.
    Type: Application
    Filed: June 4, 2015
    Publication date: June 14, 2018
    Applicant: HITACHI, LTD.
    Inventors: Hiroaki HASEGAWA, Taiichi TAKEZAKI, Shuntaro MACHIDA, Daisuke RYUZAKI
  • Patent number: 9964635
    Abstract: Both controlling damage when assembling an ultrasonic probe using a chip formed with a capacitive ultrasonic transducer and securing operational reliability are achieved. In a semiconductor substrate on which the capacitive ultrasonic transducer (CMUT) is formed on a first primary surface, a protective film is formed on the surface of the ultrasonic transducer which is formed on the first primary surface of the semiconductor substrate which is then thinned by polishing a second primary surface opposite to the first primary surface of the semiconductor substrate, an ultrasonic transducer chip is cutout of the semiconductor substrate, a sound absorbing material is provided on the surface opposite to the surface formed with the ultrasonic transducer, and the protective film formed on the surface of the ultrasonic transducer is removed.
    Type: Grant
    Filed: November 29, 2013
    Date of Patent: May 8, 2018
    Assignee: HITACHI, LTD.
    Inventors: Shuntaro Machida, Akifumi Sako, Taiichi Takezaki, Yasuhiro Yoshimura, Tatsuya Nagata, Naoaki Yamashita, Hiroki Tanaka
  • Patent number: 9941817
    Abstract: High transfer sound pressure and high reception sensitivity are realized, and reliability is improved in terms of long term operation, in a capacitive detector-type ultrasonic transducer (CMUT).
    Type: Grant
    Filed: October 13, 2011
    Date of Patent: April 10, 2018
    Assignee: HITACHI, LTD.
    Inventors: Taiichi Takezaki, Shuntaro Machida
  • Patent number: 9873137
    Abstract: Disclosed is an ultrasonic transducer that is provided with: a bottom electrode; an electric connection part which is connected to the bottom electrode from the bottom of the bottom electrode; a first insulating film which is formed so as to cover the bottom electrode; a cavity which is formed on the first insulating film so as to overlap the bottom electrode when seen from above; a second insulating film which is formed so as to cover the cavity; and a top electrode which is formed on the second insulating film so as to overlap the cavity when seen from above. The electric connection part to the bottom electrode is positioned so as to not overlap the cavity when seen from above.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: January 23, 2018
    Assignee: HITACHI, LTD.
    Inventors: Shuntaro Machida, Takashi Kobayashi
  • Publication number: 20180017958
    Abstract: A manufacturing device inputs design information including three-dimensional structure data, generates a manufacturing process flow, and displays the manufacturing process flow on a screen for a user to check, modify, and confirm the flow based on design information and setting information. A process method includes a first process method of a direct modeling method having an FIB method and a second process method of a semiconductor manufacturing process method which is a non-FIB method. The manufacturing device generates a plurality of manufacturing process flows by a combination of cases where each of the process methods is applied to each of the regions of the three-dimensional data. The manufacturing process flow includes a process device, the process method, a control parameter value, a process time, and a total process time for each of process steps. An output unit outputs a manufacturing process flow having, for example, the shortest total process time.
    Type: Application
    Filed: May 12, 2017
    Publication date: January 18, 2018
    Inventors: Masaharu KINOSHITA, Nobuyuki SUGII, Tomonori SEKIGUCHI, Shuntaro MACHIDA, Tetsufumi KAWAMURA
  • Publication number: 20170362082
    Abstract: First, an ion beam is applied to a workpiece to form a tapered hole the side wall of which is inclined. Next, the application of the ion beam is stopped, and then a material gas is introduced from the gas source to the upper surface of the workpiece from an oblique direction to cause gas molecules to be adsorbed to the upper surface of the workpiece and to the upper portion of the side wall of the hole. Next, introduction of the material gas is stopped, and then the ion beam is applied again to the region of the workpiece where the hole is formed. As a result, at the upper portion of the side wall of the hole, film formation occurs using the gas molecules as the material adsorbed to the side wall of the hole, and, at the bottom portion of the hole, etching of the workpiece occurs.
    Type: Application
    Filed: June 1, 2017
    Publication date: December 21, 2017
    Inventors: Keiji WATANABE, Shuntaro MACHIDA, Katsuya MIURA, Aki TAKEI, Tetsufumi KAWAMURA, Nobuyuki SUGII, Daisuke RYUZAKI
  • Publication number: 20170291192
    Abstract: A structure that prevents a substrate from being warped is provided on a region or a location other than a membrane that determines the characteristics of a CMUT. In a CMUT in a structure in which a first conductive layer and a second conductive layer are provided sandwiching a cavity on a substrate, for example, as a warpage prevention structure, a warpage prevention layer that prevents the substrate from being warped is provided between the substrate and the first conductive film. When the insulating film disposed between the cavity and the first conductive film and the insulating film disposed between the cavity and the second conductive film are silicon oxide films, the warpage prevention layer includes a silicon nitride film.
    Type: Application
    Filed: April 21, 2015
    Publication date: October 12, 2017
    Inventors: Shuntaro MACHIDA, Daisuke RYUZAKI, Tatsuya NAGATA, Naoaki YAMASHITA, Yuko HANAOKA, Yasuhiro YOSHIMURA
  • Publication number: 20170156696
    Abstract: Technique that enables precisely measuring cavity height and precisely grasping maximum transmission sound pressure in an ultrasonic probe is provided to the ultrasonic probe using CMUT. The ultrasonic probe according to the present invention includes plural cells each of which includes a lower electrode and an upper electrode arranged via a gap with respect to the lower electrode, and the plural cells include an ultrasonic cell the gap of which is void and which transmits/receives an ultrasonic wave and a reference cell the gap of which is filled with a conductive material. Electrostatic capacity of the ultrasonic cell and the reference cell is measured, parasitic capacity included in the measured electrostatic capacity as to the ultrasonic cell is corrected using parasitic capacity included in the measured electrostatic capacity as to the reference cell, and cavity height is calculated on the basis of the corrected electrostatic capacity of the ultrasonic cell.
    Type: Application
    Filed: June 19, 2015
    Publication date: June 8, 2017
    Inventors: Taiichi TAKEZAKI, Shuntaro MACHIDA, Daisuke RYUZAKI
  • Patent number: 9636707
    Abstract: The invention aims to give uniform and stable characteristics to a cMUT-cell array and to improve acoustic characteristics. To this end, a signal blocking section is additionally provided for cells 102 located in the outermost peripheral portion or at the end positions of a two-dimensional array 101 of cMUT cells that are designed and manufactured as ones usable as an ordinary transducer capable of transmission and reception of signals. The signal blocking section is provided to prevent the displacement and the vibration of the cells, and to block the transmission and the reception of signals.
    Type: Grant
    Filed: January 23, 2008
    Date of Patent: May 2, 2017
    Assignee: HITACHI, LTD.
    Inventors: Teiichiro Ikeda, Hiroki Tanaka, Shuntaro Machida
  • Publication number: 20160008849
    Abstract: Disclosed is an ultrasonic transducer that is provided with: a bottom electrode; an electric connection part which is connected to the bottom electrode from the bottom of the bottom electrode; a first insulating film which is formed so as to cover the bottom electrode; a cavity which is formed on the first insulating film so as to overlap the bottom electrode when seen from above; a second insulating film which is formed so as to cover the cavity; and a top electrode which is formed on the second insulating film so as to overlap the cavity when seen from above. The electric connection part to the bottom electrode is positioned so as to not overlap the cavity when seen from above.
    Type: Application
    Filed: July 15, 2015
    Publication date: January 14, 2016
    Inventors: Shuntaro MACHIDA, Takashi KOBAYASHI
  • Publication number: 20150323657
    Abstract: Both controlling damage when assembling an ultrasonic probe using a chip formed with a capacitive ultrasonic transducer and securing operational reliability are achieved. In a semiconductor substrate on which the capacitive ultrasonic transducer (CMUT) is formed on a first primary surface, a protective film is formed on the surface of the ultrasonic transducer which is formed on the first primary surface of the semiconductor substrate which is then thinned by polishing a second primary surface opposite to the first primary surface of the semiconductor substrate, an ultrasonic transducer chip is cutout of the semiconductor substrate, a sound absorbing material is provided on the surface opposite to the surface formed with the ultrasonic transducer, and the protective film formed on the surface of the ultrasonic transducer is removed.
    Type: Application
    Filed: November 29, 2013
    Publication date: November 12, 2015
    Inventors: Shuntaro MACHIDA, Akifumi SAKO, Taiichi TAKEZAKI, Yasuhiro YOSHIMURA, Tatsuya NAGATA, Naoaki YAMASHITA, Hiroki TANAKA