Abstract: An embodiment of a method for driving a phase change memory, comprising counting an access number of a phase change memory, wherein the access number is the number of times that the phase change memory has been accessed; refreshing the phase change memory when the number of times is large than a predetermined number.

Abstract: A voltage driving circuit, suitable for being used in a pixel driving circuit, includes a storage unit for receiving a single-end data input signal and outputting a first voltage signal and a second voltage signal according to a content of the data input signal. The first voltage signal and the second voltage signal have different voltage levels, and the voltage levels are a high voltage level and a low voltage level, which have been adjusted to a driving-voltage requirement satisfying subsequent operations. A switch control unit receives the first voltage signal and the second voltage signal and outputs an output-voltage signal at an output terminal based on a determination from at least one control signal. The output-voltage signal is the high voltage level or the low voltage level.

Abstract: A memory array including a plurality of programmable memory cells, a plurality of column lines and a plurality of row lines is introduced. Each of the programmable memory cells is coupled to corresponding one of the column lines and corresponding one of the row lines. Each of the programmable memory cells includes an organic memory cell and an active switching element. The active switching element is controlled by the column line and interposed between the row line and the organic memory cell. Under controlling of the column line, the active switching element is turned on to coupling the row line and the organic memory cell to connect to each other.

Abstract: An organic memory is provided. The organic memory at least comprises a plurality of select lines, a plurality of data lines, a bit cell array, and a plurality of digital sensing circuits. The bit cell array comprises a plurality of bit cells, wherein each bit cell comprises an organic memory cell and a switch element. Each digital sensing circuit comprises a current-to-voltage converter and a sensing block circuit. Therefore, the present invention provides a complete digital sensing mechanism of an organic memory IC, which is practicable and suitable for mass-production.

Abstract: A digital sensing circuit capable of sensing bit information stored in a bit cell of an organic memory is provided. The digital sensing circuit includes a current-to-voltage converter, a reset block circuit, and a sensing block circuit. The current-to-voltage converter converts a conduction current into a voltage signal. The sensing block circuit buffers and outputs the bit information according to the voltage signal. Therefore, the challenge of design and layout of the present invention is very low so that the yield rate will be improved. Hence, a practical memory device suitable for mass-production is achieved.

Abstract: A digital sensing circuit capable of sensing bit information stored in a bit cell of an organic memory is provided. The digital sensing circuit comprises a current-to-voltage converter, a reset block circuit, and a sensing block circuit. The current-to-voltage converter converts a conduction current into a voltage signal. The sensing block circuit buffers and outputs the bit information according to the voltage signal. Therefore, the challenge of design and layout of the present invention is very low so that the yield rate will be improved. Hence, a practical memory device suitable for mass-production is achieved.

Abstract: A bit cell of an organic memory is provided. The bit cell of the organic memory comprises an organic memory cell, a first transistor, a current mirror and a second transistor. To connect the organic memory cell to a data line, the first transistor is activated for reading and the second transistor is activated for writing. Furthermore, the first transistor has a greater size than the second transistor. Therefore, a fast processing time in writing and a large conduction current in reading are catered for. In addition, the current mirror amplifies the conduction current in reading and increases the capacity for resisting the interference by adjacent bit cell.

Abstract: A bit cell of an organic memory is provided. The bit cell of the organic memory comprises an organic memory cell, a first transistor, a current mirror and a second transistor. To connect the organic memory cell to a data line, the first transistor is activated for reading and the second transistor is activated for writing. Furthermore, the first transistor has a greater size than the second transistor. Therefore, a fast processing time in writing and a large conduction current in reading are catered for. In addition, the current mirror amplifies the conduction current in reading and increases the capacity for resisting the interference by adjacent bit cell.

Abstract: A memory array including a plurality of programmable memory cells, a plurality of column lines and a plurality of row lines is introduced. Each of the programmable memory cells is coupled to corresponding one of the column lines and corresponding one of the row lines. Each of the programmable memory cells includes an organic memory cell and an active switching element. The active switching element is controlled by the column line and interposed between the row line and the organic memory cell. Under controlling of the column line, the active switching element is turned on to coupling the row line and the organic memory cell to connect to each other.

Abstract: Brightness control circuits and drivers and display devices using the same. In the brightness control circuit, a current digital-to-analog converter (DAC) receives a digital code and generates a control current, and an one-shot circuit is coupled to the current DAC to generate a pulse width modulated (PWM) signal according to the control current and a clock signal. The digital code and pulse width modulated signal have an exponential relationship.