Patents by Inventor Siegfried Schwarzl

Siegfried Schwarzl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7259441
    Abstract: A pattern of voids in an integrated circuit having a first layer, a first layer surface and adjacent lands on the first layer surface, the adjacent lands enclosing spaces and including a second layer of a first isolation material and a third layer of a second isolation material arranged on the second layer. The pattern of voids has a fourth layer of a third isolation material which closes off at least some of the spaces and cannot be deposited on the first isolation material. The fourth layer is arranged on the third layer and has a second layer surface. Spaces that are not closed off by means of the fourth layer are filled with electrically conductive material. In the method for producing a pattern of voids in an integrated circuit, a second layer of a first isolation material is applied to a first layer surface of a first layer. A third layer of a second isolation material is applied to the second layer, the third layer acquiring a second layer surface which is arranged parallel to the first layer surface.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: August 21, 2007
    Assignee: Infineon Technologies AG
    Inventors: Werner Pamler, Siegfried Schwarzl, Zvonimir Gabric
  • Publication number: 20070082413
    Abstract: To integrate a capacitor device (40) into the region of a semiconductor memory device with a particularly small number of process steps, a lower electrode device (43) and an upper electrode device (44) of the capacitor device (40) are provided to be formed directly underneath or directly above the material region (30) which has the memory elements (20), in such a way that as a result at least a part of the material region (30) which has the memory elements (20) functions at least as part of the respective dielectric (45) between the electrode devices (43, 44).
    Type: Application
    Filed: May 21, 2002
    Publication date: April 12, 2007
    Inventors: Joachim Nuetzel, Till Schloesser, Siegfried Schwarzl, Stefan Wurn
  • Publication number: 20060292459
    Abstract: An EUV mask having elevated sections and trenches lying in between is disclosed. In one embodiment, the mask includes at least a substrate layer having a very low coefficient of thermal expansion, a multilayer, and a capping layer. The elevated sections of the EUV mask are arranged on a continuous conductive layer.
    Type: Application
    Filed: June 15, 2006
    Publication date: December 28, 2006
    Inventors: Frank-Michael Kamm, Siegfried Schwarzl, Christian Holfeld
  • Publication number: 20060275928
    Abstract: A magnetoresistive semiconductor memory device is proposed, in which a magnetic field can be applied to memory cells by means of a magnetic field applying device such that a desired magnetization can be impressed on hard-magnetic layers of the memory cells acted on.
    Type: Application
    Filed: March 27, 2003
    Publication date: December 7, 2006
    Inventors: Stefan Wurm, Siegfried Schwarzl
  • Patent number: 7078134
    Abstract: A photolithographic mask for patterning a photosensitive material, in particular on a wafer, has at least one structure region for imaging a structure on the photosensitive material, and an absorber structure for absorbing incident radiation. At least one structure region is provided and has at least one thin protective coating of only a few atomic layers made of chemically and mechanically resistive material selected from Al2O3, Ta2O5, ZrO2, and HfO2formed by atomic layer chemical vapor deposition (ALCVD) so that the protective coating constitutes a negligible alteration of nominal or critical dimensions for the structure region, and in which additional absorption or reflection losses are negligibly low. In this way, the photolithographic mask can be cleaned chemically and/or mechanically, without the structure regions being attacked and damaged by the chemical and/or mechanical cleaning media. Furthermore, a plurality of methods are possible for fabricating this photolithographic mask.
    Type: Grant
    Filed: May 21, 2003
    Date of Patent: July 18, 2006
    Assignee: INfineon Technologies AG
    Inventors: Stefan Wurm, Siegfried Schwarzl
  • Publication number: 20060147839
    Abstract: A radiation-sensitive coating material, in addition to a base polymer, has a solvent and a radiation-active substance which forms an acid on irradiation by light (including energetic electrons or ions), a fluorescent substance which alters its fluorescence property subject to a change in the acid content of its surroundings. In a process for exposing a substrate coated with the coating material at least one sensor in the exposure chamber of the exposure apparatus measures the intensity of the change in fluorescence spectrum as a function of time during the exposure operation. From the course of intensity at the time of an individual line of the fluorescence spectrum or the intensity integrated over a wavelength interval it is possible to determine the endpoint of the exposure operation by way of electronic algorithms. Deviations from experimentally determined ideal curves of the intensity course provide information on erroneous functions in the course of coating material application and exposure.
    Type: Application
    Filed: March 6, 2006
    Publication date: July 6, 2006
    Inventors: Jenspeter Rau, Siegfried Schwarzl, Stefan Wurm
  • Publication number: 20060132046
    Abstract: A device generates and/or influences electromagnetic radiation from a plasma, for the lithographic production of semiconductor elements. For example, the device generates and/or reflects EUV-radiation for EUV-lithography. In a first example, a magnetic means (10) generates at least one inhomogeneous magnetic field (11) and is provided as means for the targeted screening of at least one surface of the device (1; 5; 12) and/or another component (5; 12) from the charge carriers in the plasma (3).
    Type: Application
    Filed: November 30, 2005
    Publication date: June 22, 2006
    Inventors: Siegfried Schwarzl, Stefan Wurm
  • Patent number: 7064439
    Abstract: An integrated electrical circuit having a plurality of structure planes is described. Electrically active elements are situated on at least one element structure plane, where at least one insulation layer is disposed above the element structure plane. Electrical connecting leads are disposed within and/or above the insulation layer, where at least a portion of the connecting leads contain copper. At least one diffusion blocker is disposed underneath the connecting leads, which diffusion blocker impedes and/or prevents the diffusion of copper. The integrated electrical circuit is configured according to the invention such that the diffusion blocker is configured as a blocker layer which is interrupted only in the region of contact holes and/or connection pieces and that the blocker layer is situated between the element structure plane and the insulation layer.
    Type: Grant
    Filed: June 16, 2000
    Date of Patent: June 20, 2006
    Assignee: Infineon Technologies AG
    Inventors: Jörg Berthold, Siegfried Schwarzl
  • Patent number: 7029808
    Abstract: A radiation-sensitive coating material, in addition to a base polymer, has a solvent and a radiation-active substance which forms an acid on irradiation by light (including energetic electrons or ions), a fluorescent substance which alters its fluorescence property subject to a change in the acid content of its surroundings. In a process for exposing a substrate coated with the coating material at least one sensor in the exposure chamber of the exposure apparatus measures the intensity of the change in fluorescence spectrum as a function of time during the exposure operation. From the course of intensity at the time of an individual line of the fluorescence spectrum or the intensity integrated over a wavelength interval it is possible to determine the endpoint of the exposure operation by way of electronic algorithms. Deviations from experimentally determined ideal curves of the intensity course provide information on erroneous functions in the course of coating material application and exposure.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: April 18, 2006
    Assignee: Infineon Technologies AG
    Inventors: Jenspeter Rau, Siegfried Schwarzl, Stefan Wurm
  • Patent number: 7023063
    Abstract: A method referred to as a “cellular damascene method” utilizes a multiplicity of regularly arranged closed cavities referred to as “cells”, which are produced in a patterning layer. The dimensions of the cavities are on the order of magnitude of the microstructures to be produced. Selected cavities are opened by providing a mask and partitions situated between adjacent opened cavities are removed to provide trenches and holes which are filled with the material of the microstructure to be fabricated. Protruding material is removed by means of a chemical-mechanical polishing step. The microstructures are, in particular, interconnects and contact holes of integrated circuit.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: April 4, 2006
    Assignee: Infineon Technologies AG
    Inventors: Zvonimir Gabric, Werner Pamler, Siegfried Schwarzl
  • Publication number: 20060029866
    Abstract: An EUV Lithography mask, a fabrication method, and use method thereof is provided. A preferred embodiment comprises a substrate, a Bragg reflector disposed upon the substrate, a buffer disposed upon the Bragg reflector, and an absorber layer disposed upon the buffer. The materials in the mask have selected magnetic properties. In a preferred embodiment, the buffer is a hard magnetic material, and the absorber is a soft magnetic material. Another preferred embodiment includes a mask manufacturing method further including a mask step. In a preferred embodiment, an electron mirror microscope is used to inspect the mask by imaging its topography with respect to its magnetic properties in an applied magnetic field.
    Type: Application
    Filed: August 5, 2004
    Publication date: February 9, 2006
    Inventors: Siegfried Schwarzl, Stefan Wurm
  • Publication number: 20060024589
    Abstract: A reflector structure suitable for extreme ultraviolet lithography (EUVL) is provided. The structure comprises a substrate having a multi-layer reflector. A capping layer is formed over the multi-layer reflector to prevent oxidation. In an embodiment, the capping layer is formed of an inert oxide, such as Al2O3, HfO2, ZrO2, Ta2O5, Y2O3-stabilized ZrO2, or the like. The capping layer may be formed by reactive sputtering in an oxygen environment, by non-reactive sputtering wherein the materials are sputtered directly from the respective oxide targets, by non-reactive sputtering of the metallic layer followed by full or partial oxidation (e.g., by natural oxidation, by oxidation in oxygen-containing plasmas, by oxidation in ozone (O3), or the like), by atomic level deposition (e.g., ALCVD), or the like.
    Type: Application
    Filed: July 28, 2004
    Publication date: February 2, 2006
    Inventors: Siegfried Schwarzl, Stefan Wurm
  • Publication number: 20050250344
    Abstract: An annular microstructure element, in particular an annularly arranged monolayer or multilayer thin film, is formed over a substrate (S), e.g., for use in a magnetoresistive memory. To that end, a masking layer is applied over the substrate. An opening (C) is etched into the masking layer, so that a partial region of the surface is uncovered. The etching operation is performed in such a way that the opening (C) is formed with an overhang (B). The overhang at least partially shades the uncovered surface from an incident particle beam (TS). A particle beam (TS) is directed at the substrate (S) at an oblique angle (?) of incidence. In this case, the substrate (S) is rotated relative to the directed particle beam (TS). From the particle beam, material is thereby deposited annularly on the uncovered surface for the purpose of forming a hole-like microstructure element (R).
    Type: Application
    Filed: April 22, 2005
    Publication date: November 10, 2005
    Inventors: Alfred Kersch, Wolfgang Raberg, Siegfried Schwarzl
  • Publication number: 20050223973
    Abstract: An EUV lithography system is disclosed. The EUV lithography system comprises a mask chamber having one or more vacuum valves for isolating the mask chamber from the rest of the lithography system, a gas supply line adapted to provide an inert gas to the mask chamber to dechuck the reticle, and a vacuum pump adapted to re-evacuate the mask chamber after the reticle has been released. The one or more vacuum valves are closed to isolate the mask chamber from the rest of the EUV lithography system before venting the mask chamber with an inert gas, such as nitrogen, to release the reticle from the chuck. The chuck in the EUV system may further comprise a contact surface for holding a back surface of the reticle to the chuck, and a plurality of openings in the chuck, each opening having a first end and a second end, the first end of each opening being coupled to the gas supply line, and the second end of each opening being coupled to the contact surface of the chuck.
    Type: Application
    Filed: March 30, 2004
    Publication date: October 13, 2005
    Applicant: Infineon Technologies AG
    Inventors: Siegfried Schwarzl, Stefan Wurm
  • Publication number: 20050214467
    Abstract: A method for smoothing areas of a structure made of a first material having a predetermined first glass transition temperature on a carrier includes the steps of: (1) applying a second material having a predetermined second glass transition temperature, so that the surface of the structure of the first material is at least partially covered by the second material; (2) increasing the temperature of the first material to a first predeterminable temperature, which is greater than the first glass transition temperature; and (3) lowering the temperature of the first material below the first glass transition temperature of the first material.
    Type: Application
    Filed: February 22, 2005
    Publication date: September 29, 2005
    Applicant: Infineon Technologies AG
    Inventors: Wolf-Dieter Domke, Siegfried Schwarzl
  • Patent number: 6943393
    Abstract: Memory cell arrangement having a memory cell array which has at least one layer of magnetoresistive memory components (11) which are each connected to first contact-making lines (10), the first contact-making lines (10) lying within a first dielectric layer (6), and are each connected to second contact-making lines (20; 29; 35), the second contact-making lines (20; 29; 35) lying within a second dielectric layer (17; 27; 32).
    Type: Grant
    Filed: August 28, 2001
    Date of Patent: September 13, 2005
    Assignee: Infineon Technologies AG
    Inventors: Stefan Miethaner, Siegfried Schwarzl, Annette Saenger
  • Patent number: 6930052
    Abstract: In order to fabricate a metallization plane with lines and contacts, four dielectric layers are applied to a substrate. Firstly, contact holes are etched through the top two dielectric layers into the underlying dielectric layer, the remaining thickness of the latter layer being essentially equal to the thickness of the top layer. Line trenches are subsequently etched selectively with respect to the first dielectric layer and the third dielectric layer, whose surfaces are uncovered essentially simultaneously. After the first dielectric layer and the third dielectric layer have been patterned, contacts and lines are produced in the contact holes and line trenches.
    Type: Grant
    Filed: September 3, 2003
    Date of Patent: August 16, 2005
    Assignee: Infineon Technologies AG
    Inventors: Siegfried Schwarzl, Manfred Engelhardt, Franz Kreupl
  • Patent number: 6925002
    Abstract: In the memory cell array of a semiconductor memory the memory elements or memory cells with a magnetoresistive effect can have a hard-magnetic memory layer and a soft-magnetic sensor layer. The magnetization axis of the hard-magnetic layer lies parallel to the line connected thereto, and the magnetization axis lies parallel to the line connected thereto. By an AC voltage or AC current source, a voltage or current signal is impressed on a respective selected line. The magnetization direction of the soft-magnetic layer is sinusoidally deflected from the easy magnetization axis. In addition to the impressed signal, the magnetoresistive resistance of the memory cell also changes as a result. Depending on the magnetization direction of the hard-magnetic layer, the signal is modulated in-phase or in-antiphase by the variable resistance. The sign supplies the memory information.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: August 2, 2005
    Assignee: Infineon Technologies AG
    Inventor: Siegfried Schwarzl
  • Patent number: 6872495
    Abstract: A method for fabricating a lithographic reflection mask in particular for patterning of semiconductor wafers, is described, and can be used for extremely small feature sizes below 100 nm. In known lithographic methods with EUV radiation (extreme ultraviolet), for the mask fabrication, a multilayer reflection layer is applied to a substrate. An absorber layer is deposited after the multilayer layer is patterned above the multilayer layer or is completely introduced into the latter. In the case of the method according to the invention, in contrast, the absorber layer is applied between the substrate and the reflection layer and/or on the side areas of the reflection layer. This has the advantage of reducing CD changes due to shadowing of structures lying above the reflection layer. Further advantages are, inter alia, smaller structure displacements and reduced asymmetrical intensity profiles of the reflected beams of radiation.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: March 29, 2005
    Assignee: Infineon Technologies AG
    Inventor: Siegfried Schwarzl
  • Patent number: RE39799
    Abstract: In a storage cell array, a first and a second line are provided which have a crossing point, at which a storage element with magnetoresistive effect is disposed. A yoke is provided which surrounds one of the lines and that contains magnetizable material with a permeability of at least 10. The yoke is disposed in such a way that a magnetic flow is closed substantially through the storage element.
    Type: Grant
    Filed: May 8, 2003
    Date of Patent: August 28, 2007
    Assignee: Infineon Technologies AG
    Inventor: Siegfried Schwarzl