Abstract: The present disclosure provides an array substrate and a display panel including the same. The array substrate includes a plurality of pixel units. Each of the pixel units includes a main pixel electrode, a sub-pixel electrode, a first thin film transistor (TFT) electrically connected to the sub-pixel electrode, a second TFT electrically connected to the first TFT, and a third TFT electrically connected to the main pixel electrode. The first TFT includes a first channel and a first semiconductor layer. The first channel includes two or more subchannels. The first semiconductor layer includes two or more semiconductor sublayers. Each of the semiconductor sublayers is disposed in a corresponding subchannel.

Abstract: The present disclosure provides an array substrate and a display panel including the same. The array substrate includes a plurality of pixel units. Each of the pixel units includes a main pixel electrode, a sub-pixel electrode, a first thin film transistor (TFT) electrically connected to the sub-pixel electrode, a second TFT electrically connected to the first TFT, and a third TFT electrically connected to the main pixel electrode. The first TFT includes a first channel and a first semiconductor layer. The first channel includes two or more subchannels. The first semiconductor layer includes two or more semiconductor sublayers. Each of the semiconductor sublayers is disposed in a corresponding subchannel.

Abstract: A display device is disclosed. The display device includes a display panel and a driving chip. The display panel includes at least a first display area and a second display area arranged side by side along a first direction. In the present application, by controlling any two adjacent display areas to scan toward each other or to scan away from each other, at least one scanning lines in the first display area and at least one scanning lines in the second display area simultaneously receive driving signals input from the driving chip.

Abstract: A backlight module and a display device having same are disclosed. The backlight module comprises a plurality of backplanes that are combined. A plurality of light emitting units are disposed on the backplane for emitting light under control of power source high potential signals and power source low potential signals. The light emitting units include first light emitting units that are located in a combining area of adjacent backplanes and second light emitting units that are located in other areas of the backplanes. On at least one of the backplanes, intensity of first power source high potential signals corresponding to the first light emitting units is greater than that of second power source high potential signals corresponding to the second light emitting units.

Abstract: A display device is disclosed. The display device includes a display panel and a driving chip. The display panel includes at least a first display area and a second display area arranged side by side along a first direction. In the present application, by controlling any two adjacent display areas to scan toward each other or to scan away from each other, at least one scanning lines in the first display area and at least one scanning lines in the second display area simultaneously receive driving signals input from the driving chip.

Abstract: A pixel driving circuit and a liquid crystal display panel are proposed. The pixel driving circuit includes a first transistor, a second transistor and a third transistor. Gates of the first transistor, the second transistor and the third transistor are electrically connected to a scan line, an electrode of the first transistor is electrically connected to a first electrode of the second transistor, and a second electrode of the second transistor is electrically connected to a first electrode of the third transistor. The second electrode of the third transistor is connected to the first common electrode such that a voltage difference between the main sub-pixel unit and the subsidiary sub-pixel unit could exist when the voltage signal flows through the first transistor, the second transistor, and the third transistor. This increases the aperture rate of the display panel and avoids the parasitic capacitance and thus the display effect is improved.

Abstract: The disclosure provides an LCD panel and an LCD device. A common line is arranged in the LCD panel, and a projection of the common line on a substrate overlaps with a projection of a data line on the substrate, which prevents a pixel electrode from being affected by the data line. The common line reduces an area of a light-shading area, which enlarges a display area, increases an aperture ratio of the LCD panel, and alleviates a technical problem that an aperture ratio of conventional LCD panels is too low.

Abstract: Disclosed is a touch panel and a method for manufacturing the same. The panel includes a first metal layer formed on a substrate, a first insulation layer formed on the first metal layer, a second metal layer formed on the first insulation layer, a second insulation layer formed on the second metal layer, and an electrode layer formed on the second insulation layer.

Abstract: The present disclosure relates to a display substrate. The display substrate includes a substrate, a plurality of thin film transistors (TFTs), and data lines. Each of the TFT includes a gate electrode configured on different layer with the data line. A projection of the gate electrode on a plane partially overlaps with the data lines, wherein the data lines are arranged on the plane. A portion of an orthogonal projection of the gate electrode on the plane is arranged on one side of the data line, wherein the portion is not overlapped by the data lines, and the data lines are arranged on the plane.

Abstract: Provided is a vertical alignment liquid crystal display, comprising a plurality of data lines, a plurality of scan lines and a plurality of common electrode lines; the scan lines intersect the data lines and the common electrode lines to form a plurality of pixel regions arranged in an array; the sub pixel region comprises a first thin film transistor, a second thin film transistor and a sub pixel, and gates of the first thin film transistor and second thin film transistor are coupled to a same scan line, and drains of the first thin film transistor and second thin film transistor are respectively coupled to a data line and a common electrode line which are adjacent, and sources of the first thin film transistor and second thin film transistor are coupled to the sub pixel; the main pixel region comprises a third thin film transistor and a sub pixel.

Abstract: Provided is a vertical alignment liquid crystal display, comprising a plurality of data lines and a plurality of scan lines, wherein the data lines and the scan lines intersect to form a plurality of pixel regions, and each pixel region is surrounded by two adjacent data lines and two adjacent scan lines; wherein each pixel region comprises a switching thin film transistor and a sub pixel, and a gate and a drain of the switching thin film transistor are respectively connected to the scan line and the data line, and a source of the switching thin film transistor is connected to the sub pixel; in two adjacent pixel regions in the same row, a first capacitor is connected in series between the sources of the two switching thin film transistors, and the source of each of the switching thin film transistors is connected to only one of the first capacitors.

Abstract: A liquid crystal display panel and device is provided. In the panel, a gate electrode of a first thin-film transistor of a pixel at (n)th row and (2k+1)th column connects to a second scan line of pixels in (n?1)th row, a source electrode of the first thin-film transistor of the pixel at (n)th row and (2k+1)th column connects to a corresponding common line, and a drain electrode of the first thin-film transistor of the pixel at (n)th row and (2k+1)th column connects to a pixel at (n)th row and (2k+1)th column.

Abstract: A method for aligning liquid crystals is provided, and includes steps of providing a first substrate, forming a first electrode layer and a first alignment film on the first substrate; a second substrate, forming a second electrode layer and a second alignment film on the first substrate; forming a liquid crystal layer between the first alignment film and the second alignment film; providing an electrode plate and disposing the electrode plate on a side of the first substrate away from the first electrode layer; and applying a driving voltage between the electrode plate and the second electrode layer to align on the liquid crystal layer.

Abstract: A display panel and a liquid crystal display (LCD) are disclosed. The display panel includes multiple basic pixel units arranged in an array. Each basic pixel unit includes a first pixel unit and a second pixel unit aligned vertically. When the first and second pixel units are under a same effective input signal, the selected sub-pixel unit of the first pixel unit has a greater voltage on its liquid crystal capacitor than that of the selected sub-pixel unit of the second pixel unit. The present invention provides different voltages on the sub-pixel units' liquid crystal capacitors, thereby improving LCD's viewing angle, color deviation, and display quality.

Abstract: Disclosed are a touch panel and a method for manufacturing the same. The panel includes: a first metal layer disposed on a substrate; a first insulating layer disposed on the first metal layer; a second metal layer disposed on the first insulating layer; a second insulating layer disposed on the second metal layer; and an electrode layer disposed on the second insulating layer.

Abstract: The present invention provides a pixel electrode and a liquid crystal display panel. The pixel electrode includes a first enclosure frame (15) that is connected to distal ends of all pixel electrode branches (13) and a trunk (11) and at least a second enclosure frame (17) that is set around an outer circumference of the first enclosure frame (15) and connected to the trunk (11) so that electric fields at edges of the pixel electrode are made regular and uniform by means of the arrangement of the first enclosure frame (15) and the second enclosure frame (17) and thus, liquid crystal molecules located around edges of a sub-pixel could be oriented in a more consistent or more uniform manner, making it possible to eliminate dark patterns at the edges of the sub-pixel and increasing the optical transmission rate of the liquid crystal display panel.

Abstract: A touch panel includes a first strobe circuit, at least two touch electrodes arranged along a row direction, and at least two wirings connecting with each of the touch electrodes. The first strobe circuit includes at least two first ends and at least two second ends, one of the first end is configured for providing touch driving signals, each of the second ends directly or indirectly connects with one wiring, a number of the first ends is smaller than the number of the second ends, and the first end for providing the touch driving signals selectively connects to one of the second ends. In this way, the number of the driving wirings may be reduced, and so does the dimension occupied by the driving wirings, which is beneficial to the narrow border design.

Abstract: Provided is a liquid crystal display, comprising a plurality of data lines and a plurality of scan lines, wherein the data lines and the scan lines intersect to form a plurality of pixel regions; each pixel region is provided with a switching TFT and a sub pixel, and a gate and a drain of the switching TFT are respectively connected to the scan line and the data line, and a source of the switching TFT is connected to the sub pixel; all switching TFTs in each row of pixel regions comprise first switching TFTs and second switching TFTs, and the first switching TFTs in each row of pixel regions are connected to a first scan line, a boundary of the row of pixel regions, and the second switching TFTs in each row of pixel regions are connected to a second scan line, a boundary of the row.

Abstract: Provided is a vertical alignment liquid crystal display, comprising a plurality of data lines and a plurality of scan lines, wherein the data lines and the scan lines intersect to form a plurality of pixel regions, and each pixel region is surrounded by two adjacent data lines and two adjacent scan lines; wherein each pixel region comprises a switching thin film transistor and a sub pixel, and a gate and a drain of the switching thin film transistor are respectively connected to the scan line and the data line, and a source of the switching thin film transistor is connected to the sub pixel; in two adjacent pixel regions in the same row, a first capacitor is connected in series between the sources of the two switching thin film transistors, and the source of each of the switching thin film transistors is connected to only one of the first capacitors.

Abstract: Provided is a vertical alignment liquid crystal display, comprising a plurality of data lines, a plurality of scan lines and a plurality of common electrode lines; the scan lines intersect the data lines and the common electrode lines to form a plurality of pixel regions arranged in an array; the sub pixel region comprises a first thin film transistor, a second thin film transistor and a sub pixel, and gates of the first thin film transistor and second thin film transistor are coupled to a same scan line, and drains of the first thin film transistor and second thin film transistor are respectively coupled to a data line and a common electrode line which are adjacent, and sources of the first thin film transistor and second thin film transistor are coupled to the sub pixel; the main pixel region comprises a third thin film transistor and a sub pixel.