Abstract: The invention provides a DEMUX circuit, comprising: data bus, a first, second and third data lines, connected respectively to data bus and a first unit, a second unit and a third unit respectively; each unit respectively comprising: a TFT, a second TFT, a third TFT, and a capacitor, and inputting corresponding a first, a second, and a third switch signals; for each unit, during operation, when the first switch signal being turned on, the first TFT and the second TFT being turned on, and the corresponding data line is pre-charged; when the first switch signal being turned off, the second switch signal being turned on and the corresponding data line being charged to a preset voltage. The DEMUX circuit of the invention can increase the TFT gate driving voltage, leading to improving TFT electron mobility from IGZO and a-Si process, and improving the data line charging rate.

Abstract: A large-size liquid crystal display is disclosed. The display includes multiple sub-pixels arranged as a matrix, multiple rows of scanning lines, and multiple columns of data lines which are vertically intersected to form multiple pixel regions; the multiple sub-pixels arranged as a matrix are respectively located in the multiple pixel regions; wherein each row of the scanning lines includes two scanning line segments, and each column of data lines also includes two data line segments, and a space between the two scanning line segments on each scanning line is set as a first breakpoint, a space between the two data line segments on each data line is set as a second breakpoint, and multiple first breakpoints corresponding to the multiple rows of scanning lines are randomly distributed, and multiple second breakpoints corresponding to the multiple columns of data lines are randomly distributed. The present invention can eliminate a poor display.

Abstract: A display panel includes a plurality of amplifying circuits arranged in a non-display area and a plurality of gate lines. An input terminal of the amplifying circuit is connected to an output terminal of one or more cascade circuit. An output terminal of the amplifying circuit is connected to a gate line. The amplifying circuit is configured to adjust an output signal from the connected cascade circuit to be a scanning signal and output the scanning signal to the gate line. A liquid crystal display using the display panel is also proposed. The present disclosure simplifies the gate driving circuit, thereby solving the problem of unstable signal transmitting among various stages in the gate driving circuit.

Abstract: Disclosed are a display assembly and a manufacturing method thereof. The first glass substrate and the polymer stabilization vertical alignment machine metal stage are used to connect a driving circuit to receive a driving signal. The display assembly is used to generate a capacitive coupling effect between the first glass substrate and the second glass substrate with the driving signal to form a voltage difference. The liquid crystal molecules are arranged at a preset angle with the voltage difference. The display assembly is also used to receive incident light for curing the liquid crystal molecules. The embodiments are beneficial for reducing the driving traces of the panel and improving the utilization of the glass.

Abstract: A display panel and a liquid crystal display (LCD) are disclosed. The display panel includes multiple basic pixel units arranged in an array. Each basic pixel unit includes a first pixel unit and a second pixel unit aligned vertically. When the first and second pixel units are under a same effective input signal, the selected sub-pixel unit of the first pixel unit has a greater voltage on its liquid crystal capacitor than that of the selected sub-pixel unit of the second pixel unit. The present invention provides different voltages on the sub-pixel units' liquid crystal capacitors, thereby improving LCD's viewing angle, color deviation, and display quality.

Abstract: A display panel and liquid crystal display device are disclosed. The display panel includes: multiple sub-pixel units are arranged as an N×M matrix; a i-th gate line respectively connected to the sub-pixel units of (2i?1)-th row and the sub-pixel units of (2i)-th row; and a (2j?1)-th source line respectively connected to the sub-pixel units of j-th column and a first row, and a 2j-th source line respectively connected to the sub-pixel units of j-th column and a second row. The present invention can increase the charging rate, and reduce the number of the gate lines and source lines to save cost.

Abstract: An array substrate, manufacturing method thereof and display device are provided. The array substrate includes a plurality of scan lines, a plurality of data lines intersecting with the plurality of scan lines to as to define a plurality of pixel areas; a plurality of auxiliary segments, and each scan line and/or each data line respectively corresponding to at least a auxiliary segment, the scan line and/or data line and the corresponding auxiliary segment forming capacitive coupling to reduce signal delay on the scan line and/or data line. As such, the signal delay on the scan line and/or data line is reduced, and the charging rate and display effect are improved.

Abstract: The present disclosure relates to a display substrate. The display substrate includes a substrate, a plurality of thin film transistors (TFTs), and data lines. Each of the TFT includes a gate electrode configured on different layer with the data line. A projection of the gate electrode on a plane partially overlaps with the data lines, wherein the data lines are arranged on the plane. A portion of an orthogonal projection of the gate electrode on the plane is arranged on one side of the data line, wherein the portion is not overlapped by the data lines, and the data lines are arranged on the plane.

Abstract: A liquid crystal display panel and device is provided. In the panel, a gate electrode of a first thin-film transistor of a pixel at (n)th row and (2k+1)th column connects to a second scan line of pixels in (n?1)th row, a source electrode of the first thin-film transistor of the pixel at (n)th row and (2k+1)th column connects to a corresponding common line, and a drain electrode of the first thin-film transistor of the pixel at (n)th row and (2k+1)th column connects to a pixel at (n)th row and (2k+1)th column.

Abstract: The present invention demonstrates a kind of thin film transistor and a liquid crystal display panel. The thin film transistor substrate includes a substrate and the stacking structure of the first common electrode and the pixel electrode which are isolated from each other. A hollow structure is located in a position where the pixel electrode and the first common electrode overlap and shape of the hollow structure is related to the first common electrode It could increase the control of the electric field of the liquid crystal, decrease the width of the dark line of the pixel, improve the performance and transmittance of the liquid crystal, avoid the through via, and prevent the short-circuited problem.

Abstract: The present invention provides a liquid crystal display panel, array substrate and method for manufacturing the same. The method for manufacturing the array substrate comprises the steps of: arranging simultaneously a patterned gate layer and common electrodes on a substrate; covering a gate insulating layer on the patterned gate layer, the common electrode and the substrate; arranging a semiconductor layer on the gate insulating layer; arranging a source/drain electrode pattern layer on the semiconductor layer, and arranging pixel electrodes and data lines on the gate insulating layer simultaneously; and covering a passivation layer on the source/drain electrode pattern layer, the semiconductor layer, the pixel electrodes and the data lines. The pixel aperture ratio and transmittance can be increased, and achieving a better displaying effect by the present invention.

Abstract: An array substrate includes a plurality of display pixels arranged in an array. Each of the plurality of display pixels comprises a red subpixel R, a green subpixel G, and a blue subpixel B. Six of the consecutive display pixels arranged horizontally and/or longitudinally as a whole are repeatedly arranged in a pixel unit. An arrangement order of the subpixels in each of the six consecutive display pixels is totally different. The subpixels in the six consecutive display pixels are arranged as RGB, RBG, GRB, GBR, BRG, and BGR successively. The technical problems of the conventional tri-gate driver structure, such as poor image display and display quality, are resolved due to poor charging ability of pixels which are inclined to incomplete charging.

Abstract: The present disclosure relates to an array substrate and a display panel. The array substrate includes a plurality of scanning lines, a plurality of data lines, and at least one low voltage line. The scanning lines and the data lines intersect with other to form a plurality of pixel cells. Each of the pixel cells includes a first transistor. At least one of the pixel cell further includes a second transistor having a first end, a second end, and a control end. The first end connects to the control end of the first transistor, and the control end connects to a succeeding scanning line. The succeeding scanning line is turned on after the scanning line at a current level is turned on, and the scanning line corresponds to the pixel cell where the second transistor is located.

Abstract: The present disclosure provides a driving method and a driving device of a liquid crystal display panel, where the driving method includes applying a liquid crystal voltage on each pixel is obtained when a preset grayscale voltage is input. The liquid crystal voltage is a difference between a pixel voltage and a common voltage. A compensated grayscale voltage is obtained according to the liquid crystal voltage, and an initial grayscale voltage is transformed to a target grayscale voltage according to the compensated grayscale voltage, where the target grayscale voltage is input to the liquid crystal display panel.

Abstract: The present disclosure provides a liquid crystal display panel and apparatus which includes a first pixel unit and a second pixel unit. The first pixel unit includes a first thin film transistor, a first charging capacitor, a second charging capacitor. One side of the first charging capacitor is connected the drain of the first thin film transistor. the other side of the first charging capacitor is connected the second charging capacitor; the second pixel unit includes a second thin film transistor; the drain of the second thin film transistor is connected to the other side of the first charging capacitor.

Abstract: The invention provides a method for obtaining LCD charging ratio, comprising: measuring V-T curve of LCD, voltage corresponding to peak (D1) of V-T curve being data signal voltage (Vdata); lighting up heavy-duty and light-duty images of LCD according to same grayscale respectively, measuring actual display brightness of the heavy-duty and the light-duty images; computing a ratio between the actual display brightness of the heavy-duty and light-duty images; using the ratio between the actual display brightness of the heavy-duty and light-duty images as a ratio to find and mark a measure point (D2) on V-T curve forming the ratio with peak (Vpixel), voltage corresponding to measure point (D2) being peak value of pixel voltage; computing LCD charging ratio according to peak value (Vpixel) of pixel voltage and data signal voltage (Vdata). As such, accuracy is high and applicable to verifying accuracy of results obtained by using conventional.

Abstract: The present invention proposes a touch panel, an array substrate, and method for fabricating for the same. The array substrate includes a pixel electrode layer and a touch electrode layer insulated against the pixel electrode layer. The touch electrode layer is arranged on one side of the pixel electrode layer facing a touch operational space. By using the present invention, sensitivity of the touch panel is upgraded.

Abstract: The present invention provides a GOA circuit driving architecture, which comprises a plurality of data lines providing data signals, a plurality of scanning lines providing scanning signals, a plurality of pixel in array arrangement, each pixel is electrically connected to one of the data lines and one of the scanning lines. Odd stage GOA circuits are sequentially arranged on one side of AA area pixel Even stage GOA circuits are sequentially arranged on one other side of AA area pixel. Each stage of the GOA circuits outputs a gate signal to scan the corresponding scanning line, and each stage of the GOA circuits respectively are connected to a first low-frequency clock signal, a second low-frequency clock signal and a DC low voltage, the odd stage GOA circuits are connected to one of a first high-frequency clock signal and a third high-frequency clock signal, and the even stage of GOA circuits are connected to one of a second high-frequency clock signal and a fourth high-frequency clock signal.

Abstract: The invention provides a GOA driving circuit, comprising: a plurality of GOA units connected in cascade, each GOA unit comprising a pull-up control module (1), a pull-up module (2), a pull-down module (3), a first pull-down maintenance module (4), and a second pull-down maintenance module (5); on the basis of ensuring the normal function of the GOA unit, the pull-down module (3) uses one less TFT than the prior art, the first pull-down maintenance module (4) uses one less TFT than the prior art, the second pull-down maintenance module (5) uses one less TFT than the prior art, thereby saving the wiring area used by GOA driving circuit and facilitating the narrow border LCD. The invention provides an LCD using the GOA driving circuit. Therefore, the number of the TFTs of the GOA driving circuit is less, the wiring area is smaller, and the LCD border is narrower.

Abstract: A method for aligning liquid crystals is provided, and includes steps of providing a first substrate, forming a first electrode layer and a first alignment film on the first substrate; a second substrate, forming a second electrode layer and a second alignment film on the first substrate; forming a liquid crystal layer between the first alignment film and the second alignment film; providing an electrode plate and disposing the electrode plate on a side of the first substrate away from the first electrode layer; and applying a driving voltage between the electrode plate and the second electrode layer to align on the liquid crystal layer.