Abstract: Methods of fabricating electronic circuits and electronic packages are provided. The electronic circuit includes a multilayer circuit board, and a tamper-respondent sensor embedded within the circuit board. The tamper-respondent sensor defines, at least in part, a secure volume associated with the multilayer circuit board. In certain implementations, the tamper-respondent sensor includes multiple tamper-respondent layers embedded within the circuit board including, for instance, one or more tamper-respondent frames and one or more tamper-respondent mat layers, with the tamper-respondent frame(s) being disposed, at least in part, above the tamper-respondent mat layer(s), which together define the secure volume where extending into the multilayer circuit board.

Abstract: Manufacturing a batch is provided which includes a plurality of items of an electronic device, the items including a plurality of corresponding main modules having a same functional structure substantially identical for the items. The method includes defining at least one security electric circuit, of an enclosure component for enclosing each item, adapted to protect the item from tampering, the security electric circuits having individual configurations substantially different among the items, for use in forming the security electric circuit with the corresponding configuration on each enclosure component. Additionally, the method includes determining one or more electric characteristics of each security electric circuit for use in configuring a monitoring circuit of the corresponding main module, the monitoring circuit being adapted to the corresponding security electric circuit for detecting the tampering, according to the electric characteristics of the corresponding security circuits.

Abstract: A method includes determining, by a persistent memory lockstep unit of a hardware security module, that a first processor is attempting to change a state of the hardware security module. The method also includes determining, by the persistent memory lockstep unit, whether a second processor has attempted the same change. The method also includes preventing the change until both the first processor and the second processor have attempted the same change. The method also includes permitting the change to the state of the hardware security module based on a determination that both the first processor and the second processor have both attempted the same change.

Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include a multilayer circuit board, a tamper-detection sensor, and a vent structure. The tamper-detection sensor is embedded within the multilayer circuit board, and defines, at least in part, a secure volume associated with the multilayer circuit board. The vent structure is incorporated into the multilayer circuit board, and includes at least one vent channel. The vent channel(s) is in fluid communication with a space within the secure volume to facilitate venting the space of the secure volume. The space within the secure volume may accommodate, for instance, one or more electronic components to be protected, and the at least one vent channel may, for instance, allow air pressure within the space of the secure volume to equalize with air pressure external to the tamper-respondent assembly.

Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include an enclosure, an in-situ-formed tamper-detect sensor, and one or more flexible tamper-detect sensors. The enclosure encloses, at least in part, one or more electronic components to be protected, and the in-situ-formed tamper-detect sensor is formed in place over an inner surface of the enclosure. The flexible tamper-detect sensor(s) is disposed over the in-situ-formed tamper-detect sensor, such that the in-situ-formed tamper-detect sensor is between the inner surface of the enclosure and the flexible tamper-detect sensor(s). Together the in-situ-formed tamper-detect sensor and flexible tamper-detect sensor(s) facilitate defining, at least in part, a secure volume about the one or more electronic components.

Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include an enclosure, a tamper-detect sensor, a monitor, and a sensor connection adapter. The enclosure encloses, at least in part, one or more electronic components to be protected, and the tamper-detect sensor is disposed over an inner surface of the enclosure to facilitate defining a secure volume about the electronic component(s). The tamper-detect sensor includes sensor lines disposed over the inner surface of the enclosure, and the monitor monitors the tamper-detect sensor for a tamper event. The sensor connection adapter is coupled to the inner surface of the enclosure, and is disposed over the tamper-detect sensor within the secure volume. The sensor connection adapter facilitates electrically connecting the monitor to the sensor lines of the tamper-detect sensor.

Abstract: Embodiments of the present invention may involve providing security to a computing device. The providing security to a computing device may involve performing crypto-operations. A security system may include a central processing unit and a pre-processing unit. The pre-processing unit may be configured for receiving an incoming encapsulated request, parsing header infrastructure information of the encapsulated request, decapsulating the request, and providing the decapsulated request to the central processing unit for further processing.

Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include a multilayer circuit board, a tamper-detection sensor, and a vent structure. The tamper-detection sensor is embedded within the multilayer circuit board, and defines, at least in part, a secure volume associated with the multilayer circuit board. The vent structure is incorporated into the multilayer circuit board, and includes at least one vent channel. The vent channel(s) is in fluid communication with a space within the secure volume to facilitate venting the space of the secure volume. The space within the secure volume may accommodate, for instance, one or more electronic components to be protected, and the at least one vent channel may, for instance, allow air pressure within the space of the secure volume to equalize with air pressure external to the tamper-respondent assembly.

Abstract: Vented tamper-respondent assemblies and methods of fabrication are provided which include a multilayer circuit board, a tamper-detection sensor, and an in situ vent structure. The tamper-detection sensor is embedded within the multilayer circuit board, and defines, at least in part, a secure volume associated with the multilayer circuit board. The in situ vent structure is formed within the multilayer circuit board, and includes at least one vent channel. The vent channel(s) is in fluid communication with a space within the secure volume to facilitate venting the space of the secure volume. The space within the secure volume may accommodate, for instance, one or more electronic components to be protected, and the at least one vent channel may, for instance, allow air pressure within the space of the secure volume to equalize with air pressure external to the tamper-respondent assembly.

Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass enclosure enclosing, at least in part, at least one electronic component within a secure volume, and a tamper-respondent detector. The glass enclosure includes stressed glass with a compressively-stressed surface layer, and the tamper-respondent detector monitors, at least in part, the stressed glass to facilitate defining the secure volume. The stressed glass fragments with an attempted intrusion event through the stressed glass, and the tamper-respondent detector detects the fragmenting of the stressed glass. In certain embodiments, the stressed glass may be a machined glass enclosure that has undergone ion-exchange processing, and the compressively-stressed surface layer of the stressed glass may be compressively-stressed to ensure that the stressed glass fragments into glass particles of fragmentation size less than 1000 ?m with the intrusion event.

Abstract: Electronic circuits, electronic packages, and methods of fabrication are provided. The electronic circuit includes a multilayer circuit board, and a tamper-respondent sensor embedded within the circuit board. The tamper-respondent sensor defines, at least in part, a secure volume associated with the multilayer circuit board. In certain implementations, the tamper-respondent sensor includes multiple tamper-respondent layers embedded within the circuit board including, for instance, one or more tamper-respondent frames and one or more tamper-respondent mat layers, with the tamper-respondent frame(s) being disposed, at least in part, above the tamper-respondent mat layer(s), which together define the secure volume where extending into the multilayer circuit board.

Abstract: Methods of fabricating electronic circuits and electronic packages are provided. The electronic circuit includes a multilayer circuit board, and a tamper-respondent sensor embedded within the circuit board. The tamper-respondent sensor defines, at least in part, a secure volume associated with the multilayer circuit board. In certain implementations, the tamper-respondent sensor includes multiple tamper-respondent layers embedded within the circuit board including, for instance, one or more tamper-respondent frames and one or more tamper-respondent mat layers, with the tamper-respondent frame(s) being disposed, at least in part, above the tamper-respondent mat layer(s), which together define the secure volume where extending into the multilayer circuit board.

Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass.

Abstract: Electronic circuits, electronic packages, and methods of fabrication are provided. The electronic circuit includes a multilayer circuit board, and a tamper-respondent sensor embedded within the circuit board. The tamper-respondent sensor defines, at least in part, a secure volume associated with the multilayer circuit board. In certain implementations, the tamper-respondent sensor includes multiple tamper-respondent layers embedded within the circuit board including, for instance, one or more tamper-respondent frames and one or more tamper-respondent mat layers, with the tamper-respondent frame(s) being disposed, at least in part, above the tamper-respondent mat layer(s), which together define the secure volume where extending into the multilayer circuit board.

Abstract: Tamper-respondent assemblies and fabrication methods are provided which incorporate enclosure to circuit board protection. The tamper-respondent assemblies include a circuit board, and an electronic enclosure mounted to the circuit board and facilitating enclosing at least one electronic component within a secure volume. A tamper-respondent electronic circuit structure facilitates defining the secure volume, and the tamper-respondent electronic circuit structure includes a tamper-respondent circuit. An adhesive is provided to secure, in part, the electronic enclosure to the circuit board. The adhesive contacts, at least in part, the tamper-respondent circuit so that an attempted separation of the electronic enclosure from the circuit board causes the adhesive to break the tamper-respondent circuit, facilitating detection of the separation by a monitor circuit of the tamper-respondent electronic circuit structure.

Abstract: Methods of fabricating electronic circuits and electronic packages are provided. The electronic circuit includes a multilayer circuit board, and a tamper-respondent sensor embedded within the circuit board. The tamper-respondent sensor defines, at least in part, a secure volume associated with the multilayer circuit board. In certain implementations, the tamper-respondent sensor includes multiple tamper-respondent layers embedded within the circuit board including, for instance, one or more tamper-respondent frames and one or more tamper-respondent mat layers, with the tamper-respondent frame(s) being disposed, at least in part, above the tamper-respondent mat layer(s), which together define the secure volume where extending into the multilayer circuit board.

Abstract: One or more embodiments may provide the capability to enumerate maximal cliques of graph data by constructing and traversing a search tree through a single sequential pass on an adjacency list. The adjacency list may be generated so as to enable the at least one maximal clique to be generated in one single sequential pass.

Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass.

Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass.

Abstract: A method includes determining, by a persistent memory lockstep unit of a hardware security module, that a first processor is attempting to change a state of the hardware security module. The method also includes determining, by the persistent memory lockstep unit, whether a second processor has attempted the same change. The method also includes preventing the change until both the first processor and the second processor have attempted the same change. The method also includes permitting the change to the state of the hardware security module based on a determination that both the first processor and the second processor have both attempted the same change.