Patents by Inventor Silvio Dragone

Silvio Dragone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180314839
    Abstract: A method includes determining, by a persistent memory lockstep unit of a hardware security module, that a first processor is attempting to change a state of the hardware security module. The method also includes determining, by the persistent memory lockstep unit, whether a second processor has attempted the same change. The method also includes preventing the change until both the first processor and the second processor have attempted the same change. The method also includes permitting the change to the state of the hardware security module based on a determination that both the first processor and the second processor have both attempted the same change.
    Type: Application
    Filed: April 28, 2017
    Publication date: November 1, 2018
    Inventors: Silvio Dragone, Nihad Hadzic, William Santiago Fernandez, Tamas Visegrady
  • Publication number: 20180314649
    Abstract: A method includes determining, by a tracker controller of a hardware security module, that a first processor has submitted a first request to access a computing resource. The method also includes determining, by the tracker controller, whether the first request and a second request both request access to the same computing resource. The second request is submitted by a second processor. The method also includes preventing access to the computing resource based on a determination that the first request and the second request do not request access to the same computing resource. The method also includes permitting access to the computing resource based on a determination that the first request and the second request both request access to the same computing resource.
    Type: Application
    Filed: April 28, 2017
    Publication date: November 1, 2018
    Inventors: Silvio Dragone, Nihad Hadzic, William Santiago Fernandez, Tamas Visegrady
  • Publication number: 20180314650
    Abstract: A method includes determining, by a tracker controller of a hardware security module, that a first processor has submitted a first request to access a computing resource. The method also includes determining, by the tracker controller, whether the first request and a second request both request access to the same computing resource. The second request is submitted by a second processor. The method also includes preventing access to the computing resource based on a determination that the first request and the second request do not request access to the same computing resource. The method also includes permitting access to the computing resource based on a determination that the first request and the second request both request access to the same computing resource.
    Type: Application
    Filed: November 6, 2017
    Publication date: November 1, 2018
    Inventors: Silvio Dragone, Nihad Hadzic, William Santiago Fernandez, Tamas Visegrady
  • Patent number: 10097355
    Abstract: Embodiments are directed to an IC device comprising a set of N elements, and an interconnect system for enabling communication between the set of elements. Each element of the set of elements is configured according to a first communication plan to receive attestation data of each other element of the set of elements. Upon receiving the attestation data the element may determine whether each of the received attestation data from the other elements match an attestation pattern as defined in the first communication plan. In case the received attestation data match the first communication plan, the element may determine whether the received attestation data is attested by N?1 elements of the set of elements. In case the attestation data is attested by N?1 elements of the set of elements, the element may indicate the presence of the set of elements before the time interval has lapsed.
    Type: Grant
    Filed: April 4, 2016
    Date of Patent: October 9, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Silvio Dragone, Michael C. Osborne, Tamas Visegrady
  • Patent number: 10055510
    Abstract: A method is provided for searching a graph to identify cliques using a set of processing elements (PEs), a first PE of the set of PEs having access to an adjacency list of a seed vertex of the graph, the adjacency list of the seed vertex including a set of vertices. The method includes: generating a data structure for each intermediate vertex of the set of vertices, the data structure indicating the respective intermediate vertex and an additional list of intermediate vertices of the set of vertices; storing the generated data structures; for each buffered data structure, receiving the buffered data structure and configuring the available PE to receive an adjacency list of the intermediate vertex indicated in the respective data structure and to select from the adjacency list a set of further vertices that are adjacent to the seed vertex and are part of the additional list.
    Type: Grant
    Filed: November 4, 2015
    Date of Patent: August 21, 2018
    Assignee: International Business Machines Corporation
    Inventors: Kubilay Atasu, Silvio Dragone
  • Publication number: 20180235081
    Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include an enclosure, an in-situ-formed tamper-detect sensor, and one or more flexible tamper-detect sensors. The enclosure encloses, at least in part, one or more electronic components to be protected, and the in-situ-formed tamper-detect sensor is formed in place over an inner surface of the enclosure. The flexible tamper-detect sensor(s) is disposed over the in-situ-formed tamper-detect sensor, such that the in-situ-formed tamper-detect sensor is between the inner surface of the enclosure and the flexible tamper-detect sensor(s). Together the in-situ-formed tamper-detect sensor and flexible tamper-detect sensor(s) facilitate defining, at least in part, a secure volume about the one or more electronic components.
    Type: Application
    Filed: February 13, 2017
    Publication date: August 16, 2018
    Inventors: William L. BRODSKY, James A. BUSBY, John R. DANGLER, Silvio DRAGONE, Michael J. FISHER, David C. LONG
  • Publication number: 20180204430
    Abstract: Manufacturing a batch is provided which includes a plurality of items of an electronic device, the items including a plurality of corresponding main modules having a same functional structure substantially identical for the items. The method includes defining at least one security electric circuit, of an enclosure component for enclosing each item, adapted to protect the item from tampering, the security electric circuits having individual configurations substantially different among the items, for use in forming the security electric circuit with the corresponding configuration on each enclosure component. Additionally, the method includes determining one or more electric characteristics of each security electric circuit for use in configuring a monitoring circuit of the corresponding main module, the monitoring circuit being adapted to the corresponding security electric circuit for detecting the tampering, according to the electric characteristics of the corresponding security circuits.
    Type: Application
    Filed: March 15, 2018
    Publication date: July 19, 2018
    Inventors: Silvio DRAGONE, Christoph HAGLEITNER, Stefano S. OGGIONI
  • Patent number: 10008081
    Abstract: Manufacturing a batch is provided which includes a plurality of items of an electronic device, the items including a plurality of corresponding main modules having a same functional structure substantially identical for the items. The method includes defining at least one security electric circuit, of an enclosure component for enclosing each item, adapted to protect the item from tampering, the security electric circuits having individual configurations substantially different among the items, for use in forming the security electric circuit with the corresponding configuration on each enclosure component. Additionally, the method includes determining one or more electric characteristics of each security electric circuit for use in configuring a monitoring circuit of the corresponding main module, the monitoring circuit being adapted to the corresponding security electric circuit for detecting the tampering, according to the electric characteristics of the corresponding security circuits.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: June 26, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Silvio Dragone, Christoph Hagleitner, Stefano S. Oggioni
  • Publication number: 20180102329
    Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass.
    Type: Application
    Filed: December 5, 2017
    Publication date: April 12, 2018
    Inventors: James A. BUSBY, Silvio DRAGONE, Michael A. GAYNES, Kenneth P. RODBELL, William SANTIAGO-FERNANDEZ
  • Publication number: 20180098423
    Abstract: Tamper-respondent assemblies and fabrication methods are provided which incorporate enclosure to circuit board protection. The tamper-respondent assemblies include a circuit board, and an electronic enclosure mounted to the circuit board and facilitating enclosing at least one electronic component within a secure volume. A tamper-respondent electronic circuit structure facilitates defining the secure volume, and the tamper-respondent electronic circuit structure includes a tamper-respondent circuit. An adhesive is provided to secure, in part, the electronic enclosure to the circuit board. The adhesive contacts, at least in part, the tamper-respondent circuit so that an attempted separation of the electronic enclosure from the circuit board causes the adhesive to break the tamper-respondent circuit, facilitating detection of the separation by a monitor circuit of the tamper-respondent electronic circuit structure.
    Type: Application
    Filed: November 30, 2017
    Publication date: April 5, 2018
    Inventors: William L. Brodsky, James A. Busby, Edward N. Cohen, Silvio Dragone, Michael J. Fisher, David C. Long, Michael T. Peets, William Santiago-Fernandez, Thomas Weiss
  • Publication number: 20180098424
    Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass enclosure enclosing, at least in part, at least one electronic component within a secure volume, and a tamper-respondent detector. The glass enclosure includes stressed glass with a compressively-stressed surface layer, and the tamper-respondent detector monitors, at least in part, the stressed glass to facilitate defining the secure volume. The stressed glass fragments with an attempted intrusion event through the stressed glass, and the tamper-respondent detector detects the fragmenting of the stressed glass. In certain embodiments, the stressed glass may be a machined glass enclosure that has undergone ion-exchange processing, and the compressively-stressed surface layer of the stressed glass may be compressively-stressed to ensure that the stressed glass fragments into glass particles of fragmentation size less than 1000 ?m with the intrusion event.
    Type: Application
    Filed: December 5, 2017
    Publication date: April 5, 2018
    Inventors: James A. BUSBY, Silvio DRAGONE, Michael J. FISHER, Michael A. GAYNES, David C. LONG, Kenneth P. RODBELL, William SANTIAGO-FERNANDEZ, Thomas WEISS
  • Publication number: 20180092204
    Abstract: Vented tamper-respondent assemblies and methods of fabrication are provided which include a multilayer circuit board, a tamper-detection sensor, and an in situ vent structure. The tamper-detection sensor is embedded within the multilayer circuit board, and defines, at least in part, a secure volume associated with the multilayer circuit board. The in situ vent structure is formed within the multilayer circuit board, and includes at least one vent channel. The vent channel(s) is in fluid communication with a space within the secure volume to facilitate venting the space of the secure volume. The space within the secure volume may accommodate, for instance, one or more electronic components to be protected, and the at least one vent channel may, for instance, allow air pressure within the space of the secure volume to equalize with air pressure external to the tamper-respondent assembly.
    Type: Application
    Filed: September 26, 2016
    Publication date: March 29, 2018
    Inventors: Silvio DRAGONE, Stefano S. OGGIONI, William SANTIAGO-FERNANDEZ
  • Publication number: 20180092203
    Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include a multilayer circuit board, a tamper-detection sensor, and a vent structure. The tamper-detection sensor is embedded within the multilayer circuit board, and defines, at least in part, a secure volume associated with the multilayer circuit board. The vent structure is incorporated into the multilayer circuit board, and includes at least one vent channel. The vent channel(s) is in fluid communication with a space within the secure volume to facilitate venting the space of the secure volume. The space within the secure volume may accommodate, for instance, one or more electronic components to be protected, and the at least one vent channel may, for instance, allow air pressure within the space of the secure volume to equalize with air pressure external to the tamper-respondent assembly.
    Type: Application
    Filed: September 26, 2016
    Publication date: March 29, 2018
    Inventors: Silvio DRAGONE, Stefano S. OGGIONI, William SANTIAGO-FERNANDEZ
  • Publication number: 20180082556
    Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include an enclosure, a tamper-detect sensor, a monitor, and a sensor connection adapter. The enclosure encloses, at least in part, one or more electronic components to be protected, and the tamper-detect sensor is disposed over an inner surface of the enclosure to facilitate defining a secure volume about the electronic component(s). The tamper-detect sensor includes sensor lines disposed over the inner surface of the enclosure, and the monitor monitors the tamper-detect sensor for a tamper event. The sensor connection adapter is coupled to the inner surface of the enclosure, and is disposed over the tamper-detect sensor within the secure volume. The sensor connection adapter facilitates electrically connecting the monitor to the sensor lines of the tamper-detect sensor.
    Type: Application
    Filed: September 19, 2016
    Publication date: March 22, 2018
    Inventors: Silvio DRAGONE, Stefano S. OGGIONI, William SANTIAGO-FERNANDEZ
  • Publication number: 20180083993
    Abstract: The present disclosure relates to a method for resisting tampering in a HSM electronic device. The method comprises: receiving radio signals from a network element of at least one network. The received radio signals may be used for determining values of a set of network parameters that identify the electronic device in a predefined state within the at least one network. A tampering state of the electronic device may be detected using the parameter values. A tamper detection state signal may be generated responsive to the detected tampering state. And, operation of the electronic device may be inhibited responsive to the tamper detection state signal.
    Type: Application
    Filed: September 21, 2016
    Publication date: March 22, 2018
    Inventors: Silvio Dragone, Mircea Gusat
  • Patent number: 9913370
    Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass enclosure enclosing, at least in part, at least one electronic component within a secure volume, and a tamper-respondent detector. The glass enclosure includes stressed glass with a compressively-stressed surface layer, and the tamper-respondent detector monitors, at least in part, the stressed glass to facilitate defining the secure volume. The stressed glass fragments with an attempted intrusion event through the stressed glass, and the tamper-respondent detector detects the fragmenting of the stressed glass. In certain embodiments, the stressed glass may be a machined glass enclosure that has undergone ion-exchange processing, and the compressively-stressed surface layer of the stressed glass may be compressively-stressed to ensure that the stressed glass fragments into glass particles of fragmentation size less than 1000 ?m with the intrusion event.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: March 6, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James A. Busby, Silvio Dragone, Michael J. Fisher, Michael A. Gaynes, David C. Long, Kenneth P. Rodbell, William Santiago-Fernandez, Thomas Weiss
  • Patent number: 9881880
    Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: January 30, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James A. Busby, Silvio Dragone, Michael A. Gaynes, Kenneth P. Rodbell, William Santiago-Fernandez
  • Patent number: 9877383
    Abstract: Tamper-respondent assemblies and fabrication methods are provided which incorporate enclosure to circuit board protection. The tamper-respondent assemblies include a circuit board, and an electronic enclosure mounted to the circuit board and facilitating enclosing at least one electronic component within a secure volume. A tamper-respondent electronic circuit structure facilitates defining the secure volume, and the tamper-respondent electronic circuit structure includes a tamper-respondent circuit. An adhesive is provided to secure, in part, the electronic enclosure to the circuit board. The adhesive contacts, at least in part, the tamper-respondent circuit so that an attempted separation of the electronic enclosure from the circuit board causes the adhesive to break the tamper-respondent circuit, facilitating detection of the separation by a monitor circuit of the tamper-respondent electronic circuit structure.
    Type: Grant
    Filed: February 3, 2017
    Date of Patent: January 23, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: William L. Brodsky, James A. Busby, Edward N. Cohen, Silvio Dragone, Michael J. Fisher, David C. Long, Michael T. Peets, William Santiago-Fernandez, Thomas Weiss
  • Patent number: 9875045
    Abstract: A device for matching, in input data, a regular expression with back-references, represented by a finite-state machine (FSM). The device comprises a plurality of parallel processing elements (PPEs), an interconnection network for interconnecting the PPEs with each other, and a memory for receiving and storing input data. The PPEs process the input data stored in the memory, based on backtracking to process the back-references, and implement FA next state logic to generate new active FA configurations or mark themselves as available to receive active FA configurations. The interconnection network retrieves active FA configurations from the PPEs and allocates the active FA configurations to available PPEs. The PPEs are configured to match a regular expression in the input data.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: January 23, 2018
    Assignee: International Business Machines Corporation
    Inventors: Kubilay Atasu, Silvio Dragone
  • Publication number: 20180012459
    Abstract: Manufacturing a batch is provided which includes a plurality of items of an electronic device, the items including a plurality of corresponding main modules having a same functional structure substantially identical for the items. The method includes defining at least one security electric circuit, of an enclosure component for enclosing each item, adapted to protect the item from tampering, the security electric circuits having individual configurations substantially different among the items, for use in forming the security electric circuit with the corresponding configuration on each enclosure component. Additionally, the method includes determining one or more electric characteristics of each security electric circuit for use in configuring a monitoring circuit of the corresponding main module, the monitoring circuit being adapted to the corresponding security electric circuit for detecting the tampering, according to the electric characteristics of the corresponding security circuits.
    Type: Application
    Filed: November 21, 2016
    Publication date: January 11, 2018
    Inventors: Silvio DRAGONE, Christoph HAGLEITNER, Stefano S. OGGIONI