Patents by Inventor Simon Jerebic

Simon Jerebic has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140061676
    Abstract: A method of producing an optoelectronic component includes providing a semiconductor chip having an active layer that generates radiation and is arranged on a carrier, applying a dispersed material including a matrix material and particles embedded therein to the semiconductor chip and/or the carrier at least in regions, wherein before the dispersed material is applied, at least one chip edge of the semiconductor chip facing away from the carrier is modified such that the dispersed material at least partly separates into its constituents during application at the chip edge.
    Type: Application
    Filed: March 15, 2012
    Publication date: March 6, 2014
    Applicant: OSRAM Opto Semiconductors GmbH
    Inventors: Markus Maute, Jürgen Moosburger, Simon Jerebic
  • Publication number: 20140014995
    Abstract: An optoelectronic component includes a substrate, a semiconductor chip arranged on the substrate, and a light-transmissive cover, wherein the light-transmissive cover covers at least an area of the semiconductor chip facing away from the substrate, the light-transmissive cover has a hardness greater than that of silicone, and a connecting material is arranged as a potting material between the light-transmissive cover and the substrate such that those areas of the semiconductor chip not covered by the substrate are surrounded by the connecting material, and the connecting material forms a cavity seal.
    Type: Application
    Filed: January 19, 2012
    Publication date: January 16, 2014
    Applicant: OSRAM Opto Semiconductors GmbH
    Inventors: Markus Pindl, Simon Jerebic, Tobias Gebuhr
  • Patent number: 8580070
    Abstract: The invention relates to a method for making a semiconductor. In one embodiment the method includes applying an adhesive layer to ground-thin or thinned semiconductor chips of a semiconductor wafer. In this embodiment, the adhesive layer composed of curable adhesive is introduced relatively early into a method for the thinning by grinding, separation and singulation of a semiconductor wafer to form thinned semiconductor chips, and is used further in a semiconductor device into which the thinned semiconductor chip is to be incorporated.
    Type: Grant
    Filed: November 9, 2005
    Date of Patent: November 12, 2013
    Inventors: Edward Fuergut, Hermann Vilsmeier, Simon Jerebic, Michael Bauer
  • Publication number: 20130240929
    Abstract: A semiconductor component includes an optoelectronic semiconductor chip and an optical element arranged on a radiation passage area of the semiconductor chip, wherein the optical element is based on a highly refractive polymer material.
    Type: Application
    Filed: May 25, 2011
    Publication date: September 19, 2013
    Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Michael Kruppa, Simon Jerebic
  • Publication number: 20130207144
    Abstract: A component with an optoelectronic semiconductor chip fixed to a connection carrier by a bonding layer and embedded in an encapsulation, wherein a decoupling layer is arranged at least in places between the bonding layer and the encapsulation.
    Type: Application
    Filed: July 1, 2011
    Publication date: August 15, 2013
    Applicant: OSRAM Opto Semiconductors GmbH
    Inventors: Johann Ramchen, Jörg Erich Sorg, Simon Jerebic, Bert Braune
  • Publication number: 20130200412
    Abstract: An optoelectronic semiconductor component includes a carrier and at least one optoelectronic semiconductor chip mounted on the carrier top. The semiconductor component includes at least one bonding wire, via which the semiconductor chip is electrically contacted, and at least one covering body mounted on a main radiation side and projects beyond the bonding wire. At least one reflective potting compound encloses the semiconductor chip laterally and extends at least as far as the main radiation side of the semiconductor chip. The bonding wire is covered completely by the reflective potting compound or completely by the reflective potting compound together with the covering body.
    Type: Application
    Filed: June 10, 2011
    Publication date: August 8, 2013
    Applicant: OSRAM Opto Semiconductors GmbH
    Inventors: Johann Ramchen, David Racz, Hans-Christoph Gallmeier, Stefan Grötsch, Simon Jerebic
  • Publication number: 20130181247
    Abstract: A semiconductor component includes at least one optoelectronic semiconductor chip and a connecting carrier having a connecting surface on which the semiconductor chip is disposed. A reflective coating and a limiting structure are formed on the connecting carrier. The limiting structure at least partially encloses the semiconductor chip in the lateral direction, and the reflective coating at least partially extends in the lateral direction between a side surface of the semiconductor chip and the limiting structure.
    Type: Application
    Filed: July 1, 2011
    Publication date: July 18, 2013
    Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Simon Jerebic, Erik Heinemann, Christian Gaertner, Ales Markytan
  • Publication number: 20130113010
    Abstract: An optoelectronic component comprising an optoelectronic semiconductor chip (104) having a contact side (106) and a radiation coupling-out side (108) situated opposite; a chip carrier (102), on which the semiconductor chip (104) is applied via its contact side (106); a radiation conversion element (110) applied on the radiation coupling-out side (108); and a reflective potting compound (112), which is applied on the chip carrier (102) and laterally encloses the semiconductor chip (104) and the radiation conversion element (110); wherein the potting compound (112) adjoins an upper edge of the radiation conversion element (110) in a substantially flush fashion, such that a top side of the radiation conversion element (110) is free of the potting compound (112).
    Type: Application
    Filed: April 11, 2011
    Publication date: May 9, 2013
    Applicant: OSRAM Opto Semiconductors GmbH
    Inventors: Herbert Brunner, Hans-Christoph Gallmeier, Simon Jerebic, Stephan Preuss, Hansjörg Schöll
  • Publication number: 20130077280
    Abstract: An electronic arrangement (1) comprising a carrier (2), on which at least one connecting area (6) is arranged. At least one electronic component (3a, 3b, 3c) is fixed on the connecting area (6) by means of a contact material (4). A covering area (5) surrounds the connecting area (6) on the carrier (2). At least one covered region (15, 16, 17, 18, 19) is covered by a covering material (10). The covering material (10) is designed in such a way that an optical contrast between the covering area (5) and the covered region (15, 16, 17, 18, 19) is minimized.
    Type: Application
    Filed: April 13, 2011
    Publication date: March 28, 2013
    Applicant: OSRAM Opto Semiconductors GmbH
    Inventors: Thomas Bemmerl, Simon Jerebic, Markus Pindl
  • Publication number: 20110155297
    Abstract: The invention relates to a method for making a semiconductor. In one embodiment the method includes applying an adhesive layer to ground-thin or thinned semiconductor chips of a semiconductor wafer. In this embodiment, the adhesive layer composed of curable adhesive is introduced relatively early into a method for the thinning by grinding, separation and singulation of a semiconductor wafer to form thinned semiconductor chips, and is used further in a semiconductor device into which the thinned semiconductor chip is to be incorporated.
    Type: Application
    Filed: November 9, 2005
    Publication date: June 30, 2011
    Applicant: QIMONDA AG
    Inventors: Edward Fuergut, Hermann Vilsmeier, Simon Jerebic, Michael Bauer
  • Patent number: 7944061
    Abstract: The invention relates to a semiconductor device comprising through contacts through a plastic housing composition and a method for the production thereof. For this purpose, the wiring substrate has a solder deposit on which through contact elements are arranged vertically with respect to the wiring substrate and extend as far as the top side of the semiconductor device.
    Type: Grant
    Filed: September 20, 2005
    Date of Patent: May 17, 2011
    Assignee: Infineon Technologies AG
    Inventors: Michael Bauer, Thomas Bemmerl, Edward Fuergut, Simon Jerebic, Christian Stuempfl, Horst Theuss, Hermann Vilsmeier
  • Patent number: 7935622
    Abstract: A support with solder ball elements for loading substrates with ball contacts is disclosed. One embodiment provides a system for loading substrates with ball contacts and a method for loading substrates with ball contacts. The support has a layer of adhesive applied on one side, the layer of adhesive losing its adhesive force to the greatest extent when irradiated. The support has solder ball elements, which are arranged closely packed in rows and columns on the layer of adhesive in a prescribed pitch for a semiconductor chip or a semiconductor component.
    Type: Grant
    Filed: May 17, 2005
    Date of Patent: May 3, 2011
    Assignee: Infineon Technologies AG
    Inventors: Michael Bauer, Thomas Bemmerl, Edward Fuergut, Simon Jerebic, Herman Vilsmeier
  • Patent number: 7893532
    Abstract: An external contact material for external contacts of a semiconductor device and a method for producing the same are described. The external contact material includes a lead-free solder material. Provided in the solder material is a filler which forms a plurality of gas pores and/or has plastic particles which are arranged in the volume of the solder material.
    Type: Grant
    Filed: September 13, 2006
    Date of Patent: February 22, 2011
    Assignee: Infineon Technologies AG
    Inventors: Michael Bauer, Irmgard Escher-Poeppel, Edward Fuergut, Simon Jerebic, Bernd Rakow, Peter Strobel, Holger Woerner
  • Patent number: 7713791
    Abstract: The invention relates to a panel and a semiconductor device including a composite plate with semiconductor chips and a plastic packaging compound, and to processes for producing them. For this purpose, the panel having a composite plate has semiconductor chips arranged in rows and columns on a top side of a wiring substrate. The wiring substrate is covered by a plastic packaging compound in a plurality of semiconductor device positions, the rear sides of the semiconductor chips being fixed on the wiring substrate. A plastic packaging compound in the region of the boundary surfaces with the semiconductor chips has a coefficient of thermal expansion which is matched to that of silicon, while the remaining plastic packaging compound has a coefficient of thermal expansion which is matched to that of the wiring substrate and is therefore correspondingly higher.
    Type: Grant
    Filed: May 19, 2006
    Date of Patent: May 11, 2010
    Assignee: Infineon Technologies AG
    Inventors: Michael Bauer, Thomas Bemmerl, Edward Fuergut, Simon Jerebic, Hermann Vilsmeier
  • Patent number: 7705438
    Abstract: An electronic component includes a semiconductor chip and a leadframe. The leadframe includes a metal coating pattern on its underside to facilitate the application of solder to the electronic component. The metal coating pattern includes wetting regions that are wettable with solder material and anti-wetting regions that are unwettable with solder material, and the electronic component includes solder deposits formed on the wetting regions on the underside of the component.
    Type: Grant
    Filed: January 17, 2006
    Date of Patent: April 27, 2010
    Assignee: Infineon Technologies, AG
    Inventors: Georg Ernst, Horst Groeninger, Simon Jerebic, Thomas Zeiler
  • Patent number: 7700956
    Abstract: A sensor component and a panel used for the production thereof is disclosed. The sensor component has, in addition to a sensor chip with a sensor region, a rear side and passive components. These are embedded jointly in a plastics composition, in such a way that their respective electrodes can be wired from an overall top side of a plastic plate.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: April 20, 2010
    Assignee: Infineon Technologies AG
    Inventors: Edward Fuergut, Bernd Goller, Robert-Christian Hagen, Simon Jerebic, Jens Pohl, Peter Strobel, Holger Woerner
  • Patent number: 7692283
    Abstract: A device including a housing for a semiconductor chip is disclosed. One embodiment provides a plurality of leads. A first lead forms an external contact element at a first housing side and extends at the first housing side into the housing in the direction of an opposite second housing side. The length of the first lead within the housing is greater than half the distance between the first and the second housing side.
    Type: Grant
    Filed: November 12, 2007
    Date of Patent: April 6, 2010
    Assignee: Infineon Technologies AG
    Inventors: Michael Bauer, Holger Woerner, Simon Jerebic
  • Publication number: 20100051190
    Abstract: The invention relates to a method for applying an adhesive layer to ground-thin or thinned semiconductor chips of a semiconductor wafer. In this case, the adhesive layer, with the aid of an adhesive film which is entirely composed of precurable adhesive, is introduced relatively early into a method for the thinning by grinding, separation and singulation of a semiconductor wafer to form thinned semiconductor chips, and is finally used further in the semiconductor device into which the thinned semiconductor chip is to be incorporated.
    Type: Application
    Filed: November 23, 2005
    Publication date: March 4, 2010
    Applicant: QIMONDA AG
    Inventors: Simon Jerebic, Peter Strobel
  • Patent number: 7663218
    Abstract: A semiconductor component including a surface-mount housing and a method for producing the same are described herein. The semiconductor component includes lead pieces embedded into a plastic housing composition and arranged on an underside of the housing. External contact areas of the lead pieces are free of the plastic housing composition. A structured solderable coating is arranged on the external contact areas that have been kept free of the plastic housing composition, the coating includes a plurality of electrically conductive and mechanically elastic contact elements.
    Type: Grant
    Filed: August 16, 2007
    Date of Patent: February 16, 2010
    Assignee: Infineon Technologies AG
    Inventors: Michael Bauer, Edward Fuergut, Simon Jerebic, Hermann Vilsmeier
  • Patent number: 7575173
    Abstract: A smart card for contact data transmission includes a card body and a smart card module which is fitted in the card body. The smart card module includes a semiconductor chip with an active upper surface, a plastic housing compound that surrounds the semiconductor chip and includes at least one surface that is coplanar with the active upper surface of the semiconductor chip, a first dielectric layer that is arranged on the plastic housing compound surface and on the active upper surface of the semiconductor chip, one or more interposer metallization levels, which are isolated via further dielectric layers and are connected to the active upper surface of the semiconductor chip, and external contact surfaces. The external contact surfaces are formed on the outermost interposer level and facilitate contact data transmission. The smart card module uses no bonding wires and has a very small physical volume.
    Type: Grant
    Filed: January 30, 2006
    Date of Patent: August 18, 2009
    Assignee: Infineon Technologies, AG
    Inventors: Edward Fuergut, Bernd Goller, Robert-Christian Hagen, Simon Jerebic, Jens Pohl, Peter Strobel, Holger Woerner