Patents by Inventor Simone Rascuna

Simone Rascuna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250113506
    Abstract: Methods, systems, and apparatuses for one step formation of ohmic contacts and Schottky contacts for SiC power devices by using laser annealing are provided. An SiC power device may include a back-side ohmic contact, a n+ substrate, a n? epitaxial layer, one or more p+ regions, one or more carbon layers, one or more ohmic contacts, and a Schottky contact. The one or more ohmic contacts and Schottky contact may be formed in a one step operation that may include laser annealing. During manufacturing, a metallization layer applied above the carbon layers and n-epitaxial layer may form the ohmic contacts and Schottky contacts when the annealing is performed.
    Type: Application
    Filed: October 3, 2023
    Publication date: April 3, 2025
    Inventors: Simone RASCUNA', Gabriele BELLOCCHI, Paolo BADALA', Marilena VIVONA, Fabrizio ROCCAFORTE
  • Patent number: 12266530
    Abstract: A manufacturing method of an anchorage element of a passivation layer, comprising: forming, in a semiconductor body made of SiC and at a distance from a top surface of the semiconductor body, a first implanted region having, along a first axis, a first maximum dimension; forming, in the semiconductor body, a second implanted region, which is superimposed to the first implanted region and has, along the first axis, a second maximum dimension smaller than the first maximum dimension; carrying out a process of thermal oxidation of the first implanted region and second implanted region to form an oxidized region; removing said oxidized region to form a cavity; and forming, on the top surface, the passivation layer protruding into the cavity to form said anchorage element fixing the passivation layer to the semiconductor body.
    Type: Grant
    Filed: December 22, 2023
    Date of Patent: April 1, 2025
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Simone Rascuna', Mario Giuseppe Saggio
  • Publication number: 20250107121
    Abstract: Method of forming a metal-semiconductor contact, comprising the steps of: forming, on a semiconductor body having a first electrical conductivity, a first metal layer; performing a thermal treatment of at least a portion of the first metal layer by a LASER beam having an incidence direction on the first metal layer, including heating the portion of the first metal layer, along said incidence direction, at a temperature between 1500° C. and 3000° C.
    Type: Application
    Filed: September 18, 2024
    Publication date: March 27, 2025
    Applicant: STMicroelectronics International N.V.
    Inventors: Gabriele BELLOCCHI, Simone RASCUNÁ, Valeria PUGLISI, Paolo BADALÁ
  • Patent number: 12249624
    Abstract: A method for manufacturing a SiC-based electronic device, comprising the steps of: implanting, on a front side of a solid body made of SiC having a conductivity of an N type, dopant species of a P type thus forming an implanted region, which extends in the solid body starting from the front side and has a top surface coplanar with the front side; and generating a laser beam directed towards the implanted region in order to generate heating of the implanted region to temperatures comprised between 1500° C. and 2600° C. so as to form a carbon-rich electrical-contact region at the implanted region. The carbon-rich electrical-contact region forms an ohmic contact.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: March 11, 2025
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Simone Rascuná, Mario Giuseppe Saggio, Giovanni Franco
  • Publication number: 20250063785
    Abstract: An electronic device includes a solid body of SiC having a surface and having a first conductivity type. A first implanted region and a second implanted region have a second conductivity type and extend into the solid body in a direction starting from the surface and delimit between them a surface portion of the solid body. A Schottky contact is on the surface and in direct contact with the surface portion. Ohmic contacts are on the surface and in direct contact with the first and second implanted regions. The solid body includes an epitaxial layer including the surface portion and a bulk portion. The surface portion houses a plurality of doped sub-regions which extend in succession one after another in the direction, are of the first conductivity type, and have a respective conductivity level higher than that of the bulk portion.
    Type: Application
    Filed: August 29, 2024
    Publication date: February 20, 2025
    Applicant: STMicroelectronics S.r.l.
    Inventors: Simone RASCUNÁ, Claudio CHIBBARO
  • Patent number: 12224358
    Abstract: A Junction Barrier Schottky device includes a semiconductor body of SiC having a first conductivity. An implanted region having a second conductivity, extends into the semiconductor body from a top surface of the semiconductor body to form a junction barrier diode with the semiconductor body. An electrical terminal is in ohmic contact with the implanted region and in direct electrical contact with the top surface, laterally to the implanted region, to form a Schottky diode with the semiconductor body. The implanted region is formed by a first and a second portion electrically connected directly to each other and aligned along an alignment axis transverse to the top surface. Orthogonally to the alignment axis, the first portion has a first maximum width and the second portion has a second maximum width greater than the first maximum width.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: February 11, 2025
    Assignee: STMicroelectronics S.R.L.
    Inventors: Simone Rascuna′, Gabriele Bellocchi, Marco Santoro
  • Patent number: 12224321
    Abstract: Merged-PiN-Schottky, MPS, device comprising: a substrate of SiC with a first conductivity; a drift layer of SiC with the first conductivity, on the substrate; an implanted region with a second conductivity, extending at a top surface of the drift layer to form a junction-barrier, JB, diode with the substrate; and a first electrical terminal in ohmic contact with the implanted region and in direct contact with the top surface to form a Schottky diode with the drift layer. The JB diode and the Schottky diode are alternated to each other along an axis: the JB diode has a minimum width parallel to the axis with a first value, and the Schottky diode has a maximum width parallel to the axis with a second value smaller than, or equal to, the first value. A breakdown voltage of the MPS device is greater than, or equal to, 115% of a maximum working voltage of the MPS device in an inhibition state.
    Type: Grant
    Filed: December 7, 2023
    Date of Patent: February 11, 2025
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Simone Rascuná, Mario Giuseppe Saggio
  • Publication number: 20250046665
    Abstract: Methods, systems, and devices for improving passivation layer durability are described. A device may include a semiconductor substrate elongated along a first direction and a second direction. The first direction may be parallel to a width of the semiconductor substrate and the second direction may be parallel to a depth of the semiconductor substrate. The device may include one or more layers formed above the semiconductor substrate with respect to a third direction parallel to a height of the semiconductor substrate. At least a region of the one or more layers may include circuitry. The device may include a passivation layer formed above the one or more layers with respect to the third direction. The passivation layer may include a plurality of cavities that each extend through the passivation layer. The plurality of cavities and the circuitry may be non-overlapping with respect to the first direction and the second direction.
    Type: Application
    Filed: August 1, 2023
    Publication date: February 6, 2025
    Inventors: Gabriele BELLOCCHI, Simone RASCUNA', Giacomo TORRISI
  • Publication number: 20250038060
    Abstract: An electronic power device includes a substrate of silicon carbide (SiC) having a front surface and a rear surface which lie in a horizontal plane and are opposite to one another along a vertical axis. The substrate includes an active area, provided in which are a number of doped regions, and an edge area, which is not active, distinct from and surrounding the active area. A dielectric region is arranged above the front surface, in at least the edge area. A passivation layer is arranged above the front surface of the substrate, and is in contact with the dielectric region in the edge area. The passivation layer includes at least one anchorage region that extends through the thickness of the dielectric region at the edge area, such as to define a mechanical anchorage for the passivation layer.
    Type: Application
    Filed: October 16, 2024
    Publication date: January 30, 2025
    Applicant: STMicroelectronics S.r.l.
    Inventors: Simone RASCUNA', Claudio CHIBBARO, Alfio GUARNERA, Mario Giuseppe SAGGIO, Francesco LIZIO
  • Publication number: 20250022919
    Abstract: A method for manufacturing a SiC-based electronic device, that includes implanting, at a front side of a solid body of SiC having a conductivity of N type, dopant species of P type, thus forming an implanted region that extends in depth in the solid body starting from the front side and has a top surface co-planar with said front side; and generating a laser beam directed towards the implanted region in order to generate heating of the implanted region at temperatures comprised between 1500° C. and 2600° C. so as to form an ohmic contact region including one or more carbon-rich layers, for example graphene and/or graphite layers, in the implanted region and, simultaneously, activation of the dopant species of P type.
    Type: Application
    Filed: July 23, 2024
    Publication date: January 16, 2025
    Applicant: STMicroelectronics S.r.l.
    Inventors: Simone RASCUNÀ, Paolo BADALÀ, Anna BASSI, Gabriele BELLOCCHI
  • Publication number: 20250015145
    Abstract: A method for forming an ohmic contact on a semiconductor component, for example a high-power electrical diode, is provided. An example method includes depositing a first metal layer on a top surface of a semiconductor drift layer having an electrical contact point, the first metal layer highly reflective of a laser light. The method further includes depositing a second metal layer on portions of the first metal layer aligned with the electrical contact point, the second metal layer selected to absorb the laser light. The method further includes exposing the first and the second metal layers to the laser light in a laser annealing process, causing the second metal layer to substantially increase in temperature due to the laser light. The increase in temperature of the second metal layer causing the ohmic contact to form between the electrical contact point and the first metal layer.
    Type: Application
    Filed: July 6, 2023
    Publication date: January 9, 2025
    Inventors: Simone RASCUNA', Paolo BADALA', Gabriele BELLOCCHI, Valeria PUGLISI
  • Publication number: 20240429286
    Abstract: Various embodiments of the present disclosure disclose improved silicon carbide (SiC) power devices and methods of fabrication of such devices. A SiC power device includes a semiconductor base material with a first side and a second side and a first metallic layer disposed on the first side of the semiconductor base material that forms ohmic contacts and Schottky contacts. The SiC power device may be fabricated by forming a first metallic layer on a first side of a semiconductor base material to form a Schottky contact, forming a second metallic layer over the first metallic layer to form a reflective barrier covering the Schottky contact, removing one or more portions of the second metallic layer to expose a first portion of the first metallic layer, and forming silicide portions on the first metallic layer to form ohmic contacts within the Schottky contact.
    Type: Application
    Filed: June 26, 2023
    Publication date: December 26, 2024
    Inventors: Simone RASCUNA, Paolo BADALA, Gabriele BELLOCCHI, Valeria PUGLISI, Dario TENAGLIA
  • Patent number: 12125762
    Abstract: An electronic power device includes a substrate of silicon carbide (SiC) having a front surface and a rear surface which lie in a horizontal plane and are opposite to one another along a vertical axis. The substrate includes an active area, provided in which are a number of doped regions, and an edge area, which is not active, distinct from and surrounding the active area. A dielectric region is arranged above the front surface, in at least the edge area. A passivation layer is arranged above the front surface of the substrate, and is in contact with the dielectric region in the edge area. The passivation layer includes at least one anchorage region that extends through the thickness of the dielectric region at the edge area, such as to define a mechanical anchorage for the passivation layer.
    Type: Grant
    Filed: November 3, 2022
    Date of Patent: October 22, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Simone Rascuna', Claudio Chibbaro, Alfio Guarnera, Mario Giuseppe Saggio, Francesco Lizio
  • Patent number: 12125933
    Abstract: A device for detecting UV radiation, comprising: a SiC substrate having an N doping; a SiC drift layer having an N doping, which extends over the substrate; a cathode terminal; and an anode terminal. The anode terminal comprises: a doped anode region having a P doping, which extends in the drift layer; and an ohmic-contact region including one or more carbon-rich layers, in particular graphene and/or graphite layers, which extends in the doped anode region. The ohmic-contact region is transparent to the UV radiation to be detected.
    Type: Grant
    Filed: March 9, 2023
    Date of Patent: October 22, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Simone Rascuná, Gabriele Bellocchi, Paolo Badalá, Isodiana Crupi
  • Patent number: 12094985
    Abstract: A merged-PN-Schottky, MPS, diode includes an N substrate, an N-drift layer, a P-doped region in the drift layer, an ohmic contact on the P-doped region, a plurality of cells within the P-doped region and being portions of the drift layer where the P-doped region is absent, an anode metallization on the ohmic contact and on said cells, to form junction-barrier contacts and Schottky contacts respectively. The P-doped region has a grid-shaped layout separating from one another each cell and defining, together with the cells, an active area of the MPS diode. Each cell has a same geometry among quadrangular, quadrangular with rounded corners and circular; and the ohmic contact extends at the doped region with continuity along the grid-shaped layout.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: September 17, 2024
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Simone Rascuna′, Mario Giuseppe Saggio
  • Patent number: 12094933
    Abstract: An electronic device includes a solid body of SiC having a surface and having a first conductivity type. A first implanted region and a second implanted region have a second conductivity type and extend into the solid body in a direction starting from the surface and delimit between them a surface portion of the solid body. A Schottky contact is on the surface and in direct contact with the surface portion. Ohmic contacts are on the surface and in direct contact with the first and second implanted regions. The solid body includes an epitaxial layer including the surface portion and a bulk portion. The surface portion houses a plurality of doped sub-regions which extend in succession one after another in the direction, are of the first conductivity type, and have a respective conductivity level higher than that of the bulk portion.
    Type: Grant
    Filed: June 13, 2023
    Date of Patent: September 17, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Simone Rascuna, Claudio Chibbaro
  • Patent number: 12051725
    Abstract: A method for manufacturing a SiC-based electronic device, that includes implanting, at a front side of a solid body of SiC having a conductivity of N type, dopant species of P type, thus forming an implanted region that extends in depth in the solid body starting from the front side and has a top surface co-planar with said front side; and generating a laser beam directed towards the implanted region in order to generate heating of the implanted region at temperatures comprised between 1500° C. and 2600° C. so as to form an ohmic contact region including one or more carbon-rich layers, for example graphene and/or graphite layers, in the implanted region and, simultaneously, activation of the dopant species of P type.
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: July 30, 2024
    Assignee: STMICROELECTRONICS S.r.L.
    Inventors: Simone Rascuna′, Paolo Badala′, Anna Bassi, Gabriele Bellocchi
  • Publication number: 20240243122
    Abstract: An integrated MOSFET device is formed in a body of silicon carbide and with a first type of conductivity. The body accommodates a first body region, with a second type of conductivity; a JFET region adjacent to the first body region; a first source region, with the first type of conductivity, extending into the interior of the first body region; an implanted structure, with the second type of conductivity, extending into the interior of the JFET region. An isolated gate structure lies partially over the first body region, the first source region and the JFET region. A first metallization layer extends over the first surface and forms, in direct contact with the implanted structure and with the JFET region, a JBS diode.
    Type: Application
    Filed: January 18, 2024
    Publication date: July 18, 2024
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Mario Giuseppe SAGGIO, Simone RASCUNÁ
  • Publication number: 20240203737
    Abstract: A manufacturing method of an anchorage element of a passivation layer, comprising: forming, in a semiconductor body made of SiC and at a distance from a top surface of the semiconductor body, a first implanted region having, along a first axis, a first maximum dimension; forming, in the semiconductor body, a second implanted region, which is superimposed to the first implanted region and has, along the first axis, a second maximum dimension smaller than the first maximum dimension; carrying out a process of thermal oxidation of the first implanted region and second implanted region to form an oxidized region; removing said oxidized region to form a cavity; and forming, on the top surface, the passivation layer protruding into the cavity to form said anchorage element fixing the passivation layer to the semiconductor body.
    Type: Application
    Filed: December 22, 2023
    Publication date: June 20, 2024
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Simone RASCUNA', Mario Giuseppe SAGGIO
  • Publication number: 20240194666
    Abstract: Overvoltage protection circuits are provided. In some embodiments, an overvoltage protection circuit includes a first diode made of a first semiconductor material having a bandgap width greater than that of silicon. A second diode is included and is electrically cross-coupled with the first diode. The second diode is made of a second semiconductor material different from the first semiconductor material.
    Type: Application
    Filed: February 16, 2024
    Publication date: June 13, 2024
    Applicants: STMICROELECTRONICS S.r.l., STMICROELECTRONICS (TOURS) SAS
    Inventors: Jean-Michel SIMONNET, Sophie NGO, Simone RASCUNÀ