Patents by Inventor Simone Rascuna

Simone Rascuna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230099610
    Abstract: A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.
    Type: Application
    Filed: December 5, 2022
    Publication date: March 30, 2023
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Edoardo ZANETTI, Simone RASCUNA', Mario Giuseppe SAGGIO, Alfio GUARNERA, Leonardo FRAGAPANE, Cristina TRINGALI
  • Publication number: 20230092543
    Abstract: An electronic power device includes a substrate of silicon carbide (SiC) having a front surface and a rear surface which lie in a horizontal plane and are opposite to one another along a vertical axis. The substrate includes an active area, provided in which are a number of doped regions, and an edge area, which is not active, distinct from and surrounding the active area. A dielectric region is arranged above the front surface, in at least the edge area. A passivation layer is arranged above the front surface of the substrate, and is in contact with the dielectric region in the edge area. The passivation layer includes at least one anchorage region that extends through the thickness of the dielectric region at the edge area, such as to define a mechanical anchorage for the passivation layer.
    Type: Application
    Filed: November 3, 2022
    Publication date: March 23, 2023
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Simone RASCUNA', Claudio CHIBBARO, Alfio GUARNERA, Mario Giuseppe SAGGIO, Francesco LIZIO
  • Publication number: 20230087112
    Abstract: Merged-PiN-Schottky, MPS, device comprising: a solid body having a first electrical conductivity; an implanted region extending into the solid body facing a front side of the solid body, having a second electrical conductivity opposite to the first electrical conductivity; and a semiconductor layer extending on the front side, of a material which is a transition metal dichalcogenide, TMD. A first region of the semiconductor layer has the second electrical conductivity and extends in electrical contact with the implanted region, and a second region of the semiconductor layer has the first electrical conductivity and extends adjacent to the first region and in electrical contact with a respective surface portion of the front side having the first electrical conductivity.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 23, 2023
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Filippo GIANNAZZO, Giuseppe Greco, Fabrizio ROCCAFORTE, Simone RASCUNA'
  • Patent number: 11605751
    Abstract: A device for detecting UV radiation, comprising: a SiC substrate having an N doping; a SiC drift layer having an N doping, which extends over the substrate; a cathode terminal; and an anode terminal. The anode terminal comprises: a doped anode region having a P doping, which extends in the drift layer; and an ohmic-contact region including one or more carbon-rich layers, in particular graphene and/or graphite layers, which extends in the doped anode region. The ohmic-contact region is transparent to the UV radiation to be detected.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: March 14, 2023
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Simone Rascuná, Gabriele Bellocchi, Paolo Badalá, Isodiana Crupi
  • Patent number: 11545362
    Abstract: A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: January 3, 2023
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Edoardo Zanetti, Simone Rascuna', Mario Giuseppe Saggio, Alfio Guarnera, Leonardo Fragapane, Cristina Tringali
  • Patent number: 11532606
    Abstract: Overvoltage protection circuits are provided. In some embodiments, an overvoltage protection circuit includes a first diode made of a first semiconductor material having a bandgap width greater than that of silicon. A second diode is included and is electrically cross-coupled with the first diode. The second diode is made of a second semiconductor material different from the first semiconductor material.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: December 20, 2022
    Assignees: STMicroelectronics (Tours) SAS, STMicroelectronics S.r.l.
    Inventors: Jean-Michel Simonnet, Sophie Ngo, Simone Rascunà
  • Publication number: 20220384662
    Abstract: A merged-PN-Schottky, MPS, diode includes an N substrate, an N-drift layer, a P-doped region in the drift layer, an ohmic contact on the P-doped region, a plurality of cells within the P-doped region and being portions of the drift layer where the P-doped region is absent, an anode metallization on the ohmic contact and on said cells, to form junction-barrier contacts and Schottky contacts respectively. The P-doped region has a grid-shaped layout separating from one another each cell and defining, together with the cells, an active area of the MPS diode. Each cell has a same geometry among quadrangular, quadrangular with rounded corners and circular; and the ohmic contact extends at the doped region with continuity along the grid-shaped layout.
    Type: Application
    Filed: August 10, 2022
    Publication date: December 1, 2022
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Simone RASCUNA', Mario Giuseppe SAGGIO
  • Patent number: 11495508
    Abstract: An electronic power device includes a substrate of silicon carbide (SiC) having a front surface and a rear surface which lie in a horizontal plane and are opposite to one another along a vertical axis. The substrate includes an active area, provided in which are a number of doped regions, and an edge area, which is not active, distinct from and surrounding the active area. A dielectric region is arranged above the front surface, in at least the edge area. A passivation layer is arranged above the front surface of the substrate, and is in contact with the dielectric region in the edge area. The passivation layer includes at least one anchorage region that extends through the thickness of the dielectric region at the edge area, such as to define a mechanical anchorage for the passivation layer.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: November 8, 2022
    Assignee: STMicroelectronics S.r.l.
    Inventors: Simone Rascuna′, Claudio Chibbaro, Alfio Guarnera, Mario Giuseppe Saggio, Francesco Lizio
  • Patent number: 11417778
    Abstract: A merged-PN-Schottky, MPS, diode includes an N substrate, an N-drift layer, a P-doped region in the drift layer, an ohmic contact on the P-doped region, a plurality of cells within the P-doped region and being portions of the drift layer where the P-doped region is absent, an anode metallization on the ohmic contact and on said cells, to form junction-barrier contacts and Schottky contacts respectively. The P-doped region has a grid-shaped layout separating from one another each cell and defining, together with the cells, an active area of the MPS diode. Each cell has a same geometry among quadrangular, quadrangular with rounded corners and circular; and the ohmic contact extends at the doped region with continuity along the grid-shaped layout.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: August 16, 2022
    Assignee: STMicroelectronics S.R.L.
    Inventors: Simone Rascuna′, Mario Giuseppe Saggio
  • Publication number: 20220246770
    Abstract: A Junction Barrier Schottky device includes a semiconductor body of SiC having a first conductivity. An implanted region having a second conductivity, extends into the semiconductor body from a top surface of the semiconductor body to form a junction barrier diode with the semiconductor body. An electrical terminal is in ohmic contact with the implanted region and in direct electrical contact with the top surface, laterally to the implanted region, to form a Schottky diode with the semiconductor body. The implanted region is formed by a first and a second portion electrically connected directly to each other and aligned along an alignment axis transverse to the top surface. Orthogonally to the alignment axis, the first portion has a first maximum width and the second portion has a second maximum width greater than the first maximum width.
    Type: Application
    Filed: January 25, 2022
    Publication date: August 4, 2022
    Applicant: STMicroelectronics S.r.l.
    Inventors: Simone RASCUNA', Gabriele BELLOCCHI, Marco SANTORO
  • Publication number: 20220246771
    Abstract: A vertical conduction electronic device is formed by a body of wide-bandgap semiconductor material having a first conductivity type and a surface, which defines a first direction and a second direction. The body has a drift region. The electronic device includes a plurality of superficial implanted regions having a second conductivity type, which extend in the drift region from the surface and delimit between them, in the drift region, at least one superficial portion facing the surface. At least one deep implanted region has the second conductivity type, and extends in the drift region, at a distance from the surface of the body. A metal region extends on the surface of the body, in Schottky contact with the superficial portion of the drift region.
    Type: Application
    Filed: February 3, 2022
    Publication date: August 4, 2022
    Applicant: STMicroelectronics S.r.l.
    Inventors: Simone RASCUNA', Gabriele BELLOCCHI, Edoardo ZANETTI, Mario Giuseppe SAGGIO
  • Publication number: 20220157807
    Abstract: An integrated MOSFET device is formed in a body of silicon carbide and with a first type of conductivity. The body accommodates a first body region, with a second type of conductivity; a JFET region adjacent to the first body region; a first source region, with the first type of conductivity, extending into the interior of the first body region; an implanted structure, with the second type of conductivity, extending into the interior of the JFET region. An isolated gate structure lies partially over the first body region, the first source region and the JFET region. A first metallization layer extends over the first surface and forms, in direct contact with the implanted structure and with the JFET region, a JBS diode.
    Type: Application
    Filed: February 2, 2022
    Publication date: May 19, 2022
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Mario Giuseppe SAGGIO, Simone RASCUNÁ
  • Publication number: 20220108975
    Abstract: The disclosure is directed to wide band-gap semiconductor devices, such as power devices based on silicon carbide or gallium nitride materials. A power device die is attached to a carrier substrate or a base using sintered silver as a die attachment material or layer. The carrier substrate is, in some embodiments, copper plated with silver. The sintered silver die attachment layer is formed by sintering silver nanoparticle paste under a very low temperature, for example, lower than 200° C. and in some embodiments at about 150° C., and with no external pressures applied in the sintering process. The silver nanoparticle is synthesized through a chemical reduction process in an organic solvent. After the reduction process has completed, the organic solvent is removed through evaporation with a flux of inert gas being injected into the solution.
    Type: Application
    Filed: October 1, 2021
    Publication date: April 7, 2022
    Inventors: Cristina MANOLA, Rosa Lucia TORRISI, Simone RASCUNÀ, Gabriele BELLOCCHI, Annalinda CONTINO, Giuseppe MACCARRONE
  • Publication number: 20220076955
    Abstract: A manufacturing method of an anchorage element of a passivation layer, comprising: forming, in a semiconductor body made of SiC and at a distance from a top surface of the semiconductor body, a first implanted region having, along a first axis, a first maximum dimension; forming, in the semiconductor body, a second implanted region, which is superimposed to the first implanted region and has, along the first axis, a second maximum dimension smaller than the first maximum dimension; carrying out a process of thermal oxidation of the first implanted region and second implanted region to form an oxidized region; removing said oxidized region to form a cavity; and forming, on the top surface, the passivation layer protruding into the cavity to form said anchorage element fixing the passivation layer to the semiconductor body.
    Type: Application
    Filed: August 26, 2021
    Publication date: March 10, 2022
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Simone RASCUNA', Mario Giuseppe SAGGIO
  • Patent number: 11270993
    Abstract: An integrated MOSFET device is formed in a body of silicon carbide and with a first type of conductivity. The body accommodates a first body region, with a second type of conductivity; a JFET region adjacent to the first body region; a first source region, with the first type of conductivity, extending into the interior of the first body region; an implanted structure, with the second type of conductivity, extending into the interior of the JFET region. An isolated gate structure lies partially over the first body region, the first source region and the JFET region. A first metallization layer extends over the first surface and forms, in direct contact with the implanted structure and with the JFET region, a JBS diode.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: March 8, 2022
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Mario Giuseppe Saggio, Simone Rascuná
  • Publication number: 20220028978
    Abstract: Merged-PiN-Schottky, MPS, device comprising: a substrate of SiC with a first conductivity; a drift layer of SiC with the first conductivity, on the substrate; an implanted region with a second conductivity, extending at a top surface of the drift layer to form a junction-barrier, JB, diode with the substrate; and a first electrical terminal in ohmic contact with the implanted region and in direct contact with the top surface to form a Schottky diode with the drift layer. The JB diode and the Schottky diode are alternated to each other along an axis: the JB diode has a minimum width parallel to the axis with a first value, and the Schottky diode has a maximum width parallel to the axis with a second value smaller than, or equal to, the first value. A breakdown voltage of the MPS device is greater than, or equal to, 115% of a maximum working voltage of the MPS device in an inhibition state.
    Type: Application
    Filed: July 13, 2021
    Publication date: January 27, 2022
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Simone RASCUNÁ, Mario Giuseppe SAGGIO
  • Publication number: 20220028979
    Abstract: An electronic device includes a solid body of SiC having a surface and having a first conductivity type. A first implanted region and a second implanted region have a second conductivity type and extend into the solid body in a direction starting from the surface and delimit between them a surface portion of the solid body. A Schottky contact is on the surface and in direct contact with the surface portion. Ohmic contacts are on the surface and in direct contact with the first and second implanted regions. The solid body includes an epitaxial layer including the surface portion and a bulk portion. The surface portion houses a plurality of doped sub-regions which extend in succession one after another in the direction, are of the first conductivity type, and have a respective conductivity level higher than that of the bulk portion.
    Type: Application
    Filed: July 14, 2021
    Publication date: January 27, 2022
    Applicant: STMicroelectronics S.r.l.
    Inventors: Simone RASCUNA, Claudio CHIBBARO
  • Publication number: 20220020884
    Abstract: The vertical-conduction electronic power device is formed by a body of wide band gap semiconductor which has a first conductivity type and has a surface, and is formed by a drift region and by a plurality of surface portions delimited by the surface. The electronic device is further formed by a plurality of first implanted regions having a second conductivity type, which extend into the drift region from the surface, and by a plurality of metal portions, which are arranged on the surface. Each metal portion is in Schottky contact with a respective surface portion of the plurality of surface portions so as to form a plurality of Schottky diodes formed by first Schottky diodes and second Schottky diodes, wherein the first Schottky diodes have, at equilibrium, a Schottky barrier having a height different from that of the second Schottky diodes.
    Type: Application
    Filed: July 8, 2021
    Publication date: January 20, 2022
    Applicant: STMICROELECTRONICS S.R.L.
    Inventor: Simone RASCUNÁ
  • Publication number: 20210399154
    Abstract: A device for detecting UV radiation, comprising: a SiC substrate having an N doping; a SiC drift layer having an N doping, which extends over the substrate; a cathode terminal; and an anode terminal. The anode terminal comprises: a doped anode region having a P doping, which extends in the drift layer; and an ohmic-contact region including one or more carbon-rich layers, in particular graphene and/or graphite layers, which extends in the doped anode region. The ohmic-contact region is transparent to the UV radiation to be detected.
    Type: Application
    Filed: June 10, 2021
    Publication date: December 23, 2021
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Simone RASCUNÁ, Gabriele BELLOCCHI, Paolo BADALÁ, Isodiana CRUPI
  • Patent number: 11177394
    Abstract: A switching device including: a body of semiconductor material, which has a first conductivity type and is delimited by a front surface; a contact layer of a first conductive material, which extends in contact with the front surface; and a plurality of buried regions, which have a second conductivity type and are arranged within the semiconductor body, at a distance from the contact layer.
    Type: Grant
    Filed: April 6, 2020
    Date of Patent: November 16, 2021
    Assignee: STMicroelectronics S.r.l.
    Inventors: Mario Giuseppe Saggio, Simone Rascuna'