Patents by Inventor So-young Lim

So-young Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128251
    Abstract: A display device includes a first conductive layer disposed on a substrate, a passivation layer disposed on the first conductive layer, a second conductive layer disposed on the passivation layer, a via layer disposed on the second conductive layer, a third conductive layer disposed on the via layer, the third conductive layer including a first electrode, a second electrode, a connection pattern, the first electrode, the second electrode, and the connection pattern being spaced apart from each other, and a light emitting element, a first end and a second end of the light emitting element being disposed on the first electrode and the second electrode, respectively, wherein the connection pattern electrically connects the first conductive layer and the second conductive layer through a first contact hole penetrating the via layer and the passivation layer.
    Type: Application
    Filed: December 26, 2023
    Publication date: April 18, 2024
    Applicant: Samsung Display Co., LTD.
    Inventors: Kyung Jin JEON, So Young KOO, Eok Su KIM, Hyung Jun KIM, Yun Yong NAM, Jun Hyung LIM
  • Patent number: 11942488
    Abstract: A display device includes: a substrate; a first conductive layer on the substrate and comprising a first signal line; an insulating layer pattern on the first conductive layer; a semiconductor pattern on the insulating layer pattern; a gate insulating layer on the semiconductor pattern; and a second conductive layer comprising a gate electrode on the gate insulting layer and a first source/drain electrode and a second source/drain electrode, each on at least a part of the semiconductor pattern, wherein the insulating layer pattern and the semiconductor pattern have a same planar shape, the semiconductor pattern comprises a channel region overlapping the gate electrode, a first source/drain region on a first side of the channel region and a second source/drain region on a second side of the channel region, and the first source/drain electrode electrically connects the first source/drain region and the first signal line.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: March 26, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kyung Jin Jeon, So Young Koo, Eok Su Kim, Hyung Jun Kim, Joon Seok Park, Jun Hyung Lim
  • Patent number: 11942482
    Abstract: A display device according to an embodiment includes a light blocking layer disposed on a substrate; an oxygen supply layer disposed on and contacting the light blocking layer; a semiconductor layer disposed on the oxygen supply layer; and a light emitting diode electrically connected with the semiconductor layer. The semiconductor layer includes an oxide semiconductor, and the oxygen supply layer includes a metal oxide that includes at least one of indium, zinc, gallium, and tin.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: March 26, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyung Jun Kim, So Young Koo, Eok Su Kim, Yun Yong Nam, Jun Hyung Lim, Kyung Jin Jeon
  • Publication number: 20240097119
    Abstract: A method of manufacturing a composite electrode for an all-solid-state battery includes: preparing a precursor solution by mixing at least one solid electrolyte precursor and at least one polar solvent; stirring the precursor solution; preparing an electrode slurry by adding an active material to the stirred precursor solution; and heat-treating the electrode slurry and obtaining the composite electrode for the all-solid-state battery, wherein the composite electrode for the all-solid-state battery includes: the active material; and a coating layer disposed on the active material and including a solid electrolyte.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Applicants: HYUNDAI MOTOR COMPANY, Kia Corporation
    Inventors: Sun Ho CHOI, Yong Jun JANG, In Woo SONG, Sang Heon LEE, Sang Soo LEE, So Young KIM, Seong Hyeon CHOI, Sa Heum KIM, Jae Min LIM
  • Patent number: 11586079
    Abstract: A film type package includes: a base film having first and second sides; a driver integrated circuit mounted on the base film; first connection pads disposed on a first area of the base film that is adjacent to the first side of the base film, and configured to be connected to a first external circuit; second connection pads disposed on a second area of the base film that is adjacent to the second side of the base film, and configured to be connected to a second external circuit; first signal lines disposed on the base film, and connecting the driver integrated circuit and the first connection pads; second signal lines disposed on the base film, and connecting the driver integrated circuit and the second connection pads; and a plurality of test lines extending from the driver integrated circuit to the first side of the base film.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: February 21, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Byung Hun Han, Jung Eun Koo, So Young Lim
  • Publication number: 20220113577
    Abstract: A film type package includes: a base film having first and second sides; a driver integrated circuit mounted on the base film; first connection pads disposed on a first area of the base film that is adjacent to the first side of the base film, and configured to be connected to a first external circuit; second connection pads disposed on a second area of the base film that is adjacent to the second side of the base film, and configured to be connected to a second external circuit; first signal lines disposed on the base film, and connecting the driver integrated circuit and the first connection pads; second signal lines disposed on the base film, and connecting the driver integrated circuit and the second connection pads; and a plurality of test lines extending from the driver integrated circuit to the first side of the base film.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Byung Hun HAN, Jung Eun KOO, So Young LIM
  • Patent number: 11231626
    Abstract: A film type package includes: a base film having first and second sides; a driver integrated circuit mounted on the base film; first connection pads disposed on a first area of the base film that is adjacent to the first side of the base film, and configured to be connected to a first external circuit; second connection pads disposed on a second area of the base film that is adjacent to the second side of the base film, and configured to be connected to a second external circuit; first signal lines disposed on the base film, and connecting the driver integrated circuit and the first connection pads; second signal lines disposed on the base film, and connecting the driver integrated circuit and the second connection pads; and a plurality of test lines extending from the driver integrated circuit to the first side of the base film.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: January 25, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Byung Hun Han, Jung Eun Koo, So Young Lim
  • Patent number: 10903127
    Abstract: A display device including a film substrate including first and second surfaces, the first surface being opposite to the second surface; a semiconductor chip disposed on the first surface and including an input terminal and a test terminal, which are arranged in a first direction; a first wire extending from the input terminal on the first surface along a second direction, which intersects the first direction; and a second wire including a first extended portion, which extends along the first surface, a second extended portion, which extends along the second surface, and a first via, which penetrates the film substrate and connects the first extended portion and the second extended portion, wherein the first extended portion extends from the test terminal in the second direction and is connected to the first via, and the second extended portion extends from the first via to an edge of the second surface.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: January 26, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: So Young Lim, Ye Chung Chung
  • Publication number: 20200303270
    Abstract: A display device including a film substrate including first and second surfaces, the first surface being opposite to the second surface; a semiconductor chip disposed on the first surface and including an input terminal and a test terminal, which are arranged in a first direction; a first wire extending from the input terminal on the first surface along a second direction, which intersects the first direction; and a second wire including a first extended portion, which extends along the first surface, a second extended portion, which extends along the second surface, and a first via, which penetrates the film substrate and connects the first extended portion and the second extended portion, wherein the first extended portion extends from the test terminal in the second direction and is connected to the first via, and the second extended portion extends from the first via to an edge of the second surface.
    Type: Application
    Filed: June 10, 2020
    Publication date: September 24, 2020
    Inventors: So Young LIM, Ye Chung CHUNG
  • Patent number: 10699974
    Abstract: A display device including a film substrate including first and second surfaces, the first surface being opposite to the second surface; a semiconductor chip disposed on the first surface and including an input terminal and a test terminal, which are arranged in a first direction; a first wire extending from the input terminal on the first surface along a second direction, which intersects the first direction; and a second wire including a first extended portion, which extends along the first surface, a second extended portion, which extends along the second surface, and a first via, which penetrates the film substrate and connects the first extended portion and the second extended portion, wherein the first extended portion extends from the test terminal in the second direction and is connected to the first via, and the second extended portion extends from the first via to an edge of the second surface.
    Type: Grant
    Filed: August 29, 2018
    Date of Patent: June 30, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: So Young Lim, Ye Chung Chung
  • Publication number: 20190371691
    Abstract: A film type package includes: a base film having first and second sides; a driver integrated circuit mounted on the base film; first connection pads disposed on a first area of the base film that is adjacent to the first side of the base film, and configured to be connected to a first external circuit; second connection pads disposed on a second area of the base film that is adjacent to the second side of the base film, and configured to be connected to a second external circuit; first signal lines disposed on the base film, and connecting the driver integrated circuit and the first connection pads; second signal lines disposed on the base film, and connecting the driver integrated circuit and the second connection pads; and a plurality of test lines extending from the driver integrated circuit to the first side of the base film.
    Type: Application
    Filed: January 22, 2019
    Publication date: December 5, 2019
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Byung Hun HAN, Jung Eun KOO, So Young LIM
  • Publication number: 20190122943
    Abstract: A display device including a film substrate including first and second surfaces, the first surface being opposite to the second surface; a semiconductor chip disposed on the first surface and including an input terminal and a test terminal, which are arranged in a first direction; a first wire extending from the input terminal on the first surface along a second direction, which intersects the first direction; and a second wire including a first extended portion, which extends along the first surface, a second extended portion, which extends along the second surface, and a first via, which penetrates the film substrate and connects the first extended portion and the second extended portion, wherein the first extended portion extends from the test terminal in the second direction and is connected to the first via, and the second extended portion extends from the first via to an edge of the second surface.
    Type: Application
    Filed: August 29, 2018
    Publication date: April 25, 2019
    Inventors: So Young LIM, Ye Chung CHUNG
  • Patent number: 9869717
    Abstract: A test pad structure includes a plurality of test pads and a plurality of connection leads. The test pads are sequentially arranged from a wiring pattern on a substrate and in rows parallel with one another. The test pads include first and second groups of test pads, the first group having at least one pad and the second group having at least two pads. The connection leads extend from end portions of the wiring pattern to be connected to the test pads. The connection leads include at least one inner lead passing between the at least two pads of the second group and arranged in a first row closest to the first group. The at least one inner lead may be connected to at least one pad of the at least two pads of the second group arranged in a second row next to the first row.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: January 16, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD
    Inventors: So-Young Lim, Sang-Heui Lee
  • Publication number: 20160351155
    Abstract: A chip on film (COF) package includes a base film, a semiconductor chip disposed on the base film, first signal wires, and second signal wires. The semiconductor chip includes a pads and a driving integrated circuit. The first signal wires are configured to output a drive signal generated in the driving integrated circuit, and are electrically connected to pads disposed in a first pad region. The first pad region is disposed on a first side of the semiconductor chip. The first signal wires are disposed on a first surface of the base film. The second signal wires are electrically connected to pads disposed in a second pad region. The second pad region is disposed on a second side of the semiconductor chip. The second signal wires are disposed on a second surface of the base film. The first and second surfaces of the base film are opposite to each other.
    Type: Application
    Filed: May 26, 2016
    Publication date: December 1, 2016
    Inventors: JIN-WOO PARK, SO-YOUNG LIM
  • Publication number: 20160334463
    Abstract: A test pad structure includes a plurality of test pads and a plurality of connection leads. The test pads are sequentially arranged from a wiring pattern on a substrate and in rows parallel with one another. The test pads include first and second groups of test pads, the first group having at least one pad and the second group having at least two pads. The connection leads extend from end portions of the wiring pattern to be connected to the test pads. The connection leads include at least one inner lead passing between the at least two pads of the second group and arranged in a first row closest to the first group. The at least one inner lead may be connected to at least one pad of the at least two pads of the second group arranged in a second row next to the first row.
    Type: Application
    Filed: July 25, 2016
    Publication date: November 17, 2016
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: So-Young LIM, Sang-Heui LEE
  • Patent number: 9437526
    Abstract: A chip on film (COF) package includes a film substrate, first leads on a first surface of the film substrate, the first leads having a first length, and second leads on the first surface of the film substrate, the second leads having a second length larger than the first length, first via plugs penetrating the film substrate and connected to first ends of the first leads, and second via plugs penetrating the film substrate and connected to first ends of the second leads, and first connection leads on a second surface of the film substrate facing the first surface, the first connection leads having first ends connected to the first via plugs, and second connection leads on the second surface of the film substrate, the second connection leads having first ends electrically connected to the second via plugs.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: September 6, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: So-Young Lim, Na-Rae Shin, Jeong-Kyu Ha, Kyoung-Suk Yang, Pa-Lan Lee
  • Publication number: 20160162091
    Abstract: A chip on film package includes a flexible base film having a first surface and a second surface opposite to each other that includes at least one through hole therein, a plurality of wirings disposed on the first surface and the second surface of the base film, respectively, that include a first lead and a second lead connected to each other through the at least one through hole, and a display panel driving chip and a touch panel sensor chip, each mounted on any one of the first surface and the second surface of the base film, wherein at least one of the display panel driving panel and the touch panel sensor chip is electrically connected to the first and second leads.
    Type: Application
    Filed: February 10, 2016
    Publication date: June 9, 2016
    Inventors: JEONG-KYU HA, KWAN-JAi LEE, JAE-MIN JUNG, KYONG-SOON CHO, NA-RAE SHIN, KYOUNG-SUK YANG, PA-LAN LEE, SO-YOUNG LIM
  • Publication number: 20160132513
    Abstract: The present invention is directed to a device and method for providing POI information using POI grouping. According to the present invention, POI objects are collected in a preset POI category, a POI group is generated by grouping some of the POI objects using additional information included in each of the POI objects, related POI objects corresponding to a target POI object corresponding to a request from a user are extracted using the POI group, and information corresponding to the related POI objects is transmitted to the user. Related POI objects are extracted and then information is transmitted in response to a request from a user, and thus information about a location desired by the user is provided in a related group, thereby efficiently providing appropriate information.
    Type: Application
    Filed: December 10, 2014
    Publication date: May 12, 2016
    Applicant: SK PLANET CO., LTD.
    Inventors: So-Young Lim, Heon-Kyu Park, Sung-Joon Park, Hong-Jun An
  • Patent number: 9280182
    Abstract: A chip on film package includes a flexible base film having a first surface and a second surface opposite to each other that includes at least one through hole therein, a plurality of wirings disposed on the first surface and the second surface of the base film, respectively, that include a first lead and a second lead connected to each other through the at least one through hole, and a display panel driving chip and a touch panel sensor chip, each mounted on any one of the first surface and the second surface of the base film, wherein at least one of the display panel driving panel and the touch panel sensor chip is electrically connected to the first and second leads.
    Type: Grant
    Filed: March 3, 2014
    Date of Patent: March 8, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong-Kyu Ha, Kwan-Jai Lee, Jae-Min Jung, Kyong-Soon Cho, Na-Rae Shin, Kyoung-Suk Yang, Pa-Lan Lee, So-Young Lim
  • Patent number: 9059067
    Abstract: A semiconductor device includes an interposer mounting a semiconductor chip. The interposer includes a silicon substrate having a recessed region formed on a first surface, a first through via penetrating a first region of the silicon substrate from the first surface to an opposing second surface, an insulator disposed in the recessed region, and a first wire pattern at least partially disposed on the insulator and electrically connecting the first through via to the semiconductor chip.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: June 16, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yun-seok Choi, So-young Lim, In-won O