Abstract: A test pad structure may include a plurality of test pads and a plurality of connection leads. A plurality of the test pads may be sequentially arranged from a wiring pattern on a substrate and arranged in rows parallel with one another. The plurality of the test pads may include a first group of test pads having at least one pad arranged in a first row and a second group of test pads having at least two pads. A plurality of the connection leads may extend from end portions of the wiring pattern to be connected to the plurality of test pads. A plurality of the connection leads may include at least one inner lead passing between the at least two pads of the second group of the test pads arranged in a second row closest to the first group of the test pads. The at least one inner lead may be connected to at least one pad of the at least two pads of the second group of the test pads arranged in a third row next to the second row.

Abstract: A substrate for a semiconductor package comprises a dielectric substrate, a circuit pattern, and an electromagnetic band gap (EBG) pattern. The circuit pattern is formed on a first surface of the dielectric substrate and is connected to ground via a ground connection. The electromagnetic band gap (EBG) pattern comprises a plurality of zigzag unit structures formed on a second surface of the dielectric substrate, wherein the second surface is formed on an opposite side of the dielectric substrate from the first surface; the zigzag unit structures are electrically connected to each other; and at least one of the zigzag unit structures is electrically connected to the ground connection.