Abstract: Embodiments of the invention provide self-assembled monolayers (SAM) formulations and cleaning to promote quick depositions. A hydrogen-based plasma clean is performed on a structure, the structure including a metal layer and a dielectric layer. A self-assembled monolayers (SAM) solution is dispensed on the structure, the SAM solution including SAMs and a solvent, the SAMs being configured to assemble on the metal layer. The structure is rinsed with a rinse solution including the solvent.

Abstract: A method is presented for selective deposition on metals using porous low-k materials. The method includes forming alternating layers of a porous dielectric material and a first conductive material, forming a surface aligned monolayer (SAM) over the first conductive material, depositing hydroxamic acid (HA) material over the porous dielectric material, growing an oxide material over the first conductive material, removing the SAM, depositing a dielectric layer adjacent the oxide material, and replacing the oxide material with a second conductive material defining a bottom electrode.

Abstract: An approach providing a semiconductor structure that provides a self-leveling, flowable, dielectric material for a gap fill material between vertical structures in many emerging non-volatile memory devices that are being formed with vertical structures for increasing memory device density. The semiconductor structure provides a flat dielectric surface between a plurality of contacts in a back end of the line metal layer in both the memory region and in the logic region of the semiconductor structure. The semiconductor structure includes a first portion of the plurality of contacts that each connect to a pillar-based memory device in an array of pillar-based memory devices. The first portion of the contacts that each connect to a pillar-based memory device in the array of memory devices reside in a conventional interlayer dielectric material under the self-leveling dielectric material. The flowable, self-leveling material provides a flat dielectric surface during contact formation.

Abstract: Systems and methods may be used to produce coated components. Exemplary semiconductor chamber components may include an aluminum alloy comprising nickel and may be characterized by a surface. The surface may include a corrosion resistant coating. The corrosion resistant coating may include a conformal layer and a non-metal layer. The conformal layer may extend about the semiconductor chamber component. The non-metal oxide layer may extend over a surface of the conformal layer. The non-metal oxide layer may be characterized by an amorphous microstructure having a hardness of from about 300 HV to about 10,000 HV. The non-metal oxide layer may also be characterized by an sp2 to sp3 hybridization ratio of from about 0.01 to about 0.5 and a hydrogen content of from about 1 wt. % to about 35 wt. %.

Abstract: A semiconductor fabrication method that uses a graphene etch stop is disclosed. The method comprises forming a first set of trenches and a second set of trenches in a substrate. The first set of trenches are narrower than the second set of trenches. The method further comprises forming a graphene layer in the first and second sets of trenches. The method further comprises depositing a first conductor in the first and second sets of trenches. The method further comprises removing the first conductor from the second set of trenches using an etching process. The graphene layer acts as an etch stop for the etching process. The method further comprises depositing a second conductor in the second set of trenches. The second conductor is different than the first conductor.

Abstract: Systems and methods may be used to produce coated components. Exemplary semiconductor chamber components may include an aluminum alloy comprising nickel and may be characterized by a surface. The surface may include a corrosion resistant coating. The corrosion resistant coating may include a conformal layer and a non-metal layer. The conformal layer may extend about the semiconductor chamber component. The non-metal oxide layer may extend over a surface of the conformal layer. The non-metal oxide layer may be characterized by an amorphous microstructure having a hardness of from about 300 HV to about 10,000 HV. The non-metal oxide layer may also be characterized by an sp2 to sp3 hybridization ratio of from about 0.01 to about 0.5 and a hydrogen content of from about 1 wt. % to about 35 wt. %.

Abstract: A semiconductor structure including a first dielectric layer comprising a first conductive metal feature embedded in the first dielectric layer; and a second dielectric layer including a second conductive metal feature embedded in the second dielectric layer, the second conductive metal feature is above and directly contacts the first conductive metal feature, and an interface between the second conductive metal feature and the second dielectric layer includes a repeating scallop shape along its entire length.

Abstract: A heat sink with a first sub-area and a second sub-area, designed for contacting a large area of a printed circuit board populated with electronic components. A thermal isolation extends between the first sub-area and the second sub-area, and a rigid mechanical connection that spans the thermal isolation connects the first sub-area to the second sub-area. As a result, the heat sink allows an assignment of sub-areas to electronic components on the printed circuit board, and contributes to mechanical stabilization of the printed circuit board.

Abstract: A semiconductor processing system may include a substrate pedestal. The system may also include at least one fluid channel having a delivery portion configured to deliver a temperature controlled fluid to the substrate pedestal, and having a return portion configured to return the temperature controlled fluid from the substrate pedestal. The system may also include a heater coupled with the delivery portion of the at least one fluid channel. The system may also include a temperature measurement device coupled with the return portion of the at least one fluid channel, and the temperature measurement device may be communicatively coupled with the heater.

Abstract: A method for preventing or combating a fungal infection on a stone fruit tree or a part thereof includes applying Trichoderma atroviride strain SC1 to the tree, the part thereof, or a locus of the tree. The Trichoderma atroviride strain SC1 is useful in the prevention or combat of a fungal infection on a stone fruit tree or a part thereof.

Abstract: A method for controlling or preventing a fungal infection on a plant or plant part involves applying a composition that has a choline salt of a C8-C10 fatty acid to the plant, plant part, or locus of growth of the plant. The composition can be used as a fungicide on a plant or plant part. An example of a C8-C10 fatty acid in the composition is choline pelargonate.

Abstract: An electrically assisted pressure joining apparatus and an electrically assisted pressure joining method join a first metal member and a second metal member together, and includes an electrode portion, an intermediate portion including a plurality of micropores and inserted between a first metal member and a second metal member, and a pressure portion connected to the electrode portion to receive a current from the electrode portion and transfer the current to the first metal member and the second metal member to apply a pressure to the first metal member such that the first metal member and the second metal member are joined together by the intermediate portion.

Abstract: The present invention relates to a process for hydroconversion of a heavy hydrocarbon feedstock in the presence of hydrogen, at least one supported solid catalyst and at least one dispersed solid catalyst obtained from at least one salt of a heteropolyanion combining molybdenum and at least one metal selected from cobalt and nickel in a Strandberg, Keggin, lacunary Keggin or substituted lacunary Keggin structure.

Abstract: A computer-implemented document management method is discussed. The method includes displaying in a messaging application a plurality of folders for storing electronic mail messages, analyzing content one or more of the electronic mail messages to locate identifiers associated with matters in a document management system, and generating a user-selectable object that, when selected, automatically causes the generation of a document management display for a user of the messaging application.

Abstract: Disclosed herein are devices and methods for assessing the surface of a target cardiac tissue and for delivering a tissue anchor to cardiac tissue at a preselected depth within the myocardium in a beating heart procedure. In one variation, an anchor delivery device comprises an elongate body, a tissue anchor disposed within a first longitudinal lumen of the elongate body, and a tissue depth indicator slidable within a second longitudinal lumen of the elongate body. The tissue depth indicator has a first configuration that indicates the boundary of the surface of the target tissue and a second configuration that indicates when the distal tip of the elongate body has been advanced to a preselected depth into the target tissue. In some variations, a tissue depth indicator may also be configured to resist or limit the penetration of the delivery device into tissue after a preselected depth has been reached.

Abstract: Compositions of matter, compounds, articles of manufacture and processes to reduce or substantially eliminate EM and/or stress migration, and/or TDDB in copper interconnects in microelectronic devices and circuits, especially a metal liner around copper interconnects comprise an ultra thin layer or layers of Mn alloys containing at least one of W and/or Co on the metal liner. This novel alloy provides EM and/or stress migration resistance, and/or TDDB resistance in these copper interconnects, comparable to thicker layers of other alloys found in substantially larger circuits and allows the miniaturization of the circuit without having to use thicker EM and/or TDDB resistant alloys previously used thereby enhancing the miniaturization, i.e., these novel alloy layers can be miniaturized along with the circuit and provide substantially the same EM and/or TDDB resistance as thicker layers of different alloy materials previously used that lose some of their EM and/or TDDB resistance when used as thinner layers.

Abstract: A method is presented for forming a fully aligned via (FAV) structure. The method includes depositing a first dielectric adjacent a conductive material, forming a surface aligned monolayer (SAM) over the conductive material, the SAM defining a long chain SAM formed by a layer-by-layer growth technique, depositing a second dielectric over the SAM and the first dielectric, performing chemical mechanical polishing (CMP) to planarize the second dielectric, and etching the SAM to form the FAV structure.

Abstract: A method includes forming a metallic interconnect structure on a semiconductor substrate where the metallic interconnect structure comprises a plurality of metal lines with adjacent metal lines separated by a gap therebetween. The method further includes selectively depositing a first low-k dielectric material onto the semiconductor substrate and onto exposed surfaces of the metal lines of the metallic interconnect structure to form a barrier on at least the metal lines. The barrier is configured to minimize oxidation and diffusion of metal of the metal lines. The method also includes depositing a flowable second low-k dielectric material onto the semiconductor substrate to form a dielectric layer encapsulating the barrier and the metallic interconnect structure.

Abstract: A method is presented for forming a fully aligned via (FAV) structure. The method includes depositing a first dielectric adjacent a conductive material, forming a surface aligned monolayer (SAM) over the conductive material, the SAM defining a long chain SAM formed by a layer-by-layer growth technique, depositing a second dielectric over the SAM and the first dielectric, performing chemical mechanical polishing (CMP) to planarize the second dielectric, and etching the SAM to form the FAV structure.

Abstract: The present invention relates to a method of covalently attaching a chromosome within a cell to a matrix including modifying a plurality of nucleotides within the chromosome to include a matrix attachment moiety wherein the chromosome contacts the matrix, and attaching the matrix attachment moiety of the plurality of nucleotides to the matrix, thereby attaching the chromosome to the matrix.