Abstract: A LTPS TFT comprises a substrate, and a buffer layer, a low temperature polysilicon layer, a source contact area, a drain contact area, a gate insulating layer, a gate layer, a dielectric layer, a source and a drain disposed on the substrate successively. The source contact area and the drain contact area are doped with metal ions individually. The source and the drain are connecting with the source and drain contact areas separately through the dielectric layer. The metal ions include at least one of Cu2+, Al3+, Mg2+, Zn2+ and Ni2+. A method of fabricating the LTPS TFT is also provided. An annealing is performed for driving individually metal ions of the insulation metal oxide layer into the source contact area and the drain contact area. Thus, the step of implanting p-type ions can be omitted, the procedure can be significantly simplified, and the manufacturing cost can be reduced.

Abstract: This disclosure discloses an array substrate and a manufacturing method, and a display device, the array substrate including: a channel layer; a gate insulating layer including a first portion and a second portion connected side by side, arranged on the channel layer, and exposing a source and drain contact zone on the channel layer, the second portion of the gate insulating layer being located on both sides of the first portion of the gate insulating layer; a gate layer, disposed on the first portion of the gate insulating layer; and a source and a drain, correspondingly connected to the contact region of the source and drain of the channel layer respectively. The array substrate of this disclosure solves the array substrate leakage problem caused by conductorizing the channel layer due to performing ion implantation to the channel layer.

Abstract: The present disclosure relates to a thin film transistor (TFT) substrate, a manufacturing method thereof, and an organic light-emitting (OLED) substrate. The interlayer dielectric layer manufactured by the manufacturing method may be configured in the structure of two silicon oxide layers sandwiching one silicon nitride layer. As such, the bonding force between the interlayer dielectric layer and the gate, and the bonding force between the interlayer dielectric layer, and the source and the drain may be improved. The source and the drain may be prevented from falling off from the interlayer dielectric layer during the annealing process. Production yield of the TFT substrate may be improved. The OLED substrate adopting the manufactured of the OLED substrate of the present disclosure may have a better production yield and quality.

Abstract: A solid phase crystallization method of the present invention includes: providing amorphous silicon; heating the amorphous silicon to a first crystallization temperature; continuously heating the amorphous silicon to cause a temperature rise, in a first time period, from the first crystallization temperature to a second crystallization temperature, keeping the amorphous silicon in the second crystallization temperature for a predetermined time interval, causing a temperature drop of the amorphous silicon so as to gradually drop, in a second time period, from the second crystallization temperature to the first crystallization temperature, allowing continuous temperature drop of the amorphous silicon to reach the room temperature to thereby obtain low-temperature poly-silicon.

Abstract: The disclosure provides a low-temperature polysilicon thin film transistor (LTPS TFT) including: a substrate; a gate; a gate insulating layer; a polysilicon layer disposed on the gate insulating layer and including a groove; a doped polysilicon layer disposed on the polysilicon layer and including a through hole completely exposing the groove; an etching barrier layer disposed on the gate insulating layer and the doped polysilicon layer and filling the through hole and the groove and including a first and a second via holes exposing the doped polysilicon layers; a source and a drain disposed on the etching barrier layer and filling the two via holes respectively; and a passivation layer. The disclosure also provides a manufacturing method and a display device of a LTPS TFT. The disclosure can prevent the source and the drain from directly contacting the polysilicon layer, thereby reducing the leakage current of the LTPS TFT.

Abstract: The present disclosure provides a display panel includes a color filter film. The color filter film includes a light incident surface and a light exit surface opposite to the light incident surface, and a backplane having oxide thin film transistor is provided on the light incident surface of the color filter film. An anode, an organic light emitting layer and a cathode are deposited sequentially from the bottom to top on one surface of the oxide thin film transistor carried on the backplane. The present disclosure further provides a method of manufacturing a display panel. Compared with the prior art, the process flow of the present disclosure is simplified, the manufacturing cost is reduced, and the thickness of the display panel is further reduced due to the removal of polarizers.

Abstract: The present invention discloses an organic electroluminescent display panel, including a substrate; a thin film transistor formed on the substrate; a bottom electrode formed on a drain of the thin film transistor; a light-blocking layer formed on the bottom electrode, the light-blocking layer has a first through hole that exposes the bottom electrode; a pixel define layer formed on the thin film transistor, the bottom electrode, and the light-blocking layer, the pixel define layer has a second through hole, the second through hole completely exposes the first through hole; an organic electroluminescent device formed on the bottom electrode, an edge of the organic electroluminescent device is formed on the light-blocking layer; and a top electrode formed on the organic electroluminescent device. The present invention uses the light-blocking layer to block the edge of the organic electroluminescent device, thereby eliminating the non-uniform brightness of the edge of the organic electroluminescent device.

Abstract: The present disclosure relates to an array substrate, manufacturing method thereof and display device using the same. The method for manufacturing the array substrate includes: forming an amorphous silicon layer and an insulating layer covering the amorphous silicon layer in one deposition process; and processing the amorphous silicon layer to transform the amorphous silicon layer into a polysilicon layer. Through the above-mentioned method, the present disclosure can solve the problem of affecting the concentration of current carriers that caused by the oxidation of the surface of polysilicon, and improve the performance of the array substrate.

Abstract: An array substrate is provided, including a substrate, a driver thin film transistor and a switch thin film transistor disposed on the substrate, the driver thin film transistor and the switch thin film transistor both include a gate, a gate insulating layer, an active layer, a source, and a drain. A barrier layer is disposed between the gate and the gate insulating layer of the driver thin film transistor. A manufacturing method thereof includes forming a barrier layer on the gate of the driver thin film transistor. Compared with existing arts, forming a barrier layer between the gate and the gate insulating layer of the driver thin film transistor to prevent its active layer from water and active oxygen ions affections can improve the electrical property and reliability of the thin film transistor, and ensure the normal operation for driving the driver thin film transistor of organic light emitting diode.

Abstract: An array substrate, an OLED display panel, and an OLED display are provided. The array substrate may include a flexible substrate, a buffer layer, a TFT functional layer, a first flexible layer, a dielectric layer, a second flexible layer, a first electrode layer, and a flat layer, which are successively disposed on the flexible substrate. By the provision of the array substrate, the first flexible layer and the second flexible layer may be formed on the upper and lower sides of the dielectric layer respectively. Compared with the prior art in which only one flexible layer is formed on the dielectric layer, the present disclosure having two layers of the flexible layer may increase the bending ability of the display panel.

Abstract: A manufacturing method of an OLED substrate and a manufacturing method of an OLED device are provided. The manufacturing method of the OLED substrate include steps of providing a base substrate; sequentially forming a first metal layer, a second metal layer, and a third metal layer on the base substrate; forming a pixel definition layer on the second metal layer; and forming a light-emitting layer on the third metal layer. The default water flow rate of the first metal layer and the third metal layer are different from each other.

Abstract: A manufacturing method of a LTPS-TFT is provided, including: providing a substrate, sequentially forming a buffer layer, a low temperature poly-silicon layer, a source contact region, a drain contact region, a gate insulator layer, a gate layer, and a dielectric layer on the substrate, respectively forming a first and a second contact holes through the dielectric layer and the gate insulator layer by dry etching to expose the source and the drain contact regions; and on the dielectric layer, forming a source electrode to contact the source contact region through the first contact hole and a drain electrode to contact the drain contact region through the second contact hole. A LTPS-TFT and an array substrate are also provided.

Abstract: A material property testing device and a manufacturing method are disclosed. The device includes: a substrate; a metal gate electrode; an auxiliary layer disposed on the metal gate electrode, and the metal gate electrode is located between the substrate and the auxiliary layer; a function layer disposed on the substrate. In the formation process of the function layer, an organic photoresist is attached on the auxiliary layer for a period of time, and the function layer is used for cooperating with a light-emitting device to test the property of the material. A film of the organic photoresist being disposed is even such that after exposing and developing, the function layer having an ideal pattern is obtained so as to ensure the testing effect of the material property testing device.

Abstract: The invention provides a manufacturing method of a thin film transistor and a manufacturing method of an array substrate. A photoresist is used to define a to-be-doped region of an amorphous silicon layer to thereby make a crystallization be occurred in a source contact region and a drain contact region. A crystallization direction is from the source contact region and the drain contact region towards a channel region, so that it can realize directional crystallization as far as possible, and therefore can improve crystallization efficiency and crystallization uniformity, reduce an influence of grain boundary applied to electron mobility and leakage current of the TFT and improve electrical characteristics of the TFT.

Abstract: A manufacturing method of an OLED substrate and a manufacturing method of an OLED device are provided. The manufacturing method of the OLED substrate include steps of providing a base substrate; sequentially forming a first metal layer, a second metal layer, and a third metal layer on the base substrate; forming a pixel definition layer on the second metal layer; and forming a light-emitting layer on the third metal layer. The default water flow rate of the first metal layer and the third metal layer are different from each other.

Abstract: A preparation method of a bottom-gate type low-temperature polysilicon transistor is disclosed in the present disclosure. The preparation method includes: preparing a first stack structure on a substrate; preparing a polysilicon layer and an etch stop layer in sequence on the first stack structure; patterning the polysilicon layer and the etch stop layer at the same time so that the etch stop layer covers portions of the polysilicon layer; implanting ions into the polysilicon layer that is not covered by the etch stop layer to form a source/drain region of the low-temperature polysilicon transistor. In this way, the present disclosure can simplify the manufacturing process and save the manufacturing cost.

Abstract: The disclosure provides an N-type thin film transistor, including a poly-silicon layer, a gate layer, a source and a drain. The poly-silicon layer includes a channel region, a source region and a drain region at two side of the channel region. The gate layer is on the channel region, a projection of the gate layer on the poly-silicon layer partially overlaps the source region and the drain region, and a thickness of the gate layer on the source region and the drain region are smaller than a thickness of the gate layer on the channel region. The source region and the drain region both include a heavily-doping region and a lightly-doping region connected to the heavily-doping region, the source and the drain are respectively on the heavily-doping region of the source region and the drain, and respectively electrically connects to the heavily-doping region of the source region and the drain.

Abstract: This invention discloses an array substrate, a display device and a manufacturing method thereof. The array substrate includes a base substrate and a low temperature polysilicon transistor and an oxide transistor positioned on the base substrate; the low temperature polysilicon transistor includes a laminated polysilicon layer and a first insulating layer, the first insulating layer comprising a silicon oxide layer and silicon nitride layer, wherein the silicon nitride layer is positioned between the polysilicon layer and the silicon oxide layer; the oxide transistor includes a laminated oxide semiconductor layer and a second insulating layer, and the second insulating layer is free of a silicon nitride layer. By the method, the leakage problem of the low temperature polysilicon transistor is effectively reduced, and the reliability of the oxide transistor is improved.

Abstract: The invention provides a manufacturing method of flexible TFT substrate, forming first contact hole above two sides of the active layer and buffer hole on flexible base substrate after depositing a silicon oxide layer of interlayer dielectric layer (ILD), coating organic photo-resist material on the silicon oxide layer and filling the organic photo-resist material into the buffer hole during coating to form organic photo-resist layer to obtain ILD including silicon oxide layer and organic photo-resist layer, and patternizing organic photo-resist layer to form a connection hole corresponding to above of first contact hole so that the subsequent source/drain connected to active layer through the first contact holes and connection holes. By replacing the silicon nitride layer in conventional ILD with flexible organic photo-resist layer and providing buffer hole filled with organic photo-resist material on flexible base substrate, the flexibility of TFT substrate is enhanced and product performance improved.

Abstract: Disclosed is a method for manufacturing a low-temperature poly-silicon thin film transistor, which relates to the technical field of display panel. The method comprises steps of: forming a gate layer, an active layer, a source-drain contact layer and a source-drain electrode in sequence on a substrate. The step of forming the source-drain contact layer includes sub steps of: forming a channel protection layer; depositing an ohmic contact layer using a reaction gas containing diborane and through a plasma enhanced chemical vapor deposition method; and patterning the ohmic contact layer to form the source-drain contact layer. During deposition of the ohmic contact layer, boron ions can enter into the source-drain contact layer. According to this method, a mask is not needed to define an implanted region of boron ions. Therefore, a procedure of implanting the boron ions can be saved; the manufacturing procedure can be simplified; and the manufacturing cost can be reduced.